svn commit: r317079 - head/contrib/llvm/lib/Target/X86

[Dimitry Andric]

Author: dim
Date: Tue Apr 18 07:02:12 2017
New Revision: 317079
URL: https://svnweb.freebsd.org/changeset/base/317079

Log:
  Pull in r300429 from upstream llvm trunk (by Benjamin Kramer):
  
    [X86] Remove special handling for 16 bit for A asm constraints.
  
    Our 16 bit support is assembler-only + the terrible hack that is
    .code16gcc. Simply using 32 bit registers does the right thing for
    the latter.
  
    Fixes PR32681.
  
  This fixes some cases of assembling 16 bit code (i.e. SeaBIOS) that uses
  the 'A' inline asm constraint, after r316989.
  
  MFC after:	3 days
  X-MFC-With:	r316989

Modified:
  head/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
  head/contrib/llvm/lib/Target/X86/X86RegisterInfo.td

Modified: head/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
==============================================================================
--- head/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp	Tue Apr 18 06:58:04 2017	(r317078)
+++ head/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp	Tue Apr 18 07:02:12 2017	(r317079)
@@ -34722,14 +34722,11 @@ X86TargetLowering::getRegForInlineAsmCon
       if (Subtarget.is64Bit()) {
         Res.first = X86::RAX;
         Res.second = &X86::GR64_ADRegClass;
-      } else if (Subtarget.is32Bit()) {
+      } else {
+        assert((Subtarget.is32Bit() || Subtarget.is16Bit()) &&
+               "Expecting 64, 32 or 16 bit subtarget");
         Res.first = X86::EAX;
         Res.second = &X86::GR32_ADRegClass;
-      } else if (Subtarget.is16Bit()) {
-        Res.first = X86::AX;
-        Res.second = &X86::GR16_ADRegClass;
-      } else {
-        llvm_unreachable("Expecting 64, 32 or 16 bit subtarget");
       }
       return Res;
     }

Modified: head/contrib/llvm/lib/Target/X86/X86RegisterInfo.td
==============================================================================
--- head/contrib/llvm/lib/Target/X86/X86RegisterInfo.td	Tue Apr 18 06:58:04 2017	(r317078)
+++ head/contrib/llvm/lib/Target/X86/X86RegisterInfo.td	Tue Apr 18 07:02:12 2017	(r317079)
@@ -438,7 +438,6 @@ def LOW32_ADDR_ACCESS_RBP : RegisterClas
                                           (add LOW32_ADDR_ACCESS, RBP)>;
 
 // A class to support the 'A' assembler constraint: [ER]AX then [ER]DX.
-def GR16_AD : RegisterClass<"X86", [i16], 16, (add AX, DX)>;
 def GR32_AD : RegisterClass<"X86", [i32], 32, (add EAX, EDX)>;
 def GR64_AD : RegisterClass<"X86", [i64], 64, (add RAX, RDX)>;