svn commit: r317006 - in stable/11/sys/arm: conf nvidia/tegra124

[Michal Meloun]

Author: mmel
Date: Sun Apr 16 07:41:30 2017
New Revision: 317006
URL: https://svnweb.freebsd.org/changeset/base/317006

Log:
  MFC r306442,r306444,r306445,r306550:
  
    r306442:
      TEGRA: Add support for MULTIDELAY option.
    r306444:
      TEGRA: Don't include files already included by system or arch configs.
    r306445:
      TEGRA: Return back kern_clocksource.c into tegra config file. It was
      removed in r306444 by mistake.
    r306550:
      TEGRA: Extend timeout for PLLs lock to 5 ms. Real lock time for PLLA has
      been very near to old limit.

Modified:
  stable/11/sys/arm/conf/TEGRA124
  stable/11/sys/arm/nvidia/tegra124/files.tegra124
  stable/11/sys/arm/nvidia/tegra124/tegra124_clk_pll.c
  stable/11/sys/arm/nvidia/tegra124/tegra124_machdep.c
Directory Properties:
  stable/11/   (props changed)

Modified: stable/11/sys/arm/conf/TEGRA124
==============================================================================
--- stable/11/sys/arm/conf/TEGRA124	Sun Apr 16 07:33:47 2017	(r317005)
+++ stable/11/sys/arm/conf/TEGRA124	Sun Apr 16 07:41:30 2017	(r317006)
@@ -26,6 +26,7 @@ ident		TEGRA124
 options 	SCHED_ULE		# ULE scheduler
 options 	PLATFORM		# Platform based SoC
 options 	PLATFORM_SMP
+options  	MULTIDELAY
 options 	SMP			# Enable multiple cores
 options 	LINUX_BOOT_ABI
 

Modified: stable/11/sys/arm/nvidia/tegra124/files.tegra124
==============================================================================
--- stable/11/sys/arm/nvidia/tegra124/files.tegra124	Sun Apr 16 07:33:47 2017	(r317005)
+++ stable/11/sys/arm/nvidia/tegra124/files.tegra124	Sun Apr 16 07:41:30 2017	(r317006)
@@ -4,7 +4,6 @@
 # Standard ARM support.
 #
 kern/kern_clocksource.c			standard
-dev/ofw/ofw_cpu.c			optional	fdt
 
 #
 # Standard tegra124 devices and support.

Modified: stable/11/sys/arm/nvidia/tegra124/tegra124_clk_pll.c
==============================================================================
--- stable/11/sys/arm/nvidia/tegra124/tegra124_clk_pll.c	Sun Apr 16 07:33:47 2017	(r317005)
+++ stable/11/sys/arm/nvidia/tegra124/tegra124_clk_pll.c	Sun Apr 16 07:41:30 2017	(r317006)
@@ -86,7 +86,7 @@ enum pll_type {
 #define	PLLRE_IDDQ_BIT		16
 #define	PLLSS_IDDQ_BIT		19
 
-#define	PLL_LOCK_TIMEOUT 1000
+#define	PLL_LOCK_TIMEOUT	5000
 
 /* Post divider <-> register value mapping. */
 struct pdiv_table {

Modified: stable/11/sys/arm/nvidia/tegra124/tegra124_machdep.c
==============================================================================
--- stable/11/sys/arm/nvidia/tegra124/tegra124_machdep.c	Sun Apr 16 07:33:47 2017	(r317005)
+++ stable/11/sys/arm/nvidia/tegra124/tegra124_machdep.c	Sun Apr 16 07:41:30 2017	(r317006)
@@ -151,4 +151,4 @@ static platform_method_t tegra124_method
 	PLATFORMMETHOD_END,
 };
 
-FDT_PLATFORM_DEF(tegra124, "Nvidia Jetson-TK1", 0, "nvidia,jetson-tk1", 0);
+FDT_PLATFORM_DEF(tegra124, "Nvidia Jetson-TK1", 0, "nvidia,jetson-tk1", 120);