svn commit: r263679 - head/sys/arm/include

[Andrew Turner]

Author: andrew
Date: Mon Mar 24 08:24:32 2014
New Revision: 263679
URL: http://svnweb.freebsd.org/changeset/base/263679

Log:
  Move an else case that was missed in r263676

Modified:
  head/sys/arm/include/pmap.h

Modified: head/sys/arm/include/pmap.h
==============================================================================
--- head/sys/arm/include/pmap.h	Mon Mar 24 01:21:37 2014	(r263678)
+++ head/sys/arm/include/pmap.h	Mon Mar 24 08:24:32 2014	(r263679)
@@ -421,6 +421,31 @@ extern int pmap_needs_pte_sync;
 #define ARM_L2S_NRML_IWT_OWT	(L2_C)
 #define ARM_L2S_NRML_IWB_OWB	(L2_C|L2_B)
 #define ARM_L2S_NRML_IWBA_OWBA	(L2_S_TEX(1)|L2_C|L2_B)
+#else
+#define ARM_L1S_STRONG_ORD	(0)
+#define ARM_L1S_DEVICE_NOSHARE	(L1_S_TEX(2))
+#define ARM_L1S_DEVICE_SHARE	(L1_S_B)
+#define ARM_L1S_NRML_NOCACHE	(L1_S_TEX(1)|L1_SHARED)
+#define ARM_L1S_NRML_IWT_OWT	(L1_S_C|L1_SHARED)
+#define ARM_L1S_NRML_IWB_OWB	(L1_S_C|L1_S_B|L1_SHARED)
+#define ARM_L1S_NRML_IWBA_OWBA	(L1_S_TEX(1)|L1_S_C|L1_S_B|L1_SHARED)
+
+#define ARM_L2L_STRONG_ORD	(0)
+#define ARM_L2L_DEVICE_NOSHARE	(L2_L_TEX(2))
+#define ARM_L2L_DEVICE_SHARE	(L2_B)
+#define ARM_L2L_NRML_NOCACHE	(L2_L_TEX(1)|L2_SHARED)
+#define ARM_L2L_NRML_IWT_OWT	(L2_C|L2_SHARED)
+#define ARM_L2L_NRML_IWB_OWB	(L2_C|L2_B|L2_SHARED)
+#define ARM_L2L_NRML_IWBA_OWBA	(L2_L_TEX(1)|L2_C|L2_B|L2_SHARED)
+
+#define ARM_L2S_STRONG_ORD	(0)
+#define ARM_L2S_DEVICE_NOSHARE	(L2_S_TEX(2))
+#define ARM_L2S_DEVICE_SHARE	(L2_B)
+#define ARM_L2S_NRML_NOCACHE	(L2_S_TEX(1)|L2_SHARED)
+#define ARM_L2S_NRML_IWT_OWT	(L2_C|L2_SHARED)
+#define ARM_L2S_NRML_IWB_OWB	(L2_C|L2_B|L2_SHARED)
+#define ARM_L2S_NRML_IWBA_OWBA	(L2_S_TEX(1)|L2_C|L2_B|L2_SHARED)
+#endif /* SMP */
 
 #elif ARM_NMMUS > 1
 /* More than one MMU class configured; use variables. */
@@ -462,31 +487,6 @@ extern int pmap_needs_pte_sync;
 #define	L1_C_PROTO		L1_C_PROTO_xscale
 #define	L2_S_PROTO		L2_S_PROTO_xscale
 
-#else
-#define ARM_L1S_STRONG_ORD	(0)
-#define ARM_L1S_DEVICE_NOSHARE	(L1_S_TEX(2))
-#define ARM_L1S_DEVICE_SHARE	(L1_S_B)
-#define ARM_L1S_NRML_NOCACHE	(L1_S_TEX(1)|L1_SHARED)
-#define ARM_L1S_NRML_IWT_OWT	(L1_S_C|L1_SHARED)
-#define ARM_L1S_NRML_IWB_OWB	(L1_S_C|L1_S_B|L1_SHARED)
-#define ARM_L1S_NRML_IWBA_OWBA	(L1_S_TEX(1)|L1_S_C|L1_S_B|L1_SHARED)
-
-#define ARM_L2L_STRONG_ORD	(0)
-#define ARM_L2L_DEVICE_NOSHARE	(L2_L_TEX(2))
-#define ARM_L2L_DEVICE_SHARE	(L2_B)
-#define ARM_L2L_NRML_NOCACHE	(L2_L_TEX(1)|L2_SHARED)
-#define ARM_L2L_NRML_IWT_OWT	(L2_C|L2_SHARED)
-#define ARM_L2L_NRML_IWB_OWB	(L2_C|L2_B|L2_SHARED)
-#define ARM_L2L_NRML_IWBA_OWBA	(L2_L_TEX(1)|L2_C|L2_B|L2_SHARED)
-
-#define ARM_L2S_STRONG_ORD	(0)
-#define ARM_L2S_DEVICE_NOSHARE	(L2_S_TEX(2))
-#define ARM_L2S_DEVICE_SHARE	(L2_B)
-#define ARM_L2S_NRML_NOCACHE	(L2_S_TEX(1)|L2_SHARED)
-#define ARM_L2S_NRML_IWT_OWT	(L2_C|L2_SHARED)
-#define ARM_L2S_NRML_IWB_OWB	(L2_C|L2_B|L2_SHARED)
-#define ARM_L2S_NRML_IWBA_OWBA	(L2_S_TEX(1)|L2_C|L2_B|L2_SHARED)
-#endif /* SMP */
 #endif /* ARM_NMMUS > 1 */
 
 #if defined(CPU_XSCALE_81342) || ARM_ARCH_6 || ARM_ARCH_7A