svn commit: r266083 - in head/sys/arm: arm include

Michael Tuexen tuexen at freebsd.org
Sun Jun 15 15:25:47 UTC 2014


On 15 Jun 2014, at 17:13, Mark R V Murray <markm at FreeBSD.org> wrote:

> 
> On 30 May 2014, at 09:42, Michael Tuexen <tuexen at fh-muenster.de> wrote:
> 
>> On 29 May 2014, at 21:21, Mark R V Murray <markm at FreeBSD.org> wrote:
>> 
>>> 
>>> On 29 May 2014, at 19:27, Michael Tuexen <tuexen at fh-muenster.de> wrote:
>>> 
>>>> On 29 May 2014, at 20:15, Mark R V Murray <markm at FreeBSD.org> wrote:
>>>> 
>>>>> 
>>>>> On 29 May 2014, at 19:13, Michael Tuexen <tuexen at fh-muenster.de> wrote:
>>>>> 
>>>>>>> I can make it work on RPI, but trying to find what else it will/won’t work on is more problematic.
>>>>>> Wouldn't it require to use different registers on the RPI? This would mean you
>>>>>> would need more #ifdefs…
>>>>> 
>>>>> Thats the problem; too many #ifdefs.
>>>> So you could just keep the code for now, but reduce the #ifdefs to the ones you
>>>> know that work. Later on, you can replace it by the driver stuff…
>>> 
>>> That’s what I was thinking, yes.
>> Great. Let me know if you need testing support on the RPI…
> 
> I’ve come to the conclusion that my RPI-B is hosed. It doesn’t even boot Raspian properly. Sorry about how long this has taken.
> 
> Please could someone with a working RPI please check that the following patch works (may need to apply by hand due to cut/paste).
> 
> Thanks, with repeated apologies.
I can test it and report if it works. It might take until tomorrow...
Thanks for working on a fix!


Best regards
Michael
> 
> M
> -- 
> Mark R V Murray
> 
> --- include/cpu.h	(revision 267507)
> +++ include/cpu.h	(working copy)
> @@ -25,7 +25,16 @@
> 	 * Read PMCCNTR. Curses! Its only 32 bits.
> 	 * TODO: Fix this by catching overflow with interrupt?
> 	 */
> +/* The ARMv6 vs ARMv7 divide is going to need a better way of
> + * distinguishing between them.
> + */
> +#if defined(CPU_ARM1136) || defined(CPU_ARM1176)
> +	/* ARMv6 - Earlier model SCCs */
> +	__asm __volatile("mrc p15, 0, %0, c15, c12, 1": "=r" (ccnt));
> +#else
> +	/* ARMv7 - Later model SCCs */
> 	__asm __volatile("mrc p15, 0, %0, c9, c13, 0": "=r" (ccnt));
> +#endif
> 	ccnt64 = (uint64_t)ccnt;
> 	return (ccnt64);
> #else /* No performance counters, so use binuptime(9). This is slooooow */
> 
> 



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