svn commit: r276299 - in head/sys/dev: bge pci
Marius Strobl
marius at FreeBSD.org
Sat Dec 27 14:26:19 UTC 2014
Author: marius
Date: Sat Dec 27 14:26:18 2014
New Revision: 276299
URL: https://svnweb.freebsd.org/changeset/base/276299
Log:
- Make PCI_QUIRK_MSI_INTX_BUG work by using the ID of the actual PCI device
for the lookup.
- For devices affected by PCI_QUIRK_MSI_INTX_BUG, ensure PCIM_CMD_INTxDIS
is cleared when using MSI/MSI-X.
- Employ PCI_QUIRK_MSI_INTX_BUG for BCM5714(S)/BCM5715(S)/BCM5780(S) rather
than clearing PCIM_CMD_INTxDIS unconditionally for all devices in bge(4).
MFC after: 3 days
Modified:
head/sys/dev/bge/if_bge.c
head/sys/dev/pci/pci.c
Modified: head/sys/dev/bge/if_bge.c
==============================================================================
--- head/sys/dev/bge/if_bge.c Sat Dec 27 14:06:05 2014 (r276298)
+++ head/sys/dev/bge/if_bge.c Sat Dec 27 14:26:18 2014 (r276299)
@@ -1946,11 +1946,9 @@ bge_chipinit(struct bge_softc *sc)
/*
* Disable memory write invalidate. Apparently it is not supported
- * properly by these devices. Also ensure that INTx isn't disabled,
- * as these chips need it even when using MSI.
+ * properly by these devices.
*/
- PCI_CLRBIT(sc->bge_dev, BGE_PCI_CMD,
- PCIM_CMD_INTxDIS | PCIM_CMD_MWIEN, 4);
+ PCI_CLRBIT(sc->bge_dev, BGE_PCI_CMD, PCIM_CMD_MWIEN, 4);
/* Set the timer prescaler (always 66 MHz). */
CSR_WRITE_4(sc, BGE_MISC_CFG, BGE_32BITTIME_66MHZ);
Modified: head/sys/dev/pci/pci.c
==============================================================================
--- head/sys/dev/pci/pci.c Sat Dec 27 14:06:05 2014 (r276298)
+++ head/sys/dev/pci/pci.c Sat Dec 27 14:26:18 2014 (r276299)
@@ -268,7 +268,7 @@ static const struct pci_quirk pci_quirks
{ 0x43851002, PCI_QUIRK_UNMAP_REG, 0x14, 0 },
/*
- * Atheros AR8161/AR8162/E2200 ethernet controller has a bug that
+ * Atheros AR8161/AR8162/E2200 Ethernet controllers have a bug that
* MSI interrupt does not assert if PCIM_CMD_INTxDIS bit of the
* command register is set.
*/
@@ -276,6 +276,17 @@ static const struct pci_quirk pci_quirks
{ 0xE0911969, PCI_QUIRK_MSI_INTX_BUG, 0, 0 },
{ 0x10901969, PCI_QUIRK_MSI_INTX_BUG, 0, 0 },
+ /*
+ * Broadcom BCM5714(S)/BCM5715(S)/BCM5780(S) Ethernet MACs don't
+ * issue MSI interrupts with PCIM_CMD_INTxDIS set either.
+ */
+ { 0x166814e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, /* BCM5714 */
+ { 0x166914e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, /* BCM5714S */
+ { 0x166a14e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, /* BCM5780 */
+ { 0x166b14e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, /* BCM5780S */
+ { 0x167814e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, /* BCM5715 */
+ { 0x167914e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, /* BCM5715S */
+
{ 0 }
};
@@ -3866,14 +3877,16 @@ pci_setup_intr(device_t dev, device_t ch
mte->mte_handlers++;
}
- if (!pci_has_quirk(pci_get_devid(dev),
- PCI_QUIRK_MSI_INTX_BUG)) {
- /*
- * Make sure that INTx is disabled if we are
- * using MSI/MSIX
- */
+ /*
+ * Make sure that INTx is disabled if we are using MSI/MSI-X,
+ * unless the device is affected by PCI_QUIRK_MSI_INTX_BUG,
+ * in which case we "enable" INTx so MSI/MSI-X actually works.
+ */
+ if (!pci_has_quirk(pci_get_devid(child),
+ PCI_QUIRK_MSI_INTX_BUG))
pci_set_command_bit(dev, child, PCIM_CMD_INTxDIS);
- }
+ else
+ pci_clear_command_bit(dev, child, PCIM_CMD_INTxDIS);
bad:
if (error) {
(void)bus_generic_teardown_intr(dev, child, irq,
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