svn commit: r270806 - head/sys/dev/ixl

[Jack Vogel]

I certainly agree that it would be a bit ridiculous to do 40G in a 32bit
environment :)

Jack



On Fri, Aug 29, 2014 at 10:14 AM, Konstantin Belousov <kostikbel at gmail.com>
wrote:

> On Fri, Aug 29, 2014 at 12:40:01PM +0000, Bjoern A. Zeeb wrote:
> > Author: bz
> > Date: Fri Aug 29 12:40:01 2014
> > New Revision: 270806
> > URL: http://svnweb.freebsd.org/changeset/base/270806
> >
> > Log:
> >   Properly handle prefetch only for amd64 and i386 as we do elsewhere.
> >
> >   In general theraven is right that we should factr this out and provide
> >   a general and per-arch implementation that everything can use.
> >
> >   MFC after:  3 days
> >   X-MFC with: r270755
> >
> > Modified:
> >   head/sys/dev/ixl/i40e_osdep.h
> >
> > Modified: head/sys/dev/ixl/i40e_osdep.h
> >
> ==============================================================================
> > --- head/sys/dev/ixl/i40e_osdep.h     Fri Aug 29 11:18:54 2014
> (r270805)
> > +++ head/sys/dev/ixl/i40e_osdep.h     Fri Aug 29 12:40:01 2014
> (r270806)
> > @@ -137,11 +137,15 @@ struct i40e_spinlock {
> >
> >  #define le16_to_cpu
> >
> > +#if defined(__amd64__) || defined(i386)
> >  static __inline
> >  void prefetch(void *x)
> >  {
> >       __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
> >  }
> This only fix the build failure, but the code is still somewhat wrong.
>
> Availability of the prefetch instruction depends on the presence of SSE.
> Althought it is probably impossible to find a machine where the intended
> hardware can operate and which does not support SSE _currently_, I am
> not sure that it is wise to hard-code SSE instructions in the i386
> kernel.
>
> Might be, a change of the compilation test from both amd64 and i386 to
> just amd64 is due.  I doubt that anybody would use 40Gb with 32bit OS,
> and even if somebody does, that the performace is at the stake in
> this case.
>
> > +#else
> > +#define      prefetch(x)
> > +#endif
> >
> >  struct i40e_osdep
> >  {
>