svn commit: r236772 - in head/sys: amd64/acpica amd64/amd64
amd64/include conf dev/acpica i386/acpica i386/i386
i386/include kern sys x86/acpica
Mitsuru IWASAKI
iwasaki at FreeBSD.org
Sat Jun 9 00:37:27 UTC 2012
Author: iwasaki
Date: Sat Jun 9 00:37:26 2012
New Revision: 236772
URL: http://svn.freebsd.org/changeset/base/236772
Log:
Add x86/acpica/acpi_wakeup.c for amd64 and i386. Difference of
suspend/resume procedures are minimized among them.
common:
- Add global cpuset suspended_cpus to indicate APs are suspended/resumed.
- Remove acpi_waketag and acpi_wakemap from acpivar.h (no longer used).
- Add some variables in acpi_wakecode.S in order to minimize the difference
among amd64 and i386.
- Disable load_cr3() because now CR3 is restored in resumectx().
amd64:
- Add suspend/resume related members (such as MSR) in PCB.
- Modify savectx() for above new PCB members.
- Merge acpi_switch.S into cpu_switch.S as resumectx().
i386:
- Merge(and remove) suspendctx() into savectx() in order to match with
amd64 code.
Reviewed by: attilio@, acpi@
Added:
head/sys/x86/acpica/acpi_wakeup.c (contents, props changed)
Deleted:
head/sys/amd64/acpica/acpi_switch.S
head/sys/amd64/acpica/acpi_wakeup.c
head/sys/i386/acpica/acpi_wakeup.c
Modified:
head/sys/amd64/acpica/acpi_wakecode.S
head/sys/amd64/amd64/cpu_switch.S
head/sys/amd64/amd64/genassym.c
head/sys/amd64/amd64/mp_machdep.c
head/sys/amd64/include/pcb.h
head/sys/conf/files.amd64
head/sys/conf/files.i386
head/sys/dev/acpica/acpivar.h
head/sys/i386/acpica/acpi_wakecode.S
head/sys/i386/i386/mp_machdep.c
head/sys/i386/i386/swtch.s
head/sys/i386/include/pcb.h
head/sys/kern/subr_smp.c
head/sys/sys/smp.h
Modified: head/sys/amd64/acpica/acpi_wakecode.S
==============================================================================
--- head/sys/amd64/acpica/acpi_wakecode.S Fri Jun 8 22:54:25 2012 (r236771)
+++ head/sys/amd64/acpica/acpi_wakecode.S Sat Jun 9 00:37:26 2012 (r236772)
@@ -219,10 +219,15 @@ wakeup_64:
mov $bootdata64 - bootgdt, %eax
mov %ax, %ds
- /* Restore arguments and return. */
- movq wakeup_kpml4 - wakeup_start(%rbx), %rdi
- movq wakeup_ctx - wakeup_start(%rbx), %rsi
- movq wakeup_retaddr - wakeup_start(%rbx), %rax
+ /* Restore arguments. */
+ movq wakeup_cr3 - wakeup_start(%rbx), %rsi
+ movq wakeup_pcb - wakeup_start(%rbx), %rdi
+ movq wakeup_ret - wakeup_start(%rbx), %rax
+
+ /* Restore GDT. */
+ lgdt wakeup_gdt - wakeup_start(%rbx)
+
+ /* Jump to return address. */
jmp *%rax
.data
@@ -268,34 +273,15 @@ bootgdtdesc:
.long bootgdt - wakeup_start /* Offset plus %ds << 4 */
ALIGN_DATA
-wakeup_retaddr:
+wakeup_cr4: /* not used */
.quad 0
-wakeup_kpml4:
- .quad 0
-
-wakeup_ctx:
+wakeup_cr3:
.quad 0
wakeup_pcb:
.quad 0
-wakeup_fpusave:
+wakeup_ret:
.quad 0
wakeup_gdt:
.word 0
.quad 0
-
- ALIGN_DATA
-wakeup_efer:
- .quad 0
-wakeup_star:
- .quad 0
-wakeup_lstar:
- .quad 0
-wakeup_cstar:
- .quad 0
-wakeup_sfmask:
- .quad 0
-wakeup_xsmask:
- .quad 0
-wakeup_cpu:
- .long 0
dummy:
Modified: head/sys/amd64/amd64/cpu_switch.S
==============================================================================
--- head/sys/amd64/amd64/cpu_switch.S Fri Jun 8 22:54:25 2012 (r236771)
+++ head/sys/amd64/amd64/cpu_switch.S Sat Jun 9 00:37:26 2012 (r236772)
@@ -357,6 +357,30 @@ ENTRY(savectx)
rdmsr
movl %eax,PCB_KGSBASE(%rdi)
movl %edx,PCB_KGSBASE+4(%rdi)
+ movl $MSR_EFER,%ecx
+ rdmsr
+ movl %eax,PCB_EFER(%rdi)
+ movl %edx,PCB_EFER+4(%rdi)
+ movl $MSR_STAR,%ecx
+ rdmsr
+ movl %eax,PCB_STAR(%rdi)
+ movl %edx,PCB_STAR+4(%rdi)
+ movl $MSR_LSTAR,%ecx
+ rdmsr
+ movl %eax,PCB_LSTAR(%rdi)
+ movl %edx,PCB_LSTAR+4(%rdi)
+ movl $MSR_CSTAR,%ecx
+ rdmsr
+ movl %eax,PCB_CSTAR(%rdi)
+ movl %edx,PCB_CSTAR+4(%rdi)
+ movl $MSR_SF_MASK,%ecx
+ rdmsr
+ movl %eax,PCB_SFMASK(%rdi)
+ movl %edx,PCB_SFMASK+4(%rdi)
+ movl xsave_mask,%eax
+ movl %eax,PCB_XSMASK(%rdi)
+ movl xsave_mask+4,%eax
+ movl %eax,PCB_XSMASK+4(%rdi)
sgdt PCB_GDT(%rdi)
sidt PCB_IDT(%rdi)
@@ -370,6 +394,141 @@ ENTRY(savectx)
END(savectx)
/*
+ * resumectx(pcb in %rdi, cr3 in %rsi)
+ * Resuming processor state from pcb.
+ */
+ENTRY(resumectx)
+ /* Switch to KPML4phys. */
+ movq %rsi,%cr3
+
+ /* Force kernel segment registers. */
+ movl $KDSEL,%eax
+ movw %ax,%ds
+ movw %ax,%es
+ movw %ax,%ss
+ movl $KUF32SEL,%eax
+ movw %ax,%fs
+ movl $KUG32SEL,%eax
+ movw %ax,%gs
+
+ movl $MSR_FSBASE,%ecx
+ movl PCB_FSBASE(%rdi),%eax
+ movl 4 + PCB_FSBASE(%rdi),%edx
+ wrmsr
+ movl $MSR_GSBASE,%ecx
+ movl PCB_GSBASE(%rdi),%eax
+ movl 4 + PCB_GSBASE(%rdi),%edx
+ wrmsr
+ movl $MSR_KGSBASE,%ecx
+ movl PCB_KGSBASE(%rdi),%eax
+ movl 4 + PCB_KGSBASE(%rdi),%edx
+ wrmsr
+
+ /* Restore EFER. */
+ movl $MSR_EFER,%ecx
+ movl PCB_EFER(%rdi),%eax
+ wrmsr
+
+ /* Restore fast syscall stuff. */
+ movl $MSR_STAR,%ecx
+ movl PCB_STAR(%rdi),%eax
+ movl 4 + PCB_STAR(%rdi),%edx
+ wrmsr
+ movl $MSR_LSTAR,%ecx
+ movl PCB_LSTAR(%rdi),%eax
+ movl 4 + PCB_LSTAR(%rdi),%edx
+ wrmsr
+ movl $MSR_CSTAR,%ecx
+ movl PCB_CSTAR(%rdi),%eax
+ movl 4 + PCB_CSTAR(%rdi),%edx
+ wrmsr
+ movl $MSR_SF_MASK,%ecx
+ movl PCB_SFMASK(%rdi),%eax
+ wrmsr
+
+ /* Restore CR0 except for FPU mode. */
+ movq PCB_CR0(%rdi),%rax
+ andq $~(CR0_EM | CR0_TS),%rax
+ movq %rax,%cr0
+
+ /* Restore CR2, CR4 and CR3. */
+ movq PCB_CR2(%rdi),%rax
+ movq %rax,%cr2
+ movq PCB_CR4(%rdi),%rax
+ movq %rax,%cr4
+ movq PCB_CR3(%rdi),%rax
+ movq %rax,%cr3
+
+ /* Restore descriptor tables. */
+ lidt PCB_IDT(%rdi)
+ lldt PCB_LDT(%rdi)
+
+#define SDT_SYSTSS 9
+#define SDT_SYSBSY 11
+
+ /* Clear "task busy" bit and reload TR. */
+ movq PCPU(TSS),%rax
+ andb $(~SDT_SYSBSY | SDT_SYSTSS),5(%rax)
+ movw PCB_TR(%rdi),%ax
+ ltr %ax
+
+#undef SDT_SYSTSS
+#undef SDT_SYSBSY
+
+ /* Restore debug registers. */
+ movq PCB_DR0(%rdi),%rax
+ movq %rax,%dr0
+ movq PCB_DR1(%rdi),%rax
+ movq %rax,%dr1
+ movq PCB_DR2(%rdi),%rax
+ movq %rax,%dr2
+ movq PCB_DR3(%rdi),%rax
+ movq %rax,%dr3
+ movq PCB_DR6(%rdi),%rax
+ movq %rax,%dr6
+ movq PCB_DR7(%rdi),%rax
+ movq %rax,%dr7
+
+ /* Restore FPU state. */
+ fninit
+ movq PCB_FPUSUSPEND(%rdi),%rbx
+ movq PCB_XSMASK(%rdi),%rax
+ testq %rax,%rax
+ jz 1f
+ movq %rax,%rdx
+ shrq $32,%rdx
+ movl $XCR0,%ecx
+/* xsetbv */
+ .byte 0x0f, 0x01, 0xd1
+/* xrstor (%rbx) */
+ .byte 0x0f, 0xae, 0x2b
+ jmp 2f
+1:
+ fxrstor (%rbx)
+2:
+
+ /* Reload CR0. */
+ movq PCB_CR0(%rdi),%rax
+ movq %rax,%cr0
+
+ /* Restore other callee saved registers. */
+ movq PCB_R15(%rdi),%r15
+ movq PCB_R14(%rdi),%r14
+ movq PCB_R13(%rdi),%r13
+ movq PCB_R12(%rdi),%r12
+ movq PCB_RBP(%rdi),%rbp
+ movq PCB_RSP(%rdi),%rsp
+ movq PCB_RBX(%rdi),%rbx
+
+ /* Restore return address. */
+ movq PCB_RIP(%rdi),%rax
+ movq %rax,(%rsp)
+
+ xorl %eax,%eax
+ ret
+END(resumectx)
+
+/*
* Wrapper around fpusave to care about TS0_CR.
*/
ENTRY(ctx_fpusave)
Modified: head/sys/amd64/amd64/genassym.c
==============================================================================
--- head/sys/amd64/amd64/genassym.c Fri Jun 8 22:54:25 2012 (r236771)
+++ head/sys/amd64/amd64/genassym.c Sat Jun 9 00:37:26 2012 (r236772)
@@ -157,6 +157,13 @@ ASSYM(PCB_TSSP, offsetof(struct pcb, pcb
ASSYM(PCB_SAVEFPU, offsetof(struct pcb, pcb_save));
ASSYM(PCB_SAVEFPU_SIZE, sizeof(struct savefpu));
ASSYM(PCB_USERFPU, sizeof(struct pcb));
+ASSYM(PCB_EFER, offsetof(struct pcb, pcb_efer));
+ASSYM(PCB_STAR, offsetof(struct pcb, pcb_star));
+ASSYM(PCB_LSTAR, offsetof(struct pcb, pcb_lstar));
+ASSYM(PCB_CSTAR, offsetof(struct pcb, pcb_cstar));
+ASSYM(PCB_SFMASK, offsetof(struct pcb, pcb_sfmask));
+ASSYM(PCB_XSMASK, offsetof(struct pcb, pcb_xsmask));
+ASSYM(PCB_FPUSUSPEND, offsetof(struct pcb, pcb_fpususpend));
ASSYM(PCB_SIZE, sizeof(struct pcb));
ASSYM(PCB_FULL_IRET, PCB_FULL_IRET);
ASSYM(PCB_DBREGS, PCB_DBREGS);
Modified: head/sys/amd64/amd64/mp_machdep.c
==============================================================================
--- head/sys/amd64/amd64/mp_machdep.c Fri Jun 8 22:54:25 2012 (r236771)
+++ head/sys/amd64/amd64/mp_machdep.c Sat Jun 9 00:37:26 2012 (r236772)
@@ -100,7 +100,6 @@ void *dpcpu;
struct pcb stoppcbs[MAXCPU];
struct pcb **susppcbs;
-void **suspfpusave;
/* Variables needed for SMP tlb shootdown. */
vm_offset_t smp_tlb_addr1;
@@ -1415,15 +1414,19 @@ cpususpend_handler(void)
cpu = PCPU_GET(cpuid);
if (savectx(susppcbs[cpu])) {
- ctx_fpusave(suspfpusave[cpu]);
+ ctx_fpusave(susppcbs[cpu]->pcb_fpususpend);
wbinvd();
CPU_SET_ATOMIC(cpu, &stopped_cpus);
+ CPU_SET_ATOMIC(cpu, &suspended_cpus);
} else {
pmap_init_pat();
+#if 0
load_cr3(susppcbs[cpu]->pcb_cr3);
+#endif
initializecpu();
PCPU_SET(switchtime, 0);
PCPU_SET(switchticks, ticks);
+ CPU_CLR_ATOMIC(cpu, &suspended_cpus);
}
/* Wait for resume */
Modified: head/sys/amd64/include/pcb.h
==============================================================================
--- head/sys/amd64/include/pcb.h Fri Jun 8 22:54:25 2012 (r236771)
+++ head/sys/amd64/include/pcb.h Sat Jun 9 00:37:26 2012 (r236772)
@@ -91,9 +91,20 @@ struct pcb {
/* local tss, with i/o bitmap; NULL for common */
struct amd64tss *pcb_tssp;
+ /* model specific registers */
+ register_t pcb_efer;
+ register_t pcb_star;
+ register_t pcb_lstar;
+ register_t pcb_cstar;
+ register_t pcb_sfmask;
+ register_t pcb_xsmask;
+
+ /* fpu context for suspend/resume */
+ void * pcb_fpususpend;
+
struct savefpu *pcb_save;
- uint64_t pcb_pad[2];
+ uint64_t pcb_pad[3];
};
#ifdef _KERNEL
@@ -131,6 +142,7 @@ clear_pcb_flags(struct pcb *pcb, const u
void makectx(struct trapframe *, struct pcb *);
int savectx(struct pcb *) __returns_twice;
+void resumectx(struct pcb *);
#endif
Modified: head/sys/conf/files.amd64
==============================================================================
--- head/sys/conf/files.amd64 Fri Jun 8 22:54:25 2012 (r236771)
+++ head/sys/conf/files.amd64 Sat Jun 9 00:37:26 2012 (r236772)
@@ -72,7 +72,6 @@ hptrr_lib.o optional hptrr \
no-implicit-rule
#
amd64/acpica/acpi_machdep.c optional acpi
-amd64/acpica/acpi_switch.S optional acpi
acpi_wakecode.o optional acpi \
dependency "$S/amd64/acpica/acpi_wakecode.S assym.s" \
compile-with "${NORMAL_S}" \
@@ -94,7 +93,7 @@ acpi_wakedata.h optional acpi \
no-obj no-implicit-rule before-depend \
clean "acpi_wakedata.h"
#
-amd64/acpica/acpi_wakeup.c optional acpi
+x86/acpica/acpi_wakeup.c optional acpi
amd64/amd64/amd64_mem.c optional mem
#amd64/amd64/apic_vector.S standard
amd64/amd64/atomic.c standard
Modified: head/sys/conf/files.i386
==============================================================================
--- head/sys/conf/files.i386 Fri Jun 8 22:54:25 2012 (r236771)
+++ head/sys/conf/files.i386 Sat Jun 9 00:37:26 2012 (r236772)
@@ -381,7 +381,7 @@ acpi_wakedata.h optional acpi \
no-obj no-implicit-rule before-depend \
clean "acpi_wakedata.h"
#
-i386/acpica/acpi_wakeup.c optional acpi
+x86/acpica/acpi_wakeup.c optional acpi
i386/bios/apm.c optional apm
i386/bios/mca_machdep.c optional mca
i386/bios/smapi.c optional smapi
Modified: head/sys/dev/acpica/acpivar.h
==============================================================================
--- head/sys/dev/acpica/acpivar.h Fri Jun 8 22:54:25 2012 (r236771)
+++ head/sys/dev/acpica/acpivar.h Sat Jun 9 00:37:26 2012 (r236772)
@@ -71,8 +71,6 @@ struct acpi_softc {
int acpi_verbose;
int acpi_handle_reboot;
- bus_dma_tag_t acpi_waketag;
- bus_dmamap_t acpi_wakemap;
vm_offset_t acpi_wakeaddr;
vm_paddr_t acpi_wakephys;
Modified: head/sys/i386/acpica/acpi_wakecode.S
==============================================================================
--- head/sys/i386/acpica/acpi_wakecode.S Fri Jun 8 22:54:25 2012 (r236771)
+++ head/sys/i386/acpica/acpi_wakecode.S Sat Jun 9 00:37:26 2012 (r236772)
@@ -202,4 +202,7 @@ wakeup_pcb:
.long 0
wakeup_ret:
.long 0
+wakeup_gdt: /* not used */
+ .word 0
+ .long 0
dummy:
Modified: head/sys/i386/i386/mp_machdep.c
==============================================================================
--- head/sys/i386/i386/mp_machdep.c Fri Jun 8 22:54:25 2012 (r236771)
+++ head/sys/i386/i386/mp_machdep.c Sat Jun 9 00:37:26 2012 (r236772)
@@ -1512,14 +1512,15 @@ cpususpend_handler(void)
cpu = PCPU_GET(cpuid);
- if (suspendctx(susppcbs[cpu])) {
+ if (savectx(susppcbs[cpu])) {
wbinvd();
CPU_SET_ATOMIC(cpu, &stopped_cpus);
+ CPU_SET_ATOMIC(cpu, &suspended_cpus);
} else {
pmap_init_pat();
PCPU_SET(switchtime, 0);
PCPU_SET(switchticks, ticks);
- susppcbs[cpu]->pcb_eip = 0;
+ CPU_CLR_ATOMIC(cpu, &suspended_cpus);
}
/* Wait for resume */
Modified: head/sys/i386/i386/swtch.s
==============================================================================
--- head/sys/i386/i386/swtch.s Fri Jun 8 22:54:25 2012 (r236771)
+++ head/sys/i386/i386/swtch.s Sat Jun 9 00:37:26 2012 (r236772)
@@ -386,6 +386,36 @@ ENTRY(savectx)
pushfl
popl PCB_PSL(%ecx)
+ movl %cr0,%eax
+ movl %eax,PCB_CR0(%ecx)
+ movl %cr2,%eax
+ movl %eax,PCB_CR2(%ecx)
+ movl %cr4,%eax
+ movl %eax,PCB_CR4(%ecx)
+
+ movl %dr0,%eax
+ movl %eax,PCB_DR0(%ecx)
+ movl %dr1,%eax
+ movl %eax,PCB_DR1(%ecx)
+ movl %dr2,%eax
+ movl %eax,PCB_DR2(%ecx)
+ movl %dr3,%eax
+ movl %eax,PCB_DR3(%ecx)
+ movl %dr6,%eax
+ movl %eax,PCB_DR6(%ecx)
+ movl %dr7,%eax
+ movl %eax,PCB_DR7(%ecx)
+
+ mov %ds,PCB_DS(%ecx)
+ mov %es,PCB_ES(%ecx)
+ mov %fs,PCB_FS(%ecx)
+ mov %ss,PCB_SS(%ecx)
+
+ sgdt PCB_GDT(%ecx)
+ sidt PCB_IDT(%ecx)
+ sldt PCB_LDT(%ecx)
+ str PCB_TR(%ecx)
+
#ifdef DEV_NPX
/*
* If fpcurthread == NULL, then the npx h/w state is irrelevant and the
@@ -425,64 +455,9 @@ ENTRY(savectx)
popfl
#endif /* DEV_NPX */
- ret
-END(savectx)
-
-/*
- * suspendctx(pcb)
- * Update pcb, suspending current processor state.
- */
-ENTRY(suspendctx)
- /* Fetch PCB. */
- movl 4(%esp),%ecx
-
- /* Save context by calling savectx(). */
- pushl %ecx
- call savectx
- addl $4,%esp
-
- /* Fetch PCB again. */
- movl 4(%esp),%ecx
-
- /* Update caller's return address and stack pointer. */
- movl (%esp),%eax
- movl %eax,PCB_EIP(%ecx)
- movl %esp,PCB_ESP(%ecx)
-
- /* Save other registers and descriptor tables. */
- movl %cr0,%eax
- movl %eax,PCB_CR0(%ecx)
- movl %cr2,%eax
- movl %eax,PCB_CR2(%ecx)
- movl %cr4,%eax
- movl %eax,PCB_CR4(%ecx)
-
- movl %dr0,%eax
- movl %eax,PCB_DR0(%ecx)
- movl %dr1,%eax
- movl %eax,PCB_DR1(%ecx)
- movl %dr2,%eax
- movl %eax,PCB_DR2(%ecx)
- movl %dr3,%eax
- movl %eax,PCB_DR3(%ecx)
- movl %dr6,%eax
- movl %eax,PCB_DR6(%ecx)
- movl %dr7,%eax
- movl %eax,PCB_DR7(%ecx)
-
- mov %ds,PCB_DS(%ecx)
- mov %es,PCB_ES(%ecx)
- mov %fs,PCB_FS(%ecx)
- mov %ss,PCB_SS(%ecx)
-
- sgdt PCB_GDT(%ecx)
- sidt PCB_IDT(%ecx)
- sldt PCB_LDT(%ecx)
- str PCB_TR(%ecx)
-
movl $1,%eax
ret
-END(suspendctx)
+END(savectx)
/*
* resumectx(pcb in %esi)
Modified: head/sys/i386/include/pcb.h
==============================================================================
--- head/sys/i386/include/pcb.h Fri Jun 8 22:54:25 2012 (r236771)
+++ head/sys/i386/include/pcb.h Sat Jun 9 00:37:26 2012 (r236772)
@@ -96,8 +96,7 @@ struct pcb {
struct trapframe;
void makectx(struct trapframe *, struct pcb *);
-void savectx(struct pcb *) __returns_twice;
-int suspendctx(struct pcb *) __returns_twice;
+int savectx(struct pcb *) __returns_twice;
void resumectx(struct pcb *);
#endif
Modified: head/sys/kern/subr_smp.c
==============================================================================
--- head/sys/kern/subr_smp.c Fri Jun 8 22:54:25 2012 (r236771)
+++ head/sys/kern/subr_smp.c Sat Jun 9 00:37:26 2012 (r236772)
@@ -55,6 +55,7 @@ __FBSDID("$FreeBSD$");
#ifdef SMP
volatile cpuset_t stopped_cpus;
volatile cpuset_t started_cpus;
+volatile cpuset_t suspended_cpus;
cpuset_t hlt_cpus_mask;
cpuset_t logical_cpus_mask;
Modified: head/sys/sys/smp.h
==============================================================================
--- head/sys/sys/smp.h Fri Jun 8 22:54:25 2012 (r236771)
+++ head/sys/sys/smp.h Sat Jun 9 00:37:26 2012 (r236772)
@@ -75,6 +75,7 @@ extern int smp_active;
extern int smp_cpus;
extern volatile cpuset_t started_cpus;
extern volatile cpuset_t stopped_cpus;
+extern volatile cpuset_t suspended_cpus;
extern cpuset_t hlt_cpus_mask;
extern cpuset_t logical_cpus_mask;
#endif /* SMP */
Added: head/sys/x86/acpica/acpi_wakeup.c
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/x86/acpica/acpi_wakeup.c Sat Jun 9 00:37:26 2012 (r236772)
@@ -0,0 +1,434 @@
+/*-
+ * Copyright (c) 2001 Takanori Watanabe <takawata at jp.freebsd.org>
+ * Copyright (c) 2001-2012 Mitsuru IWASAKI <iwasaki at jp.freebsd.org>
+ * Copyright (c) 2003 Peter Wemm
+ * Copyright (c) 2008-2012 Jung-uk Kim <jkim at FreeBSD.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/eventhandler.h>
+#include <sys/kernel.h>
+#include <sys/malloc.h>
+#include <sys/memrange.h>
+#include <sys/smp.h>
+
+#include <vm/vm.h>
+#include <vm/pmap.h>
+
+#include <machine/clock.h>
+#include <machine/intr_machdep.h>
+#include <x86/mca.h>
+#include <machine/pcb.h>
+#include <machine/pmap.h>
+#include <machine/specialreg.h>
+#include <machine/md_var.h>
+
+#ifdef SMP
+#include <x86/apicreg.h>
+#include <machine/smp.h>
+#include <machine/vmparam.h>
+#endif
+
+#include <contrib/dev/acpica/include/acpi.h>
+
+#include <dev/acpica/acpivar.h>
+
+#include "acpi_wakecode.h"
+#include "acpi_wakedata.h"
+
+/* Make sure the code is less than a page and leave room for the stack. */
+CTASSERT(sizeof(wakecode) < PAGE_SIZE - 1024);
+
+extern int acpi_resume_beep;
+extern int acpi_reset_video;
+
+#ifdef SMP
+extern struct pcb **susppcbs;
+static cpuset_t suspcpus;
+#else
+static struct pcb **susppcbs;
+#endif
+
+static void *acpi_alloc_wakeup_handler(void);
+static void acpi_stop_beep(void *);
+
+#ifdef SMP
+static int acpi_wakeup_ap(struct acpi_softc *, int);
+static void acpi_wakeup_cpus(struct acpi_softc *);
+#endif
+
+#ifdef __amd64__
+#define ACPI_PAGETABLES 3
+#else
+#define ACPI_PAGETABLES 0
+#endif
+
+#define WAKECODE_VADDR(sc) ((sc)->acpi_wakeaddr + (ACPI_PAGETABLES * PAGE_SIZE))
+#define WAKECODE_PADDR(sc) ((sc)->acpi_wakephys + (ACPI_PAGETABLES * PAGE_SIZE))
+#define WAKECODE_FIXUP(offset, type, val) do { \
+ type *addr; \
+ addr = (type *)(WAKECODE_VADDR(sc) + offset); \
+ *addr = val; \
+} while (0)
+
+static void
+acpi_stop_beep(void *arg)
+{
+
+ if (acpi_resume_beep != 0)
+ timer_spkr_release();
+}
+
+#ifdef SMP
+static int
+acpi_wakeup_ap(struct acpi_softc *sc, int cpu)
+{
+ int vector = (WAKECODE_PADDR(sc) >> 12) & 0xff;
+ int apic_id = cpu_apic_ids[cpu];
+ int ms;
+
+ WAKECODE_FIXUP(wakeup_pcb, struct pcb *, susppcbs[cpu]);
+ WAKECODE_FIXUP(wakeup_gdt, uint16_t, susppcbs[cpu]->pcb_gdt.rd_limit);
+ WAKECODE_FIXUP(wakeup_gdt + 2, uint64_t,
+ susppcbs[cpu]->pcb_gdt.rd_base);
+
+ /* do an INIT IPI: assert RESET */
+ lapic_ipi_raw(APIC_DEST_DESTFLD | APIC_TRIGMOD_EDGE |
+ APIC_LEVEL_ASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_INIT, apic_id);
+
+ /* wait for pending status end */
+ lapic_ipi_wait(-1);
+
+ /* do an INIT IPI: deassert RESET */
+ lapic_ipi_raw(APIC_DEST_ALLESELF | APIC_TRIGMOD_LEVEL |
+ APIC_LEVEL_DEASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_INIT, 0);
+
+ /* wait for pending status end */
+ DELAY(10000); /* wait ~10mS */
+ lapic_ipi_wait(-1);
+
+ /*
+ * next we do a STARTUP IPI: the previous INIT IPI might still be
+ * latched, (P5 bug) this 1st STARTUP would then terminate
+ * immediately, and the previously started INIT IPI would continue. OR
+ * the previous INIT IPI has already run. and this STARTUP IPI will
+ * run. OR the previous INIT IPI was ignored. and this STARTUP IPI
+ * will run.
+ */
+
+ /* do a STARTUP IPI */
+ lapic_ipi_raw(APIC_DEST_DESTFLD | APIC_TRIGMOD_EDGE |
+ APIC_LEVEL_DEASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_STARTUP |
+ vector, apic_id);
+ lapic_ipi_wait(-1);
+ DELAY(200); /* wait ~200uS */
+
+ /*
+ * finally we do a 2nd STARTUP IPI: this 2nd STARTUP IPI should run IF
+ * the previous STARTUP IPI was cancelled by a latched INIT IPI. OR
+ * this STARTUP IPI will be ignored, as only ONE STARTUP IPI is
+ * recognized after hardware RESET or INIT IPI.
+ */
+
+ lapic_ipi_raw(APIC_DEST_DESTFLD | APIC_TRIGMOD_EDGE |
+ APIC_LEVEL_DEASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_STARTUP |
+ vector, apic_id);
+ lapic_ipi_wait(-1);
+ DELAY(200); /* wait ~200uS */
+
+ /* Wait up to 5 seconds for it to resume. */
+ for (ms = 0; ms < 5000; ms++) {
+ if (!CPU_ISSET(cpu, &suspended_cpus))
+ return (1); /* return SUCCESS */
+ DELAY(1000);
+ }
+ return (0); /* return FAILURE */
+}
+
+#define WARMBOOT_TARGET 0
+#define WARMBOOT_OFF (KERNBASE + 0x0467)
+#define WARMBOOT_SEG (KERNBASE + 0x0469)
+
+#define CMOS_REG (0x70)
+#define CMOS_DATA (0x71)
+#define BIOS_RESET (0x0f)
+#define BIOS_WARM (0x0a)
+
+static void
+acpi_wakeup_cpus(struct acpi_softc *sc)
+{
+ uint32_t mpbioswarmvec;
+ int cpu;
+ u_char mpbiosreason;
+
+ /* save the current value of the warm-start vector */
+ mpbioswarmvec = *((uint32_t *)WARMBOOT_OFF);
+ outb(CMOS_REG, BIOS_RESET);
+ mpbiosreason = inb(CMOS_DATA);
+
+ /* setup a vector to our boot code */
+ *((volatile u_short *)WARMBOOT_OFF) = WARMBOOT_TARGET;
+ *((volatile u_short *)WARMBOOT_SEG) = WAKECODE_PADDR(sc) >> 4;
+ outb(CMOS_REG, BIOS_RESET);
+ outb(CMOS_DATA, BIOS_WARM); /* 'warm-start' */
+
+ /* Wake up each AP. */
+ for (cpu = 1; cpu < mp_ncpus; cpu++) {
+ if (!CPU_ISSET(cpu, &suspcpus))
+ continue;
+ if (acpi_wakeup_ap(sc, cpu) == 0) {
+ /* restore the warmstart vector */
+ *(uint32_t *)WARMBOOT_OFF = mpbioswarmvec;
+ panic("acpi_wakeup: failed to resume AP #%d (PHY #%d)",
+ cpu, cpu_apic_ids[cpu]);
+ }
+ }
+
+ /* restore the warmstart vector */
+ *(uint32_t *)WARMBOOT_OFF = mpbioswarmvec;
+
+ outb(CMOS_REG, BIOS_RESET);
+ outb(CMOS_DATA, mpbiosreason);
+}
+#endif
+
+int
+acpi_sleep_machdep(struct acpi_softc *sc, int state)
+{
+ ACPI_STATUS status;
+
+ if (sc->acpi_wakeaddr == 0ul)
+ return (-1); /* couldn't alloc wake memory */
+
+#ifdef SMP
+ suspcpus = all_cpus;
+ CPU_CLR(PCPU_GET(cpuid), &suspcpus);
+#endif
+
+ if (acpi_resume_beep != 0)
+ timer_spkr_acquire();
+
+ AcpiSetFirmwareWakingVector(WAKECODE_PADDR(sc));
+
+ intr_suspend();
+
+ if (savectx(susppcbs[0])) {
+#ifdef __amd64__
+ ctx_fpusave(susppcbs[0]->pcb_fpususpend);
+#endif
+#ifdef SMP
+ if (!CPU_EMPTY(&suspcpus) && suspend_cpus(suspcpus) == 0) {
+ device_printf(sc->acpi_dev, "Failed to suspend APs\n");
+ return (0); /* couldn't sleep */
+ }
+#endif
+
+ WAKECODE_FIXUP(resume_beep, uint8_t, (acpi_resume_beep != 0));
+ WAKECODE_FIXUP(reset_video, uint8_t, (acpi_reset_video != 0));
+
+ WAKECODE_FIXUP(wakeup_cr4, register_t, susppcbs[0]->pcb_cr4);
+ WAKECODE_FIXUP(wakeup_pcb, struct pcb *, susppcbs[0]);
+ WAKECODE_FIXUP(wakeup_gdt, uint16_t,
+ susppcbs[0]->pcb_gdt.rd_limit);
+ WAKECODE_FIXUP(wakeup_gdt + 2, uint64_t,
+ susppcbs[0]->pcb_gdt.rd_base);
+
+ /* Call ACPICA to enter the desired sleep state */
+ if (state == ACPI_STATE_S4 && sc->acpi_s4bios)
+ status = AcpiEnterSleepStateS4bios();
+ else
+ status = AcpiEnterSleepState(state, acpi_sleep_flags);
+ if (ACPI_FAILURE(status)) {
+ device_printf(sc->acpi_dev,
+ "AcpiEnterSleepState failed - %s\n",
+ AcpiFormatException(status));
+ return (0); /* couldn't sleep */
+ }
+
+ for (;;)
+ ia32_pause();
+ }
+
+ return (1); /* wakeup successfully */
+}
+
+int
+acpi_wakeup_machdep(struct acpi_softc *sc, int state, int sleep_result,
+ int intr_enabled)
+{
+
+ if (sleep_result == -1)
+ return (sleep_result);
+
+ if (!intr_enabled) {
+ /* Wakeup MD procedures in interrupt disabled context */
+ if (sleep_result == 1) {
+ pmap_init_pat();
+#if 0
+ load_cr3(susppcbs[0]->pcb_cr3);
+#endif
+ initializecpu();
+ PCPU_SET(switchtime, 0);
+ PCPU_SET(switchticks, ticks);
+#ifdef SMP
+ if (!CPU_EMPTY(&suspcpus))
+ acpi_wakeup_cpus(sc);
+#endif
+ }
+
+#ifdef SMP
+ if (!CPU_EMPTY(&suspcpus))
+ restart_cpus(suspcpus);
+#endif
+ mca_resume();
+ intr_resume();
+
+ AcpiSetFirmwareWakingVector(0);
+ } else {
+ /* Wakeup MD procedures in interrupt enabled context */
+ if (sleep_result == 1 && mem_range_softc.mr_op != NULL &&
+ mem_range_softc.mr_op->reinit != NULL)
+ mem_range_softc.mr_op->reinit(&mem_range_softc);
+ }
+
+ return (sleep_result);
+}
+
+static void *
+acpi_alloc_wakeup_handler(void)
+{
+ void *wakeaddr;
+ int i;
+
+ /*
+ * Specify the region for our wakeup code. We want it in the low 1 MB
+ * region, excluding real mode IVT (0-0x3ff), BDA (0x400-0x4ff), EBDA
+ * (less than 128KB, below 0xa0000, must be excluded by SMAP and DSDT),
+ * and ROM area (0xa0000 and above). The temporary page tables must be
+ * page-aligned.
+ */
+ wakeaddr = contigmalloc((ACPI_PAGETABLES + 1) * PAGE_SIZE, M_DEVBUF,
+ M_WAITOK, 0x500, 0xa0000, PAGE_SIZE, 0ul);
+ if (wakeaddr == NULL) {
+ printf("%s: can't alloc wake memory\n", __func__);
+ return (NULL);
+ }
+ if (EVENTHANDLER_REGISTER(power_resume, acpi_stop_beep, NULL,
+ EVENTHANDLER_PRI_LAST) == NULL) {
+ printf("%s: can't register event handler\n", __func__);
+ contigfree(wakeaddr, (ACPI_PAGETABLES + 1) * PAGE_SIZE, M_DEVBUF);
+ return (NULL);
+ }
+ susppcbs = malloc(mp_ncpus * sizeof(*susppcbs), M_DEVBUF, M_WAITOK);
+ for (i = 0; i < mp_ncpus; i++) {
+ susppcbs[i] = malloc(sizeof(**susppcbs), M_DEVBUF, M_WAITOK);
+#ifdef __amd64__
+ susppcbs[i]->pcb_fpususpend = alloc_fpusave(M_WAITOK);
+#endif
+ }
+
+ return (wakeaddr);
+}
+
+void
+acpi_install_wakeup_handler(struct acpi_softc *sc)
+{
+ static void *wakeaddr = NULL;
+#ifdef __amd64__
+ uint64_t *pt4, *pt3, *pt2;
+ int i;
+#endif
+
+ if (wakeaddr != NULL)
+ return;
+
+ wakeaddr = acpi_alloc_wakeup_handler();
+ if (wakeaddr == NULL)
+ return;
+
+ sc->acpi_wakeaddr = (vm_offset_t)wakeaddr;
+ sc->acpi_wakephys = vtophys(wakeaddr);
+
+ bcopy(wakecode, (void *)WAKECODE_VADDR(sc), sizeof(wakecode));
+
+ /* Patch GDT base address, ljmp targets. */
+ WAKECODE_FIXUP((bootgdtdesc + 2), uint32_t,
+ WAKECODE_PADDR(sc) + bootgdt);
+ WAKECODE_FIXUP((wakeup_sw32 + 2), uint32_t,
+ WAKECODE_PADDR(sc) + wakeup_32);
+#ifdef __amd64__
+ WAKECODE_FIXUP((wakeup_sw64 + 1), uint32_t,
+ WAKECODE_PADDR(sc) + wakeup_64);
+ WAKECODE_FIXUP(wakeup_pagetables, uint32_t, sc->acpi_wakephys);
+#endif
+
+ /* Save pointers to some global data. */
+ WAKECODE_FIXUP(wakeup_ret, void *, resumectx);
+#ifdef __amd64__
+ WAKECODE_FIXUP(wakeup_cr3, uint64_t, KPML4phys);
+#else
+#ifdef PAE
+ WAKECODE_FIXUP(wakeup_cr3, register_t, vtophys(kernel_pmap->pm_pdpt));
+#else
+ WAKECODE_FIXUP(wakeup_cr3, register_t, vtophys(kernel_pmap->pm_pdir));
+#endif
+#endif
+
+#ifdef __amd64__
+ /* Build temporary page tables below realmode code. */
+ pt4 = wakeaddr;
+ pt3 = pt4 + (PAGE_SIZE) / sizeof(uint64_t);
+ pt2 = pt3 + (PAGE_SIZE) / sizeof(uint64_t);
+
+ /* Create the initial 1GB replicated page tables */
+ for (i = 0; i < 512; i++) {
+ /*
+ * Each slot of the level 4 pages points
+ * to the same level 3 page
+ */
+ pt4[i] = (uint64_t)(sc->acpi_wakephys + PAGE_SIZE);
+ pt4[i] |= PG_V | PG_RW | PG_U;
+
+ /*
+ * Each slot of the level 3 pages points
+ * to the same level 2 page
+ */
+ pt3[i] = (uint64_t)(sc->acpi_wakephys + (2 * PAGE_SIZE));
+ pt3[i] |= PG_V | PG_RW | PG_U;
+
+ /* The level 2 page slots are mapped with 2MB pages for 1GB. */
+ pt2[i] = i * (2 * 1024 * 1024);
+ pt2[i] |= PG_V | PG_RW | PG_PS | PG_U;
+ }
+#endif
+
+ if (bootverbose)
+ device_printf(sc->acpi_dev, "wakeup code va %#jx pa %#jx\n",
+ (uintmax_t)sc->acpi_wakeaddr, (uintmax_t)sc->acpi_wakephys);
+}
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