svn commit: r215976 - in vendor-sys/octeon-sdk/dist: . cvmx-malloc
Juli Mallett
jmallett at FreeBSD.org
Sun Nov 28 06:20:42 UTC 2010
Author: jmallett
Date: Sun Nov 28 06:20:41 2010
New Revision: 215976
URL: http://svn.freebsd.org/changeset/base/215976
Log:
Import Cavium Octeon SDK 2.0 Simple Executive from cnusers.org.
Added:
vendor-sys/octeon-sdk/dist/cvmx-agl-defs.h
vendor-sys/octeon-sdk/dist/cvmx-app-hotplug.c
vendor-sys/octeon-sdk/dist/cvmx-app-hotplug.h
vendor-sys/octeon-sdk/dist/cvmx-asx0-defs.h
vendor-sys/octeon-sdk/dist/cvmx-asxx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-ciu-defs.h
vendor-sys/octeon-sdk/dist/cvmx-clock.c
vendor-sys/octeon-sdk/dist/cvmx-clock.h
vendor-sys/octeon-sdk/dist/cvmx-crypto.c
vendor-sys/octeon-sdk/dist/cvmx-crypto.h
vendor-sys/octeon-sdk/dist/cvmx-dbg-defs.h
vendor-sys/octeon-sdk/dist/cvmx-debug-handler.S
vendor-sys/octeon-sdk/dist/cvmx-debug-remote.c
vendor-sys/octeon-sdk/dist/cvmx-debug-uart.c
vendor-sys/octeon-sdk/dist/cvmx-debug.c
vendor-sys/octeon-sdk/dist/cvmx-debug.h
vendor-sys/octeon-sdk/dist/cvmx-dfa-defs.h
vendor-sys/octeon-sdk/dist/cvmx-dfm-defs.h
vendor-sys/octeon-sdk/dist/cvmx-dpi-defs.h
vendor-sys/octeon-sdk/dist/cvmx-error-custom.c
vendor-sys/octeon-sdk/dist/cvmx-error-custom.h
vendor-sys/octeon-sdk/dist/cvmx-error-init-cn30xx.c
vendor-sys/octeon-sdk/dist/cvmx-error-init-cn31xx.c
vendor-sys/octeon-sdk/dist/cvmx-error-init-cn38xx.c
vendor-sys/octeon-sdk/dist/cvmx-error-init-cn38xxp2.c
vendor-sys/octeon-sdk/dist/cvmx-error-init-cn50xx.c
vendor-sys/octeon-sdk/dist/cvmx-error-init-cn52xx.c
vendor-sys/octeon-sdk/dist/cvmx-error-init-cn52xxp1.c
vendor-sys/octeon-sdk/dist/cvmx-error-init-cn56xx.c
vendor-sys/octeon-sdk/dist/cvmx-error-init-cn56xxp1.c
vendor-sys/octeon-sdk/dist/cvmx-error-init-cn58xx.c
vendor-sys/octeon-sdk/dist/cvmx-error-init-cn58xxp1.c
vendor-sys/octeon-sdk/dist/cvmx-error-init-cn63xx.c
vendor-sys/octeon-sdk/dist/cvmx-error-init-cn63xxp1.c
vendor-sys/octeon-sdk/dist/cvmx-error.c
vendor-sys/octeon-sdk/dist/cvmx-error.h
vendor-sys/octeon-sdk/dist/cvmx-fpa-defs.h
vendor-sys/octeon-sdk/dist/cvmx-gmxx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-gpio-defs.h
vendor-sys/octeon-sdk/dist/cvmx-helper-jtag.c
vendor-sys/octeon-sdk/dist/cvmx-helper-jtag.h
vendor-sys/octeon-sdk/dist/cvmx-helper-srio.c
vendor-sys/octeon-sdk/dist/cvmx-helper-srio.h
vendor-sys/octeon-sdk/dist/cvmx-iob-defs.h
vendor-sys/octeon-sdk/dist/cvmx-ipd-defs.h
vendor-sys/octeon-sdk/dist/cvmx-ixf18201.c
vendor-sys/octeon-sdk/dist/cvmx-ixf18201.h
vendor-sys/octeon-sdk/dist/cvmx-key-defs.h
vendor-sys/octeon-sdk/dist/cvmx-l2c-defs.h
vendor-sys/octeon-sdk/dist/cvmx-l2d-defs.h
vendor-sys/octeon-sdk/dist/cvmx-l2t-defs.h
vendor-sys/octeon-sdk/dist/cvmx-led-defs.h
vendor-sys/octeon-sdk/dist/cvmx-lmcx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-mio-defs.h
vendor-sys/octeon-sdk/dist/cvmx-mixx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-mpi-defs.h
vendor-sys/octeon-sdk/dist/cvmx-ndf-defs.h
vendor-sys/octeon-sdk/dist/cvmx-npei-defs.h
vendor-sys/octeon-sdk/dist/cvmx-npi-defs.h
vendor-sys/octeon-sdk/dist/cvmx-pci-defs.h
vendor-sys/octeon-sdk/dist/cvmx-pcieepx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-pciercx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-pcm-defs.h
vendor-sys/octeon-sdk/dist/cvmx-pcmx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-pcsx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-pcsxx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-pemx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-pescx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-pexp-defs.h
vendor-sys/octeon-sdk/dist/cvmx-pip-defs.h
vendor-sys/octeon-sdk/dist/cvmx-pko-defs.h
vendor-sys/octeon-sdk/dist/cvmx-pow-defs.h
vendor-sys/octeon-sdk/dist/cvmx-power-throttle.c
vendor-sys/octeon-sdk/dist/cvmx-power-throttle.h
vendor-sys/octeon-sdk/dist/cvmx-rad-defs.h
vendor-sys/octeon-sdk/dist/cvmx-rnm-defs.h
vendor-sys/octeon-sdk/dist/cvmx-shmem.c
vendor-sys/octeon-sdk/dist/cvmx-shmem.h
vendor-sys/octeon-sdk/dist/cvmx-sim-magic.h
vendor-sys/octeon-sdk/dist/cvmx-sli-defs.h
vendor-sys/octeon-sdk/dist/cvmx-smi-defs.h
vendor-sys/octeon-sdk/dist/cvmx-smix-defs.h
vendor-sys/octeon-sdk/dist/cvmx-spx0-defs.h
vendor-sys/octeon-sdk/dist/cvmx-spxx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-srio.c
vendor-sys/octeon-sdk/dist/cvmx-srio.h
vendor-sys/octeon-sdk/dist/cvmx-sriomaintx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-sriox-defs.h
vendor-sys/octeon-sdk/dist/cvmx-srxx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-stxx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-tim-defs.h
vendor-sys/octeon-sdk/dist/cvmx-tlb.c
vendor-sys/octeon-sdk/dist/cvmx-tlb.h
vendor-sys/octeon-sdk/dist/cvmx-tra-defs.h
vendor-sys/octeon-sdk/dist/cvmx-uahcx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-uart.c
vendor-sys/octeon-sdk/dist/cvmx-uctlx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-usbcx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-usbd.c
vendor-sys/octeon-sdk/dist/cvmx-usbd.h
vendor-sys/octeon-sdk/dist/cvmx-usbnx-defs.h
vendor-sys/octeon-sdk/dist/cvmx-zip-defs.h
vendor-sys/octeon-sdk/dist/octeon-boot-info.h
Replaced:
vendor-sys/octeon-sdk/dist/cvmx-interrupt-handler.S
vendor-sys/octeon-sdk/dist/cvmx-log-arc.S
Deleted:
vendor-sys/octeon-sdk/dist/README.txt
vendor-sys/octeon-sdk/dist/cvmx-asx.h
vendor-sys/octeon-sdk/dist/cvmx-ciu.h
vendor-sys/octeon-sdk/dist/cvmx-csr-addresses.h
vendor-sys/octeon-sdk/dist/cvmx-cvmmem.h
vendor-sys/octeon-sdk/dist/cvmx-interrupt-decodes.c
vendor-sys/octeon-sdk/dist/cvmx-interrupt-rsl.c
vendor-sys/octeon-sdk/dist/cvmx-iob.h
vendor-sys/octeon-sdk/dist/cvmx-lmc.h
vendor-sys/octeon-sdk/dist/cvmx-malloc/
vendor-sys/octeon-sdk/dist/cvmx-mio.h
vendor-sys/octeon-sdk/dist/cvmx-resources.config
vendor-sys/octeon-sdk/dist/cvmx-shared-linux-n32.ld
vendor-sys/octeon-sdk/dist/cvmx-shared-linux-o32.ld
vendor-sys/octeon-sdk/dist/cvmx-shared-linux.ld
vendor-sys/octeon-sdk/dist/cvmx-twsi-raw.c
vendor-sys/octeon-sdk/dist/cvmx-twsi-raw.h
vendor-sys/octeon-sdk/dist/cvmx.mk
vendor-sys/octeon-sdk/dist/executive-config.h.template
Modified:
vendor-sys/octeon-sdk/dist/cvmip.h
vendor-sys/octeon-sdk/dist/cvmx-abi.h
vendor-sys/octeon-sdk/dist/cvmx-access-native.h
vendor-sys/octeon-sdk/dist/cvmx-access.h
vendor-sys/octeon-sdk/dist/cvmx-address.h
vendor-sys/octeon-sdk/dist/cvmx-app-init-linux.c
vendor-sys/octeon-sdk/dist/cvmx-app-init.c
vendor-sys/octeon-sdk/dist/cvmx-app-init.h
vendor-sys/octeon-sdk/dist/cvmx-asm.h
vendor-sys/octeon-sdk/dist/cvmx-atomic.h
vendor-sys/octeon-sdk/dist/cvmx-bootloader.h
vendor-sys/octeon-sdk/dist/cvmx-bootmem.c
vendor-sys/octeon-sdk/dist/cvmx-bootmem.h
vendor-sys/octeon-sdk/dist/cvmx-cmd-queue.c
vendor-sys/octeon-sdk/dist/cvmx-cmd-queue.h
vendor-sys/octeon-sdk/dist/cvmx-cn3010-evb-hs5.c
vendor-sys/octeon-sdk/dist/cvmx-cn3010-evb-hs5.h
vendor-sys/octeon-sdk/dist/cvmx-compactflash.c
vendor-sys/octeon-sdk/dist/cvmx-compactflash.h
vendor-sys/octeon-sdk/dist/cvmx-core.c
vendor-sys/octeon-sdk/dist/cvmx-core.h
vendor-sys/octeon-sdk/dist/cvmx-coremask.c
vendor-sys/octeon-sdk/dist/cvmx-coremask.h
vendor-sys/octeon-sdk/dist/cvmx-csr-db-support.c
vendor-sys/octeon-sdk/dist/cvmx-csr-db.c
vendor-sys/octeon-sdk/dist/cvmx-csr-db.h
vendor-sys/octeon-sdk/dist/cvmx-csr-enums.h
vendor-sys/octeon-sdk/dist/cvmx-csr-typedefs.h
vendor-sys/octeon-sdk/dist/cvmx-csr.h
vendor-sys/octeon-sdk/dist/cvmx-dfa.c
vendor-sys/octeon-sdk/dist/cvmx-dfa.h
vendor-sys/octeon-sdk/dist/cvmx-dma-engine.c
vendor-sys/octeon-sdk/dist/cvmx-dma-engine.h
vendor-sys/octeon-sdk/dist/cvmx-ebt3000.c
vendor-sys/octeon-sdk/dist/cvmx-ebt3000.h
vendor-sys/octeon-sdk/dist/cvmx-fau.h
vendor-sys/octeon-sdk/dist/cvmx-flash.c
vendor-sys/octeon-sdk/dist/cvmx-flash.h
vendor-sys/octeon-sdk/dist/cvmx-fpa.c
vendor-sys/octeon-sdk/dist/cvmx-fpa.h
vendor-sys/octeon-sdk/dist/cvmx-gmx.h
vendor-sys/octeon-sdk/dist/cvmx-gpio.h
vendor-sys/octeon-sdk/dist/cvmx-helper-board.c
vendor-sys/octeon-sdk/dist/cvmx-helper-board.h
vendor-sys/octeon-sdk/dist/cvmx-helper-check-defines.h
vendor-sys/octeon-sdk/dist/cvmx-helper-errata.c
vendor-sys/octeon-sdk/dist/cvmx-helper-errata.h
vendor-sys/octeon-sdk/dist/cvmx-helper-fpa.c
vendor-sys/octeon-sdk/dist/cvmx-helper-fpa.h
vendor-sys/octeon-sdk/dist/cvmx-helper-loop.c
vendor-sys/octeon-sdk/dist/cvmx-helper-loop.h
vendor-sys/octeon-sdk/dist/cvmx-helper-npi.c
vendor-sys/octeon-sdk/dist/cvmx-helper-npi.h
vendor-sys/octeon-sdk/dist/cvmx-helper-rgmii.c
vendor-sys/octeon-sdk/dist/cvmx-helper-rgmii.h
vendor-sys/octeon-sdk/dist/cvmx-helper-sgmii.c
vendor-sys/octeon-sdk/dist/cvmx-helper-sgmii.h
vendor-sys/octeon-sdk/dist/cvmx-helper-spi.c
vendor-sys/octeon-sdk/dist/cvmx-helper-spi.h
vendor-sys/octeon-sdk/dist/cvmx-helper-util.c
vendor-sys/octeon-sdk/dist/cvmx-helper-util.h
vendor-sys/octeon-sdk/dist/cvmx-helper-xaui.c
vendor-sys/octeon-sdk/dist/cvmx-helper-xaui.h
vendor-sys/octeon-sdk/dist/cvmx-helper.c
vendor-sys/octeon-sdk/dist/cvmx-helper.h
vendor-sys/octeon-sdk/dist/cvmx-higig.h
vendor-sys/octeon-sdk/dist/cvmx-interrupt.c
vendor-sys/octeon-sdk/dist/cvmx-interrupt.h
vendor-sys/octeon-sdk/dist/cvmx-ipd.h
vendor-sys/octeon-sdk/dist/cvmx-key.h
vendor-sys/octeon-sdk/dist/cvmx-l2c.c
vendor-sys/octeon-sdk/dist/cvmx-l2c.h
vendor-sys/octeon-sdk/dist/cvmx-llm.c
vendor-sys/octeon-sdk/dist/cvmx-llm.h
vendor-sys/octeon-sdk/dist/cvmx-log.c
vendor-sys/octeon-sdk/dist/cvmx-log.h
vendor-sys/octeon-sdk/dist/cvmx-malloc.h
vendor-sys/octeon-sdk/dist/cvmx-mdio.h
vendor-sys/octeon-sdk/dist/cvmx-mgmt-port.c
vendor-sys/octeon-sdk/dist/cvmx-mgmt-port.h
vendor-sys/octeon-sdk/dist/cvmx-nand.c
vendor-sys/octeon-sdk/dist/cvmx-nand.h
vendor-sys/octeon-sdk/dist/cvmx-npi.h
vendor-sys/octeon-sdk/dist/cvmx-packet.h
vendor-sys/octeon-sdk/dist/cvmx-pci.h
vendor-sys/octeon-sdk/dist/cvmx-pcie.c
vendor-sys/octeon-sdk/dist/cvmx-pcie.h
vendor-sys/octeon-sdk/dist/cvmx-pip.h
vendor-sys/octeon-sdk/dist/cvmx-pko.c
vendor-sys/octeon-sdk/dist/cvmx-pko.h
vendor-sys/octeon-sdk/dist/cvmx-platform.h
vendor-sys/octeon-sdk/dist/cvmx-pow.c
vendor-sys/octeon-sdk/dist/cvmx-pow.h
vendor-sys/octeon-sdk/dist/cvmx-raid.c
vendor-sys/octeon-sdk/dist/cvmx-raid.h
vendor-sys/octeon-sdk/dist/cvmx-rng.h
vendor-sys/octeon-sdk/dist/cvmx-rtc.h
vendor-sys/octeon-sdk/dist/cvmx-rwlock.h
vendor-sys/octeon-sdk/dist/cvmx-scratch.h
vendor-sys/octeon-sdk/dist/cvmx-spi.c
vendor-sys/octeon-sdk/dist/cvmx-spi.h
vendor-sys/octeon-sdk/dist/cvmx-spi4000.c
vendor-sys/octeon-sdk/dist/cvmx-spinlock.h
vendor-sys/octeon-sdk/dist/cvmx-swap.h
vendor-sys/octeon-sdk/dist/cvmx-sysinfo.c
vendor-sys/octeon-sdk/dist/cvmx-sysinfo.h
vendor-sys/octeon-sdk/dist/cvmx-thunder.c
vendor-sys/octeon-sdk/dist/cvmx-thunder.h
vendor-sys/octeon-sdk/dist/cvmx-tim.c
vendor-sys/octeon-sdk/dist/cvmx-tim.h
vendor-sys/octeon-sdk/dist/cvmx-tra.c
vendor-sys/octeon-sdk/dist/cvmx-tra.h
vendor-sys/octeon-sdk/dist/cvmx-twsi.c
vendor-sys/octeon-sdk/dist/cvmx-twsi.h
vendor-sys/octeon-sdk/dist/cvmx-uart.h
vendor-sys/octeon-sdk/dist/cvmx-usb.c
vendor-sys/octeon-sdk/dist/cvmx-usb.h
vendor-sys/octeon-sdk/dist/cvmx-utils.h
vendor-sys/octeon-sdk/dist/cvmx-version.h
vendor-sys/octeon-sdk/dist/cvmx-warn.c
vendor-sys/octeon-sdk/dist/cvmx-warn.h
vendor-sys/octeon-sdk/dist/cvmx-wqe.h
vendor-sys/octeon-sdk/dist/cvmx-zip.c
vendor-sys/octeon-sdk/dist/cvmx-zip.h
vendor-sys/octeon-sdk/dist/cvmx-zone.c
vendor-sys/octeon-sdk/dist/cvmx.h
vendor-sys/octeon-sdk/dist/octeon-feature.h
vendor-sys/octeon-sdk/dist/octeon-model.c
vendor-sys/octeon-sdk/dist/octeon-model.h
vendor-sys/octeon-sdk/dist/octeon-pci-console.c
vendor-sys/octeon-sdk/dist/octeon-pci-console.h
Modified: vendor-sys/octeon-sdk/dist/cvmip.h
==============================================================================
--- vendor-sys/octeon-sdk/dist/cvmip.h Sun Nov 28 06:18:58 2010 (r215975)
+++ vendor-sys/octeon-sdk/dist/cvmip.h Sun Nov 28 06:20:41 2010 (r215976)
@@ -1,39 +1,40 @@
/***********************license start***************
- * Copyright (c) 2003-2008 Cavium Networks (support at cavium.com). All rights
- * reserved.
+ * Copyright (c) 2003-2010 Cavium Networks (support at cavium.com). All rights
+ * reserved.
*
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- *
- * * Redistributions in binary form must reproduce the above
- * copyright notice, this list of conditions and the following
- * disclaimer in the documentation and/or other materials provided
- * with the distribution.
- *
- * * Neither the name of Cavium Networks nor the names of
- * its contributors may be used to endorse or promote products
- * derived from this software without specific prior written
- * permission.
- *
- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
- * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS
- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH
- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY
- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT
- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES
- * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR
- * PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET
- * POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT
- * OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
- *
- *
- * For any questions regarding licensing please contact marketing at caviumnetworks.com
- *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+
+ * * Neither the name of Cavium Networks nor the names of
+ * its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written
+ * permission.
+
+ * This Software, including technical data, may be subject to U.S. export control
+ * laws, including the U.S. Export Administration Act and its associated
+ * regulations, and may be subject to export or import regulations in other
+ * countries.
+
+ * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
+ * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
+ * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
+ * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
+ * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
+ * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
+ * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
+ * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
+ * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
+ * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
***********************license end**************************************/
@@ -41,6 +42,7 @@
+
/**
* @file
*
@@ -48,7 +50,7 @@
*
* Definitions for the Internet Protocol (IP) support.
*
- * <hr>$Revision: 41586 $<hr>
+ * <hr>$Revision: 49448 $<hr>
*
*/
Modified: vendor-sys/octeon-sdk/dist/cvmx-abi.h
==============================================================================
--- vendor-sys/octeon-sdk/dist/cvmx-abi.h Sun Nov 28 06:18:58 2010 (r215975)
+++ vendor-sys/octeon-sdk/dist/cvmx-abi.h Sun Nov 28 06:20:41 2010 (r215976)
@@ -1,39 +1,40 @@
/***********************license start***************
- * Copyright (c) 2003-2008 Cavium Networks (support at cavium.com). All rights
- * reserved.
+ * Copyright (c) 2003-2010 Cavium Networks (support at cavium.com). All rights
+ * reserved.
*
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- *
- * * Redistributions in binary form must reproduce the above
- * copyright notice, this list of conditions and the following
- * disclaimer in the documentation and/or other materials provided
- * with the distribution.
- *
- * * Neither the name of Cavium Networks nor the names of
- * its contributors may be used to endorse or promote products
- * derived from this software without specific prior written
- * permission.
- *
- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
- * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS
- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH
- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY
- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT
- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES
- * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR
- * PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET
- * POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT
- * OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
- *
- *
- * For any questions regarding licensing please contact marketing at caviumnetworks.com
- *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+
+ * * Neither the name of Cavium Networks nor the names of
+ * its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written
+ * permission.
+
+ * This Software, including technical data, may be subject to U.S. export control
+ * laws, including the U.S. Export Administration Act and its associated
+ * regulations, and may be subject to export or import regulations in other
+ * countries.
+
+ * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
+ * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
+ * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
+ * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
+ * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
+ * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
+ * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
+ * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
+ * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
+ * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
***********************license end**************************************/
@@ -41,12 +42,13 @@
+
/**
* @file
*
* This file defines macros for use in determining the current calling ABI.
*
- * <hr>$Revision: 41586 $<hr>
+ * <hr>$Revision: 49448 $<hr>
*/
#ifndef __CVMX_ABI_H__
Modified: vendor-sys/octeon-sdk/dist/cvmx-access-native.h
==============================================================================
--- vendor-sys/octeon-sdk/dist/cvmx-access-native.h Sun Nov 28 06:18:58 2010 (r215975)
+++ vendor-sys/octeon-sdk/dist/cvmx-access-native.h Sun Nov 28 06:20:41 2010 (r215976)
@@ -1,41 +1,43 @@
/***********************license start***************
- * Copyright (c) 2003-2009 Cavium Networks (support at cavium.com). All rights
- * reserved.
+ * Copyright (c) 2003-2010 Cavium Networks (support at cavium.com). All rights
+ * reserved.
*
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- *
- * * Redistributions in binary form must reproduce the above
- * copyright notice, this list of conditions and the following
- * disclaimer in the documentation and/or other materials provided
- * with the distribution.
- *
- * * Neither the name of Cavium Networks nor the names of
- * its contributors may be used to endorse or promote products
- * derived from this software without specific prior written
- * permission.
- *
- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
- * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS
- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH
- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY
- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT
- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES
- * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR
- * PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET
- * POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT
- * OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
- *
- *
- * For any questions regarding licensing please contact marketing at caviumnetworks.com
- *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+
+ * * Neither the name of Cavium Networks nor the names of
+ * its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written
+ * permission.
+
+ * This Software, including technical data, may be subject to U.S. export control
+ * laws, including the U.S. Export Administration Act and its associated
+ * regulations, and may be subject to export or import regulations in other
+ * countries.
+
+ * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
+ * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
+ * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
+ * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
+ * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
+ * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
+ * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
+ * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
+ * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
+ * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
***********************license end**************************************/
+
/**
* @file
* Functions for accessing memory and CSRs on Octeon when we are compiling
@@ -81,9 +83,24 @@ static inline uint64_t cvmx_ptr_to_phys(
cvmx_warn_if(ptr==NULL, "cvmx_ptr_to_phys() passed a NULL pointer\n");
#ifdef CVMX_BUILD_FOR_UBOOT
- /* U-boot is a special case, as it is running in error level, which disables the TLB completely.
- ** U-boot may use kseg0 addresses, or may directly use physical addresses already */
- return(CAST64(ptr) & 0x7FFFFFFF);
+ uint64_t uboot_tlb_ptr_to_phys(void *ptr);
+
+ if (((uint32_t)ptr) < 0x80000000)
+ {
+ /* Handle useg (unmapped due to ERL) here*/
+ return(CAST64(ptr) & 0x7FFFFFFF);
+ }
+ else if (((uint32_t)ptr) < 0xC0000000)
+ {
+ /* Here we handle KSEG0/KSEG1 _pointers_. We know we are dealing
+ ** with 32 bit only values, so we treat them that way. Note that
+ ** a cvmx_phys_to_ptr(cvmx_ptr_to_phys(X)) will not return X in this case,
+ ** but the physical address of the KSEG0/KSEG1 address. */
+ return(CAST64(ptr) & 0x1FFFFFFF);
+ }
+ else
+ return(uboot_tlb_ptr_to_phys(ptr)); /* Should not get get here in !TLB case */
+
#endif
#ifdef __linux__
@@ -164,14 +181,49 @@ static inline void *cvmx_phys_to_ptr(uin
cvmx_warn_if(physical_address==0, "cvmx_phys_to_ptr() passed a zero address\n");
#ifdef CVMX_BUILD_FOR_UBOOT
- /* U-boot is a special case, as it is running in error level, which disables the TLB completely.
- ** U-boot may use kseg0 addresses, or may directly use physical addresses already */
+#if !CONFIG_OCTEON_UBOOT_TLB
if (physical_address >= 0x80000000)
return NULL;
else
return CASTPTR(void, (physical_address & 0x7FFFFFFF));
#endif
+ /* U-boot is a special case, as it is running in 32 bit mode, using the TLB to map code/data
+ ** which can have a physical address above the 32 bit address space. 1-1 mappings are used
+ ** to allow the low 2 GBytes to be accessed as in error level.
+ **
+ ** NOTE: This conversion can cause problems in u-boot, as users may want to enter addresses
+ ** like 0xBFC00000 (kseg1 boot bus address), which is a valid 64 bit physical address,
+ ** but is likely intended to be a boot bus address. */
+
+ if (physical_address < 0x80000000)
+ {
+ /* Handle useg here. ERL is set, so useg is unmapped. This is the only physical
+ ** address range that is directly addressable by u-boot. */
+ return CASTPTR(void, physical_address);
+ }
+ else
+ {
+ DECLARE_GLOBAL_DATA_PTR;
+ extern char uboot_start;
+ /* Above 0x80000000 we can only support one case - a physical address
+ ** that is mapped for u-boot code/data. We check against the u-boot mem range,
+ ** and return NULL if it is out of this range.
+ */
+ if (physical_address >= gd->bd->bi_uboot_ram_addr
+ && physical_address < gd->bd->bi_uboot_ram_addr + gd->bd->bi_uboot_ram_used_size)
+ {
+ return ((char *)&uboot_start + (physical_address - gd->bd->bi_uboot_ram_addr));
+ }
+ else
+ return(NULL);
+ }
+
+ if (physical_address >= 0x80000000)
+ return NULL;
+ else
+#endif
+
#ifdef __linux__
if (sizeof(void*) == 8)
{
@@ -197,7 +249,8 @@ static inline void *cvmx_phys_to_ptr(uin
2nd 256MB is mapped at 0x10000000 and the rest of memory is 1:1 */
if ((physical_address >= 0x10000000) && (physical_address < 0x20000000))
return CASTPTR(void, CVMX_ADD_SEG32(CVMX_MIPS32_SPACE_KSEG0, physical_address));
- else if ((physical_address >= 0x410000000ull) && (physical_address < 0x420000000ull))
+ else if (!OCTEON_IS_MODEL(OCTEON_CN6XXX) && (physical_address >= 0x410000000ull) &&
+ (physical_address < 0x420000000ull))
return CASTPTR(void, physical_address - 0x400000000ull);
else
return CASTPTR(void, physical_address);
@@ -453,7 +506,7 @@ static inline void cvmx_write_csr(uint64
/* Perform an immediate read after every write to an RSL register to force
the write to complete. It doesn't matter what RSL read we do, so we
choose CVMX_MIO_BOOT_BIST_STAT because it is fast and harmless */
- if ((csr_addr >> 40) == (0x800118))
+ if (((csr_addr >> 40) & 0x7ffff) == (0x118))
cvmx_read64_uint64(CVMX_MIO_BOOT_BIST_STAT);
}
@@ -492,7 +545,7 @@ static inline void cvmx_read_csr_async(u
/**
- * Number of the Core on which the program is currently running.
+ * Number of the Core on which the program is currently running.
*
* @return Number of cores
*/
@@ -537,53 +590,36 @@ static inline int cvmx_dpop(uint64_t val
/**
- * Provide current cycle counter as a return value
+ * @deprecated
+ * Provide current cycle counter as a return value. Deprecated, use
+ * cvmx_clock_get_count(CVMX_CLOCK_CORE) to get cycle counter.
*
* @return current cycle counter
*/
static inline uint64_t cvmx_get_cycle(void)
{
-#if defined(CVMX_ABI_O32)
- uint32_t tmp_low, tmp_hi;
-
- asm volatile (
- " .set push \n"
- " .set mips64r2 \n"
- " .set noreorder \n"
- " rdhwr %[tmpl], $31 \n"
- " dsrl %[tmph], %[tmpl], 32 \n"
- " sll %[tmpl], 0 \n"
- " sll %[tmph], 0 \n"
- " .set pop \n"
- : [tmpl] "=&r" (tmp_low), [tmph] "=&r" (tmp_hi) : );
-
- return(((uint64_t)tmp_hi << 32) + tmp_low);
-#else
- uint64_t cycle;
- CVMX_RDHWR(cycle, 31);
- return(cycle);
-#endif
+ return cvmx_clock_get_count(CVMX_CLOCK_CORE);
}
/**
- * Reads a chip global cycle counter. This counts CPU cycles since
- * chip reset. The counter is 64 bit.
- * This register does not exist on CN38XX pass 1 silicion
+ * @deprecated
+ * Reads a chip global cycle counter. This counts SCLK cycles since
+ * chip reset. The counter is 64 bit. This function is deprecated as the rate
+ * of the global cycle counter is different between Octeon+ and Octeon2, use
+ * cvmx_clock_get_count(CVMX_CLOCK_SCLK) instead. For Octeon2, the clock rate
+ * of SCLK may be differnet than the core clock.
*
* @return Global chip cycle count since chip reset.
*/
static inline uint64_t cvmx_get_cycle_global(void)
{
- if (OCTEON_IS_MODEL(OCTEON_CN38XX_PASS1))
- return 0;
- else
- return cvmx_read64_uint64(CVMX_IPD_CLK_COUNT);
+ return cvmx_clock_get_count(CVMX_CLOCK_IPD);
}
/**
- * Wait for the specified number of cycle
+ * Wait for the specified number of core clock cycles
*
* @param cycles
*/
@@ -605,7 +641,7 @@ static inline void cvmx_wait(uint64_t cy
*/
static inline void cvmx_wait_usec(uint64_t usec)
{
- uint64_t done = cvmx_get_cycle() + usec * cvmx_sysinfo_get()->cpu_clock_hz / 1000000;
+ uint64_t done = cvmx_get_cycle() + usec * cvmx_clock_get_rate(CVMX_CLOCK_CORE) / 1000000;
while (cvmx_get_cycle() < done)
{
/* Spin */
@@ -614,6 +650,22 @@ static inline void cvmx_wait_usec(uint64
/**
+ * Wait for the specified number of io clock cycles
+ *
+ * @param cycles
+ */
+static inline void cvmx_wait_io(uint64_t cycles)
+{
+ uint64_t done = cvmx_clock_get_count(CVMX_CLOCK_SCLK) + cycles;
+
+ while (cvmx_clock_get_count(CVMX_CLOCK_SCLK) < done)
+ {
+ /* Spin */
+ }
+}
+
+
+/**
* Perform a soft reset of Octeon
*
* @return
Modified: vendor-sys/octeon-sdk/dist/cvmx-access.h
==============================================================================
--- vendor-sys/octeon-sdk/dist/cvmx-access.h Sun Nov 28 06:18:58 2010 (r215975)
+++ vendor-sys/octeon-sdk/dist/cvmx-access.h Sun Nov 28 06:20:41 2010 (r215976)
@@ -1,41 +1,43 @@
/***********************license start***************
- * Copyright (c) 2003-2009 Cavium Networks (support at cavium.com). All rights
- * reserved.
+ * Copyright (c) 2003-2010 Cavium Networks (support at cavium.com). All rights
+ * reserved.
*
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- *
- * * Redistributions in binary form must reproduce the above
- * copyright notice, this list of conditions and the following
- * disclaimer in the documentation and/or other materials provided
- * with the distribution.
- *
- * * Neither the name of Cavium Networks nor the names of
- * its contributors may be used to endorse or promote products
- * derived from this software without specific prior written
- * permission.
- *
- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
- * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS
- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH
- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY
- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT
- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES
- * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR
- * PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET
- * POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT
- * OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
- *
- *
- * For any questions regarding licensing please contact marketing at caviumnetworks.com
- *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+
+ * * Neither the name of Cavium Networks nor the names of
+ * its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written
+ * permission.
+
+ * This Software, including technical data, may be subject to U.S. export control
+ * laws, including the U.S. Export Administration Act and its associated
+ * regulations, and may be subject to export or import regulations in other
+ * countries.
+
+ * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
+ * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
+ * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
+ * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
+ * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
+ * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
+ * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
+ * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
+ * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
+ * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
***********************license end**************************************/
+
/**
* @file
* Function prototypes for accessing memory and CSRs on Octeon.
@@ -138,7 +140,7 @@ CVMX_FUNCTION void cvmx_send_single(uint
CVMX_FUNCTION void cvmx_read_csr_async(uint64_t scraddr, uint64_t csr_addr);
/**
- * Number of the Core on which the program is currently running.
+ * Number of the Core on which the program is currently running.
*
* @return Number of cores
*/
@@ -165,23 +167,28 @@ CVMX_FUNCTION uint32_t cvmx_pop(uint32_t
CVMX_FUNCTION int cvmx_dpop(uint64_t val);
/**
- * Provide current cycle counter as a return value
+ * @deprecated
+ * Provide current cycle counter as a return value. Deprecated, use
+ * cvmx_clock_get_count(CVMX_CLOCK_CORE) to get cycle counter.
*
* @return current cycle counter
*/
CVMX_FUNCTION uint64_t cvmx_get_cycle(void);
/**
- * Reads a chip global cycle counter. This counts CPU cycles since
- * chip reset. The counter is 64 bit.
- * This register does not exist on CN38XX pass 1 silicion
+ * @deprecated
+ * Reads a chip global cycle counter. This counts SCLK cycles since
+ * chip reset. The counter is 64 bit. This function is deprecated as the rate
+ * of the global cycle counter is different between Octeon+ and Octeon2, use
+ * cvmx_clock_get_count(CVMX_CLOCK_SCLK) instead. For Octeon2, the clock rate
+ * of SCLK may be differnet than the core clock.
*
* @return Global chip cycle count since chip reset.
*/
-CVMX_FUNCTION uint64_t cvmx_get_cycle_global(void);
+CVMX_FUNCTION uint64_t cvmx_get_cycle_global(void) __attribute__((deprecated));
/**
- * Wait for the specified number of cycle
+ * Wait for the specified number of core clock cycles
*
* @param cycles
*/
@@ -195,6 +202,13 @@ CVMX_FUNCTION void cvmx_wait(uint64_t cy
CVMX_FUNCTION void cvmx_wait_usec(uint64_t usec);
/**
+ * Wait for the specified number of io clock cycles
+ *
+ * @param cycles
+ */
+CVMX_FUNCTION void cvmx_wait_io(uint64_t cycles);
+
+/**
* Perform a soft reset of Octeon
*
* @return
Modified: vendor-sys/octeon-sdk/dist/cvmx-address.h
==============================================================================
--- vendor-sys/octeon-sdk/dist/cvmx-address.h Sun Nov 28 06:18:58 2010 (r215975)
+++ vendor-sys/octeon-sdk/dist/cvmx-address.h Sun Nov 28 06:20:41 2010 (r215976)
@@ -1,41 +1,43 @@
/***********************license start***************
- * Copyright (c) 2003-2009 Cavium Networks (support at cavium.com). All rights
- * reserved.
+ * Copyright (c) 2003-2010 Cavium Networks (support at cavium.com). All rights
+ * reserved.
*
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- *
- * * Redistributions in binary form must reproduce the above
- * copyright notice, this list of conditions and the following
- * disclaimer in the documentation and/or other materials provided
- * with the distribution.
- *
- * * Neither the name of Cavium Networks nor the names of
- * its contributors may be used to endorse or promote products
- * derived from this software without specific prior written
- * permission.
- *
- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
- * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS
- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH
- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY
- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT
- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES
- * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR
- * PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET
- * POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT
- * OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
- *
- *
- * For any questions regarding licensing please contact marketing at caviumnetworks.com
- *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+
+ * * Neither the name of Cavium Networks nor the names of
+ * its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written
+ * permission.
+
+ * This Software, including technical data, may be subject to U.S. export control
+ * laws, including the U.S. Export Administration Act and its associated
+ * regulations, and may be subject to export or import regulations in other
+ * countries.
+
+ * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
+ * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
+ * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
+ * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
+ * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
+ * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
+ * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
+ * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
+ * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
+ * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
***********************license end**************************************/
+
/**
* @file
* Typedefs and defines for working with Octeon physical addresses.
@@ -63,29 +65,27 @@ typedef enum {
CVMX_MIPS_XKSEG_SPACE_KSEG3 = 3LL
} cvmx_mips_xkseg_space_t;
-// decodes <14:13> of a kseg3 window address
+ /* decodes <14:13> of a kseg3 window address */
typedef enum {
CVMX_ADD_WIN_SCR = 0L,
- CVMX_ADD_WIN_DMA = 1L, // see cvmx_add_win_dma_dec_t for further decode
+ CVMX_ADD_WIN_DMA = 1L, /* see cvmx_add_win_dma_dec_t for further decode */
CVMX_ADD_WIN_UNUSED = 2L,
CVMX_ADD_WIN_UNUSED2 = 3L
} cvmx_add_win_dec_t;
-// decode within DMA space
+ /* decode within DMA space */
typedef enum {
- CVMX_ADD_WIN_DMA_ADD = 0L, // add store data to the write buffer entry, allocating it if necessary
- CVMX_ADD_WIN_DMA_SENDMEM = 1L, // send out the write buffer entry to DRAM
- // store data must be normal DRAM memory space address in this case
- CVMX_ADD_WIN_DMA_SENDDMA = 2L, // send out the write buffer entry as an IOBDMA command
- // see CVMX_ADD_WIN_DMA_SEND_DEC for data contents
- CVMX_ADD_WIN_DMA_SENDIO = 3L, // send out the write buffer entry as an IO write
- // store data must be normal IO space address in this case
- CVMX_ADD_WIN_DMA_SENDSINGLE = 4L, // send out a single-tick command on the NCB bus
- // no write buffer data needed/used
+ CVMX_ADD_WIN_DMA_ADD = 0L, /* add store data to the write buffer entry, allocating it if necessary */
+ CVMX_ADD_WIN_DMA_SENDMEM = 1L, /* send out the write buffer entry to DRAM */
+ /* store data must be normal DRAM memory space address in this case */
+ CVMX_ADD_WIN_DMA_SENDDMA = 2L, /* send out the write buffer entry as an IOBDMA command */
+ /* see CVMX_ADD_WIN_DMA_SEND_DEC for data contents */
+ CVMX_ADD_WIN_DMA_SENDIO = 3L, /* send out the write buffer entry as an IO write */
+ /* store data must be normal IO space address in this case */
+ CVMX_ADD_WIN_DMA_SENDSINGLE = 4L, /* send out a single-tick command on the NCB bus */
+ /* no write buffer data needed/used */
} cvmx_add_win_dma_dec_t;
-
-
/**
* Physical Address Decode
*
@@ -116,63 +116,63 @@ typedef union {
struct {
cvmx_mips_space_t R : 2;
uint64_t offset :62;
- } sva; // mapped or unmapped virtual address
+ } sva; /* mapped or unmapped virtual address */
struct {
uint64_t zeroes :33;
uint64_t offset :31;
- } suseg; // mapped USEG virtual addresses (typically)
+ } suseg; /* mapped USEG virtual addresses (typically) */
struct {
uint64_t ones :33;
cvmx_mips_xkseg_space_t sp : 2;
uint64_t offset :29;
- } sxkseg; // mapped or unmapped virtual address
+ } sxkseg; /* mapped or unmapped virtual address */
struct {
- cvmx_mips_space_t R : 2; // CVMX_MIPS_SPACE_XKPHYS in this case
- uint64_t cca : 3; // ignored by octeon
+ cvmx_mips_space_t R : 2; /* CVMX_MIPS_SPACE_XKPHYS in this case */
+ uint64_t cca : 3; /* ignored by octeon */
uint64_t mbz :10;
- uint64_t pa :49; // physical address
- } sxkphys; // physical address accessed through xkphys unmapped virtual address
+ uint64_t pa :49; /* physical address */
+ } sxkphys; /* physical address accessed through xkphys unmapped virtual address */
struct {
uint64_t mbz :15;
- uint64_t is_io : 1; // if set, the address is uncached and resides on MCB bus
- uint64_t did : 8; // the hardware ignores this field when is_io==0, else device ID
- uint64_t unaddr: 4; // the hardware ignores <39:36> in Octeon I
+ uint64_t is_io : 1; /* if set, the address is uncached and resides on MCB bus */
+ uint64_t did : 8; /* the hardware ignores this field when is_io==0, else device ID */
+ uint64_t unaddr: 4; /* the hardware ignores <39:36> in Octeon I */
uint64_t offset :36;
- } sphys; // physical address
+ } sphys; /* physical address */
struct {
- uint64_t zeroes :24; // techically, <47:40> are dont-cares
- uint64_t unaddr: 4; // the hardware ignores <39:36> in Octeon I
+ uint64_t zeroes :24; /* techically, <47:40> are dont-cares */
+ uint64_t unaddr: 4; /* the hardware ignores <39:36> in Octeon I */
uint64_t offset :36;
- } smem; // physical mem address
+ } smem; /* physical mem address */
struct {
uint64_t mem_region :2;
uint64_t mbz :13;
- uint64_t is_io : 1; // 1 in this case
- uint64_t did : 8; // the hardware ignores this field when is_io==0, else device ID
- uint64_t unaddr: 4; // the hardware ignores <39:36> in Octeon I
+ uint64_t is_io : 1; /* 1 in this case */
+ uint64_t did : 8; /* the hardware ignores this field when is_io==0, else device ID */
+ uint64_t unaddr: 4; /* the hardware ignores <39:36> in Octeon I */
uint64_t offset :36;
- } sio; // physical IO address
+ } sio; /* physical IO address */
struct {
uint64_t ones : 49;
- cvmx_add_win_dec_t csrdec : 2; // CVMX_ADD_WIN_SCR (0) in this case
+ cvmx_add_win_dec_t csrdec : 2; /* CVMX_ADD_WIN_SCR (0) in this case */
uint64_t addr : 13;
- } sscr; // scratchpad virtual address - accessed through a window at the end of kseg3
+ } sscr; /* scratchpad virtual address - accessed through a window at the end of kseg3 */
- // there should only be stores to IOBDMA space, no loads
+ /* there should only be stores to IOBDMA space, no loads */
struct {
uint64_t ones : 49;
- cvmx_add_win_dec_t csrdec : 2; // CVMX_ADD_WIN_DMA (1) in this case
+ cvmx_add_win_dec_t csrdec : 2; /* CVMX_ADD_WIN_DMA (1) in this case */
uint64_t unused2: 3;
cvmx_add_win_dma_dec_t type : 3;
uint64_t addr : 7;
- } sdma; // IOBDMA virtual address - accessed through a window at the end of kseg3
+ } sdma; /* IOBDMA virtual address - accessed through a window at the end of kseg3 */
struct {
uint64_t didspace : 24;
@@ -203,8 +203,8 @@ typedef union {
#define CVMX_FULL_DID(did,subdid) (((did) << 3) | (subdid))
-// from include/ncb_rsl_id.v
-#define CVMX_OCT_DID_MIS 0ULL // misc stuff
+ /* from include/ncb_rsl_id.v */
+#define CVMX_OCT_DID_MIS 0ULL /* misc stuff */
#define CVMX_OCT_DID_GMX0 1ULL
#define CVMX_OCT_DID_GMX1 2ULL
#define CVMX_OCT_DID_PCI 3ULL
@@ -217,7 +217,7 @@ typedef union {
#define CVMX_OCT_DID_PKT 10ULL
#define CVMX_OCT_DID_TIM 11ULL
#define CVMX_OCT_DID_TAG 12ULL
-// the rest are not on the IO bus
+ /* the rest are not on the IO bus */
#define CVMX_OCT_DID_L2C 16ULL
#define CVMX_OCT_DID_LMC 17ULL
#define CVMX_OCT_DID_SPX0 18ULL
Added: vendor-sys/octeon-sdk/dist/cvmx-agl-defs.h
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ vendor-sys/octeon-sdk/dist/cvmx-agl-defs.h Sun Nov 28 06:20:41 2010 (r215976)
@@ -0,0 +1,4615 @@
+/***********************license start***************
+ * Copyright (c) 2003-2010 Cavium Networks (support at cavium.com). All rights
+ * reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+
+ * * Neither the name of Cavium Networks nor the names of
+ * its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written
+ * permission.
+
+ * This Software, including technical data, may be subject to U.S. export control
+ * laws, including the U.S. Export Administration Act and its associated
+ * regulations, and may be subject to export or import regulations in other
+ * countries.
+
+ * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
+ * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
+ * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
+ * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
+ * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
+ * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
+ * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
+ * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
+ * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
+ * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
+ ***********************license end**************************************/
+
+
+/**
+ * cvmx-agl-defs.h
+ *
+ * Configuration and status register (CSR) type definitions for
+ * Octeon agl.
+ *
+ * This file is auto generated. Do not edit.
+ *
+ * <hr>$Revision$<hr>
+ *
+ */
+#ifndef __CVMX_AGL_TYPEDEFS_H__
+#define __CVMX_AGL_TYPEDEFS_H__
+
+#if CVMX_ENABLE_CSR_ADDRESS_CHECKING
+#define CVMX_AGL_GMX_BAD_REG CVMX_AGL_GMX_BAD_REG_FUNC()
+static inline uint64_t CVMX_AGL_GMX_BAD_REG_FUNC(void)
+{
+ if (!(OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN63XX)))
+ cvmx_warn("CVMX_AGL_GMX_BAD_REG not supported on this chip\n");
+ return CVMX_ADD_IO_SEG(0x00011800E0000518ull);
+}
+#else
+#define CVMX_AGL_GMX_BAD_REG (CVMX_ADD_IO_SEG(0x00011800E0000518ull))
+#endif
+#if CVMX_ENABLE_CSR_ADDRESS_CHECKING
+#define CVMX_AGL_GMX_BIST CVMX_AGL_GMX_BIST_FUNC()
+static inline uint64_t CVMX_AGL_GMX_BIST_FUNC(void)
+{
+ if (!(OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN63XX)))
+ cvmx_warn("CVMX_AGL_GMX_BIST not supported on this chip\n");
+ return CVMX_ADD_IO_SEG(0x00011800E0000400ull);
+}
+#else
+#define CVMX_AGL_GMX_BIST (CVMX_ADD_IO_SEG(0x00011800E0000400ull))
+#endif
+#if CVMX_ENABLE_CSR_ADDRESS_CHECKING
+#define CVMX_AGL_GMX_DRV_CTL CVMX_AGL_GMX_DRV_CTL_FUNC()
+static inline uint64_t CVMX_AGL_GMX_DRV_CTL_FUNC(void)
+{
+ if (!(OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN56XX)))
+ cvmx_warn("CVMX_AGL_GMX_DRV_CTL not supported on this chip\n");
+ return CVMX_ADD_IO_SEG(0x00011800E00007F0ull);
+}
+#else
+#define CVMX_AGL_GMX_DRV_CTL (CVMX_ADD_IO_SEG(0x00011800E00007F0ull))
+#endif
+#if CVMX_ENABLE_CSR_ADDRESS_CHECKING
+#define CVMX_AGL_GMX_INF_MODE CVMX_AGL_GMX_INF_MODE_FUNC()
+static inline uint64_t CVMX_AGL_GMX_INF_MODE_FUNC(void)
+{
+ if (!(OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN56XX)))
+ cvmx_warn("CVMX_AGL_GMX_INF_MODE not supported on this chip\n");
+ return CVMX_ADD_IO_SEG(0x00011800E00007F8ull);
+}
+#else
+#define CVMX_AGL_GMX_INF_MODE (CVMX_ADD_IO_SEG(0x00011800E00007F8ull))
+#endif
+#if CVMX_ENABLE_CSR_ADDRESS_CHECKING
+static inline uint64_t CVMX_AGL_GMX_PRTX_CFG(unsigned long offset)
+{
+ if (!(
+ (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((offset <= 1))) ||
+ (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((offset == 0))) ||
+ (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((offset <= 1)))))
+ cvmx_warn("CVMX_AGL_GMX_PRTX_CFG(%lu) is invalid on this chip\n", offset);
+ return CVMX_ADD_IO_SEG(0x00011800E0000010ull) + ((offset) & 1) * 2048;
+}
+#else
+#define CVMX_AGL_GMX_PRTX_CFG(offset) (CVMX_ADD_IO_SEG(0x00011800E0000010ull) + ((offset) & 1) * 2048)
+#endif
+#if CVMX_ENABLE_CSR_ADDRESS_CHECKING
+static inline uint64_t CVMX_AGL_GMX_RXX_ADR_CAM0(unsigned long offset)
+{
+ if (!(
+ (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((offset <= 1))) ||
+ (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((offset == 0))) ||
+ (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((offset <= 1)))))
+ cvmx_warn("CVMX_AGL_GMX_RXX_ADR_CAM0(%lu) is invalid on this chip\n", offset);
+ return CVMX_ADD_IO_SEG(0x00011800E0000180ull) + ((offset) & 1) * 2048;
+}
+#else
+#define CVMX_AGL_GMX_RXX_ADR_CAM0(offset) (CVMX_ADD_IO_SEG(0x00011800E0000180ull) + ((offset) & 1) * 2048)
+#endif
+#if CVMX_ENABLE_CSR_ADDRESS_CHECKING
+static inline uint64_t CVMX_AGL_GMX_RXX_ADR_CAM1(unsigned long offset)
+{
+ if (!(
+ (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((offset <= 1))) ||
+ (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((offset == 0))) ||
+ (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((offset <= 1)))))
+ cvmx_warn("CVMX_AGL_GMX_RXX_ADR_CAM1(%lu) is invalid on this chip\n", offset);
+ return CVMX_ADD_IO_SEG(0x00011800E0000188ull) + ((offset) & 1) * 2048;
+}
+#else
+#define CVMX_AGL_GMX_RXX_ADR_CAM1(offset) (CVMX_ADD_IO_SEG(0x00011800E0000188ull) + ((offset) & 1) * 2048)
+#endif
+#if CVMX_ENABLE_CSR_ADDRESS_CHECKING
+static inline uint64_t CVMX_AGL_GMX_RXX_ADR_CAM2(unsigned long offset)
+{
+ if (!(
+ (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((offset <= 1))) ||
+ (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((offset == 0))) ||
+ (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((offset <= 1)))))
+ cvmx_warn("CVMX_AGL_GMX_RXX_ADR_CAM2(%lu) is invalid on this chip\n", offset);
+ return CVMX_ADD_IO_SEG(0x00011800E0000190ull) + ((offset) & 1) * 2048;
+}
+#else
+#define CVMX_AGL_GMX_RXX_ADR_CAM2(offset) (CVMX_ADD_IO_SEG(0x00011800E0000190ull) + ((offset) & 1) * 2048)
+#endif
+#if CVMX_ENABLE_CSR_ADDRESS_CHECKING
+static inline uint64_t CVMX_AGL_GMX_RXX_ADR_CAM3(unsigned long offset)
+{
+ if (!(
+ (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((offset <= 1))) ||
+ (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((offset == 0))) ||
+ (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((offset <= 1)))))
+ cvmx_warn("CVMX_AGL_GMX_RXX_ADR_CAM3(%lu) is invalid on this chip\n", offset);
+ return CVMX_ADD_IO_SEG(0x00011800E0000198ull) + ((offset) & 1) * 2048;
+}
+#else
+#define CVMX_AGL_GMX_RXX_ADR_CAM3(offset) (CVMX_ADD_IO_SEG(0x00011800E0000198ull) + ((offset) & 1) * 2048)
+#endif
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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