svn commit: r185513 - in head/sys/arm: at91 mv sa11x0 xscale/i80321
xscale/i8134x xscale/ixp425 xscale/pxa
Stanislav Sedov
stas at FreeBSD.org
Mon Dec 1 02:16:25 PST 2008
Author: stas
Date: Mon Dec 1 10:16:25 2008
New Revision: 185513
URL: http://svn.freebsd.org/changeset/base/185513
Log:
- Fix spelling error in comments.
PR: arm/128891
Submitted by: Pavel Pankov <pankov_p at mail.ru>
Approved by: kib (mentor)
Modified:
head/sys/arm/at91/at91_machdep.c
head/sys/arm/mv/mv_machdep.c
head/sys/arm/sa11x0/assabet_machdep.c
head/sys/arm/xscale/i80321/ep80219_machdep.c
head/sys/arm/xscale/i80321/iq31244_machdep.c
head/sys/arm/xscale/i8134x/crb_machdep.c
head/sys/arm/xscale/ixp425/avila_machdep.c
head/sys/arm/xscale/pxa/pxa_machdep.c
Modified: head/sys/arm/at91/at91_machdep.c
==============================================================================
--- head/sys/arm/at91/at91_machdep.c Mon Dec 1 10:05:34 2008 (r185512)
+++ head/sys/arm/at91/at91_machdep.c Mon Dec 1 10:16:25 2008 (r185513)
@@ -341,7 +341,7 @@ initarm(void *arg, void *arg2)
* but since we are boot strapping the addresses used for the read
* may have just been remapped and thus the cache could be out
* of sync. A re-clean after the switch will cure this.
- * After booting there are no gross reloations of the kernel thus
+ * After booting there are no gross relocations of the kernel thus
* this problem will not occur after initarm().
*/
cpu_idcache_wbinv_all();
Modified: head/sys/arm/mv/mv_machdep.c
==============================================================================
--- head/sys/arm/mv/mv_machdep.c Mon Dec 1 10:05:34 2008 (r185512)
+++ head/sys/arm/mv/mv_machdep.c Mon Dec 1 10:16:25 2008 (r185513)
@@ -579,7 +579,7 @@ initarm(void *mdp, void *unused __unused
* but since we are boot strapping the addresses used for the read
* may have just been remapped and thus the cache could be out
* of sync. A re-clean after the switch will cure this.
- * After booting there are no gross reloations of the kernel thus
+ * After booting there are no gross relocations of the kernel thus
* this problem will not occur after initarm().
*/
cpu_idcache_wbinv_all();
Modified: head/sys/arm/sa11x0/assabet_machdep.c
==============================================================================
--- head/sys/arm/sa11x0/assabet_machdep.c Mon Dec 1 10:05:34 2008 (r185512)
+++ head/sys/arm/sa11x0/assabet_machdep.c Mon Dec 1 10:16:25 2008 (r185513)
@@ -375,7 +375,7 @@ initarm(void *arg, void *arg2)
* but since we are boot strapping the addresses used for the read
* may have just been remapped and thus the cache could be out
* of sync. A re-clean after the switch will cure this.
- * After booting there are no gross reloations of the kernel thus
+ * After booting there are no gross relocations of the kernel thus
* this problem will not occur after initarm().
*/
cpu_idcache_wbinv_all();
Modified: head/sys/arm/xscale/i80321/ep80219_machdep.c
==============================================================================
--- head/sys/arm/xscale/i80321/ep80219_machdep.c Mon Dec 1 10:05:34 2008 (r185512)
+++ head/sys/arm/xscale/i80321/ep80219_machdep.c Mon Dec 1 10:16:25 2008 (r185513)
@@ -352,7 +352,7 @@ initarm(void *arg, void *arg2)
* but since we are boot strapping the addresses used for the read
* may have just been remapped and thus the cache could be out
* of sync. A re-clean after the switch will cure this.
- * After booting there are no gross reloations of the kernel thus
+ * After booting there are no gross relocations of the kernel thus
* this problem will not occur after initarm().
*/
cpu_idcache_wbinv_all();
Modified: head/sys/arm/xscale/i80321/iq31244_machdep.c
==============================================================================
--- head/sys/arm/xscale/i80321/iq31244_machdep.c Mon Dec 1 10:05:34 2008 (r185512)
+++ head/sys/arm/xscale/i80321/iq31244_machdep.c Mon Dec 1 10:16:25 2008 (r185513)
@@ -350,7 +350,7 @@ initarm(void *arg, void *arg2)
* but since we are boot strapping the addresses used for the read
* may have just been remapped and thus the cache could be out
* of sync. A re-clean after the switch will cure this.
- * After booting there are no gross reloations of the kernel thus
+ * After booting there are no gross relocations of the kernel thus
* this problem will not occur after initarm().
*/
cpu_idcache_wbinv_all();
Modified: head/sys/arm/xscale/i8134x/crb_machdep.c
==============================================================================
--- head/sys/arm/xscale/i8134x/crb_machdep.c Mon Dec 1 10:05:34 2008 (r185512)
+++ head/sys/arm/xscale/i8134x/crb_machdep.c Mon Dec 1 10:16:25 2008 (r185513)
@@ -332,7 +332,7 @@ initarm(void *arg, void *arg2)
* but since we are boot strapping the addresses used for the read
* may have just been remapped and thus the cache could be out
* of sync. A re-clean after the switch will cure this.
- * After booting there are no gross reloations of the kernel thus
+ * After booting there are no gross relocations of the kernel thus
* this problem will not occur after initarm().
*/
cpu_idcache_wbinv_all();
Modified: head/sys/arm/xscale/ixp425/avila_machdep.c
==============================================================================
--- head/sys/arm/xscale/ixp425/avila_machdep.c Mon Dec 1 10:05:34 2008 (r185512)
+++ head/sys/arm/xscale/ixp425/avila_machdep.c Mon Dec 1 10:16:25 2008 (r185513)
@@ -418,7 +418,7 @@ initarm(void *arg, void *arg2)
* but since we are boot strapping the addresses used for the read
* may have just been remapped and thus the cache could be out
* of sync. A re-clean after the switch will cure this.
- * After booting there are no gross reloations of the kernel thus
+ * After booting there are no gross relocations of the kernel thus
* this problem will not occur after initarm().
*/
cpu_idcache_wbinv_all();
Modified: head/sys/arm/xscale/pxa/pxa_machdep.c
==============================================================================
--- head/sys/arm/xscale/pxa/pxa_machdep.c Mon Dec 1 10:05:34 2008 (r185512)
+++ head/sys/arm/xscale/pxa/pxa_machdep.c Mon Dec 1 10:16:25 2008 (r185513)
@@ -330,7 +330,7 @@ initarm(void *arg, void *arg2)
* but since we are boot strapping the addresses used for the read
* may have just been remapped and thus the cache could be out
* of sync. A re-clean after the switch will cure this.
- * After booting there are no gross reloations of the kernel thus
+ * After booting there are no gross relocations of the kernel thus
* this problem will not occur after initarm().
*/
cpu_idcache_wbinv_all();
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