socsvn commit: r289980 - soc2015/iateaca/bhyve-ne2000-head/usr.sbin/bhyve

[iateaca at FreeBSD.org]

Author: iateaca
Date: Thu Aug 20 19:17:44 2015
New Revision: 289980
URL: http://svnweb.FreeBSD.org/socsvn/?view=rev&rev=289980

Log:
  redesign: use 1 BAR register instead of 2

Modified:
  soc2015/iateaca/bhyve-ne2000-head/usr.sbin/bhyve/pci_ne2000.c

Modified: soc2015/iateaca/bhyve-ne2000-head/usr.sbin/bhyve/pci_ne2000.c
==============================================================================
--- soc2015/iateaca/bhyve-ne2000-head/usr.sbin/bhyve/pci_ne2000.c	Thu Aug 20 18:31:05 2015	(r289979)
+++ soc2015/iateaca/bhyve-ne2000-head/usr.sbin/bhyve/pci_ne2000.c	Thu Aug 20 19:17:44 2015	(r289980)
@@ -83,7 +83,7 @@
 
 	/*
 	 * one single mutex used to lock the reception flow with
-	 * the .pe_barwrite and .pe_barwrite flows
+	 * the read and write register flows
 	 */
 	pthread_mutex_t mtx;
 
@@ -115,12 +115,16 @@
 static void
 ne2000_update_intr(struct ne2000_softc *sc);
 
+static uint16_t
+ne2000_read(struct ne2000_softc *sc, uint8_t offset, int size);
 static uint8_t
 ne2000_read_nic(struct ne2000_softc *sc, uint8_t offset);
 static uint16_t
 ne2000_read_asic(struct ne2000_softc *sc, uint8_t offset);
 
 static int
+ne2000_write(struct ne2000_softc *sc, uint8_t offset, uint16_t value, int size);
+static int
 ne2000_write_nic(struct ne2000_softc *sc, uint8_t offset, uint8_t value);
 static int
 ne2000_write_asic(struct ne2000_softc *sc, uint8_t offset, uint16_t value);
@@ -934,6 +938,25 @@
 	}
 }
 
+static uint16_t
+ne2000_read(struct ne2000_softc *sc, uint8_t offset, int size)
+{
+	uint16_t value = 0;
+
+	assert(offset < ED_NOVELL_IO_PORTS);
+
+	if (offset < ED_NOVELL_ASIC_OFFSET) {
+		assert(size == 1);
+		value = ne2000_read_nic(sc, offset);
+	}
+	else {
+		assert(size <= 2);
+		value = ne2000_read_asic(sc, offset - ED_NOVELL_ASIC_OFFSET);
+	}
+
+	return value;
+}
+
 static uint8_t
 ne2000_read_nic(struct ne2000_softc *sc, uint8_t offset)
 {
@@ -969,6 +992,25 @@
 }
 
 static int
+ne2000_write(struct ne2000_softc *sc, uint8_t offset, uint16_t value, int size)
+{
+	int err;
+
+	assert(offset < ED_NOVELL_IO_PORTS);
+
+	if (offset < ED_NOVELL_ASIC_OFFSET) {
+		assert(size == 1);
+		err = ne2000_write_nic(sc, offset, value);
+	}
+	else {
+		assert(size <= 2);
+		err = ne2000_write_asic(sc, offset - ED_NOVELL_ASIC_OFFSET, value);
+	}
+
+	return err;
+}
+
+static int
 ne2000_write_nic(struct ne2000_softc *sc, uint8_t offset, uint8_t value)
 {
 	int err;
@@ -1150,9 +1192,8 @@
 	pci_set_cfgdata16(pi, PCIR_DEVICE, 0x8029);
 	pci_set_cfgdata16(pi, PCIR_VENDOR, 0x10ec);
 
-	/* allocate two BAR registers for both NIC and ASIC I/O bus address offsets */
-	pci_emul_alloc_bar(pi, 0, PCIBAR_IO, 16);
-	pci_emul_alloc_bar(pi, 1, PCIBAR_IO, 16);
+	/* allocate one BAR register for both NIC and ASIC I/O bus address offsets */
+	pci_emul_alloc_bar(pi, 0, PCIBAR_IO, ED_NOVELL_IO_PORTS);
 
 	/* allocate an IRQ pin for our slot */
 	pci_lintr_request(pi);
@@ -1175,22 +1216,8 @@
 	int err;
 
 	assert(sc != NULL);
-	assert(offset <= 0x0f);
-
-	switch (baridx) {
-	case NE2000_BAR_NIC:
-		assert(size == 1);
-		assert(value <= 0xff);
-		err = ne2000_write_nic(sc, offset, value);
-		break;
-	case NE2000_BAR_ASIC:
-		assert(size <= 2);
-		err = ne2000_write_asic(sc, offset, value);
-		break;
-	default:
-		assert(0);
-	}
 
+	err = ne2000_write(sc, offset, value, size);
 	assert(err == 0);
 
 	return;
@@ -1204,20 +1231,8 @@
 	uint64_t value = 0;
 
 	assert(sc != NULL);
-	assert(offset <= 0x0f);
 
-	switch (baridx) {
-	case NE2000_BAR_NIC:
-		assert(size == 1);
-		value = ne2000_read_nic(sc, offset);
-		break;
-	case NE2000_BAR_ASIC:
-		assert(size <= 2);
-		value = ne2000_read_asic(sc, offset);
-		break;
-	default:
-		assert(0);
-	}
+	value = ne2000_read(sc, offset, size);
 
 	return value;
 }