svn commit: r542536 - in head/cad/verilator: . files

Yuri Victorovich yuri at FreeBSD.org
Sat Jul 18 23:00:45 UTC 2020


Author: yuri
Date: Sat Jul 18 23:00:44 2020
New Revision: 542536
URL: https://svnweb.freebsd.org/changeset/ports/542536

Log:
  cad/verilator: Update 4.036 -> 4.038
  
  PR:		248086
  Approved by:	kevinz5000 at gmail.com (maintainer)

Modified:
  head/cad/verilator/Makefile
  head/cad/verilator/distinfo
  head/cad/verilator/files/patch-src-verilog.y

Modified: head/cad/verilator/Makefile
==============================================================================
--- head/cad/verilator/Makefile	Sat Jul 18 22:48:23 2020	(r542535)
+++ head/cad/verilator/Makefile	Sat Jul 18 23:00:44 2020	(r542536)
@@ -1,7 +1,7 @@
 # $FreeBSD$
 
 PORTNAME=	verilator
-DISTVERSION=	4.036
+DISTVERSION=	4.038
 CATEGORIES=	cad
 MASTER_SITES=	https://www.veripool.org/ftp/
 

Modified: head/cad/verilator/distinfo
==============================================================================
--- head/cad/verilator/distinfo	Sat Jul 18 22:48:23 2020	(r542535)
+++ head/cad/verilator/distinfo	Sat Jul 18 23:00:44 2020	(r542536)
@@ -1,5 +1,5 @@
-TIMESTAMP = 1594246998
-SHA256 (verilator-4.036.tgz) = 307cf2657328b6e529af48c2d7d06b78b98d00d4f0148a484173cf81df15c0eb
-SIZE (verilator-4.036.tgz) = 2678827
+TIMESTAMP = 1595108832
+SHA256 (verilator-4.038.tgz) = fa004493216034ac3e26b21b814441bd5801592f4f269c5a4672e3351d73b515
+SIZE (verilator-4.038.tgz) = 2703465
 SHA256 (39f16fb155b9e909f919a9d4ae06890395987b16.patch) = 266c63d54bc00d4a67163b701a10cf238faf9c21f04e0c8192bd5495ff000b80
 SIZE (39f16fb155b9e909f919a9d4ae06890395987b16.patch) = 590

Modified: head/cad/verilator/files/patch-src-verilog.y
==============================================================================
--- head/cad/verilator/files/patch-src-verilog.y	Sat Jul 18 22:48:23 2020	(r542535)
+++ head/cad/verilator/files/patch-src-verilog.y	Sat Jul 18 23:00:44 2020	(r542536)
@@ -1,18 +1,18 @@
---- src/verilog.y.orig	2020-02-08 14:14:33 UTC
+--- src/verilog.y.orig	2020-07-11 01:58:03 UTC
 +++ src/verilog.y
-@@ -20,6 +20,7 @@
- // Original code here by Paul Wasson and Duane Galbi
+@@ -17,6 +17,7 @@
  //*************************************************************************
+ // clang-format off
  
 +%define parse.error verbose
  %{
- #include "V3Ast.h"
- #include "V3Global.h"
-@@ -29,7 +30,6 @@
- #include <cstdlib>
+ #ifdef NEVER_JUST_FOR_CLANG_FORMAT
+  }
+@@ -31,7 +32,6 @@
  #include <cstdarg>
+ #include <stack>
  
--#define YYERROR_VERBOSE 1
- #define YYINITDEPTH 10000	// Older bisons ignore YYMAXDEPTH
+-#define YYERROR_VERBOSE 1  // For prior to Bison 3.6
+ #define YYINITDEPTH 10000  // Older bisons ignore YYMAXDEPTH
  #define YYMAXDEPTH 10000
  


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