svn commit: r534269 - in head/lang: rust rust-bootstrap rust/files rust/files/powerpc64-elfv1 rust/files/powerpc64-elfv2
Tobias Kortkamp
tobik at FreeBSD.org
Thu May 7 15:58:39 UTC 2020
Author: tobik
Date: Thu May 7 15:58:38 2020
New Revision: 534269
URL: https://svnweb.freebsd.org/changeset/ports/534269
Log:
lang/rust: Update to 1.43.1
- Remove upstreamed patches
- On ppc64 revert e82ec2315e5adb1c291c3702cd2ac1f46ecd0fcf to fix segfaults
Changes: https://blog.rust-lang.org/2020/05/07/Rust.1.43.1.html
With hat: rust
Differential Revision: https://reviews.freebsd.org/D24734
Added:
head/lang/rust/files/powerpc64-elfv1/patch-src_librustc__mir_dataflow_generic_engine.rs (contents, props changed)
head/lang/rust/files/powerpc64-elfv2/patch-src_librustc__mir_dataflow_generic_engine.rs (contents, props changed)
Deleted:
head/lang/rust/files/patch-src_stdarch_crates_std__detect_src_detect_mod.rs
head/lang/rust/files/patch-vendor_openssl-src_src_lib.rs
Modified:
head/lang/rust-bootstrap/Makefile
head/lang/rust-bootstrap/distinfo
head/lang/rust/Makefile
head/lang/rust/distinfo
Modified: head/lang/rust-bootstrap/Makefile
==============================================================================
--- head/lang/rust-bootstrap/Makefile Thu May 7 15:36:07 2020 (r534268)
+++ head/lang/rust-bootstrap/Makefile Thu May 7 15:58:38 2020 (r534269)
@@ -1,7 +1,7 @@
# $FreeBSD$
PORTNAME= rust
-PORTVERSION= 1.43.0
+PORTVERSION= 1.43.1
CATEGORIES= lang
MASTER_SITES= https://static.rust-lang.org/dist/:rust \
LOCAL/tobik:armbase \
Modified: head/lang/rust-bootstrap/distinfo
==============================================================================
--- head/lang/rust-bootstrap/distinfo Thu May 7 15:36:07 2020 (r534268)
+++ head/lang/rust-bootstrap/distinfo Thu May 7 15:58:38 2020 (r534269)
@@ -1,6 +1,6 @@
-TIMESTAMP = 1587438306
-SHA256 (rust/rustc-1.43.0-src.tar.xz) = d0899933840369f07394b211cb0b53a5cd4634907633f0bee541133c8b75e309
-SIZE (rust/rustc-1.43.0-src.tar.xz) = 94354332
+TIMESTAMP = 1588774437
+SHA256 (rust/rustc-1.43.1-src.tar.xz) = eb0a103c67c4565403d9e6f84a1c708982a5e9e5b3c0d831e4d6f6451795d106
+SIZE (rust/rustc-1.43.1-src.tar.xz) = 94405276
SHA256 (FreeBSD-11.3-RELEASE-arm64.tar.xz) = 0c1ee2bdbec3b6b404edef6858f38f5cdacd727abc53b1dee23910cab939d0c1
SIZE (FreeBSD-11.3-RELEASE-arm64.tar.xz) = 97990888
SHA256 (FreeBSD-11.3-RELEASE-amd64.tar.xz) = 4599023ac136325b86f2fddeec64c1624daa83657e40b00b2ef944c81463a4ff
Modified: head/lang/rust/Makefile
==============================================================================
--- head/lang/rust/Makefile Thu May 7 15:36:07 2020 (r534268)
+++ head/lang/rust/Makefile Thu May 7 15:58:38 2020 (r534269)
@@ -2,7 +2,7 @@
# $FreeBSD$
PORTNAME= rust
-PORTVERSION?= 1.43.0
+PORTVERSION?= 1.43.1
PORTREVISION?= 0
CATEGORIES= lang
MASTER_SITES= https://static.rust-lang.org/dist/:src \
Modified: head/lang/rust/distinfo
==============================================================================
--- head/lang/rust/distinfo Thu May 7 15:36:07 2020 (r534268)
+++ head/lang/rust/distinfo Thu May 7 15:58:38 2020 (r534269)
@@ -1,6 +1,6 @@
-TIMESTAMP = 1587600298
-SHA256 (rust/rustc-1.43.0-src.tar.xz) = d0899933840369f07394b211cb0b53a5cd4634907633f0bee541133c8b75e309
-SIZE (rust/rustc-1.43.0-src.tar.xz) = 94354332
+TIMESTAMP = 1588774409
+SHA256 (rust/rustc-1.43.1-src.tar.xz) = eb0a103c67c4565403d9e6f84a1c708982a5e9e5b3c0d831e4d6f6451795d106
+SIZE (rust/rustc-1.43.1-src.tar.xz) = 94405276
SHA256 (rust/2020-03-12/rustc-1.42.0-aarch64-unknown-freebsd.tar.xz) = a8f1f858837b160bd63ce2526ab6add67ed6fcda56b6e5d566434b11f0e5f56f
SIZE (rust/2020-03-12/rustc-1.42.0-aarch64-unknown-freebsd.tar.xz) = 26088116
SHA256 (rust/2020-03-12/rust-std-1.42.0-aarch64-unknown-freebsd.tar.xz) = 5d24030cf4476850c2873caa1f00580b4c9e21d71aace2318c0b3ba496e7b6a7
Added: head/lang/rust/files/powerpc64-elfv1/patch-src_librustc__mir_dataflow_generic_engine.rs
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/lang/rust/files/powerpc64-elfv1/patch-src_librustc__mir_dataflow_generic_engine.rs Thu May 7 15:58:38 2020 (r534269)
@@ -0,0 +1,81 @@
+Revert https://github.com/rust-lang/rust/commit/e82ec2315e5adb1c291c3702cd2ac1f46ecd0fcf
+it causes sigsegv on powerpc64
+
+--- src/librustc_mir/dataflow/generic/engine.rs.orig 2020-04-21 00:17:56 UTC
++++ src/librustc_mir/dataflow/generic/engine.rs
+@@ -239,27 +239,24 @@ where
+ }
+
+ SwitchInt { ref targets, ref values, ref discr, .. } => {
+- let Engine { tcx, body, .. } = *self;
+- let enum_ = discr
+- .place()
+- .and_then(|discr| switch_on_enum_discriminant(tcx, body, bb_data, discr));
+- match enum_ {
+- // If this is a switch on an enum discriminant, a custom effect may be applied
+- // along each outgoing edge.
+- Some((enum_place, enum_def)) => {
++ // If this is a switch on an enum discriminant, a custom effect may be applied
++ // along each outgoing edge.
++ if let Some(place) = discr.place() {
++ let enum_def = switch_on_enum_discriminant(self.tcx, self.body, bb_data, place);
++ if let Some(enum_def) = enum_def {
+ self.propagate_bits_into_enum_discriminant_switch_successors(
+- in_out, bb, enum_def, enum_place, dirty_list, &*values, &*targets,
++ in_out, bb, enum_def, place, dirty_list, &*values, &*targets,
+ );
+- }
+
+- // Otherwise, it's just a normal `SwitchInt`, and every successor sees the same
+- // exit state.
+- None => {
+- for target in targets.iter().copied() {
+- self.propagate_bits_into_entry_set_for(&in_out, target, dirty_list);
+- }
++ return;
+ }
+ }
++
++ // Otherwise, it's just a normal `SwitchInt`, and every successor sees the same
++ // exit state.
++ for target in targets.iter().copied() {
++ self.propagate_bits_into_entry_set_for(&in_out, target, dirty_list);
++ }
+ }
+
+ Call { cleanup, ref destination, ref func, ref args, .. } => {
+@@ -345,27 +342,22 @@ where
+ }
+ }
+
+-/// Inspect a `SwitchInt`-terminated basic block to see if the condition of that `SwitchInt` is
+-/// an enum discriminant.
+-///
+-/// We expect such blocks to have a call to `discriminant` as their last statement like so:
+-/// _42 = discriminant(_1)
++/// Look at the last statement of a block that ends with to see if it is an assignment of an enum
++/// discriminant to the local that determines the target of a `SwitchInt` like so:
++/// _42 = discriminant(..)
+ /// SwitchInt(_42, ..)
+-///
+-/// If the basic block matches this pattern, this function returns the place corresponding to the
+-/// enum (`_1` in the example above) as well as the `AdtDef` of that enum.
+ fn switch_on_enum_discriminant(
+ tcx: TyCtxt<'tcx>,
+- body: &'mir mir::Body<'tcx>,
+- block: &'mir mir::BasicBlockData<'tcx>,
++ body: &mir::Body<'tcx>,
++ block: &mir::BasicBlockData<'tcx>,
+ switch_on: &mir::Place<'tcx>,
+-) -> Option<(&'mir mir::Place<'tcx>, &'tcx ty::AdtDef)> {
++) -> Option<&'tcx ty::AdtDef> {
+ match block.statements.last().map(|stmt| &stmt.kind) {
+ Some(mir::StatementKind::Assign(box (lhs, mir::Rvalue::Discriminant(discriminated))))
+ if lhs == switch_on =>
+ {
+ match &discriminated.ty(body, tcx).ty.kind {
+- ty::Adt(def, _) => Some((discriminated, def)),
++ ty::Adt(def, _) => Some(def),
+
+ // `Rvalue::Discriminant` is also used to get the active yield point for a
+ // generator, but we do not need edge-specific effects in that case. This may
Added: head/lang/rust/files/powerpc64-elfv2/patch-src_librustc__mir_dataflow_generic_engine.rs
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/lang/rust/files/powerpc64-elfv2/patch-src_librustc__mir_dataflow_generic_engine.rs Thu May 7 15:58:38 2020 (r534269)
@@ -0,0 +1,81 @@
+Revert https://github.com/rust-lang/rust/commit/e82ec2315e5adb1c291c3702cd2ac1f46ecd0fcf
+it causes sigsegv on powerpc64
+
+--- src/librustc_mir/dataflow/generic/engine.rs.orig 2020-04-21 00:17:56 UTC
++++ src/librustc_mir/dataflow/generic/engine.rs
+@@ -239,27 +239,24 @@ where
+ }
+
+ SwitchInt { ref targets, ref values, ref discr, .. } => {
+- let Engine { tcx, body, .. } = *self;
+- let enum_ = discr
+- .place()
+- .and_then(|discr| switch_on_enum_discriminant(tcx, body, bb_data, discr));
+- match enum_ {
+- // If this is a switch on an enum discriminant, a custom effect may be applied
+- // along each outgoing edge.
+- Some((enum_place, enum_def)) => {
++ // If this is a switch on an enum discriminant, a custom effect may be applied
++ // along each outgoing edge.
++ if let Some(place) = discr.place() {
++ let enum_def = switch_on_enum_discriminant(self.tcx, self.body, bb_data, place);
++ if let Some(enum_def) = enum_def {
+ self.propagate_bits_into_enum_discriminant_switch_successors(
+- in_out, bb, enum_def, enum_place, dirty_list, &*values, &*targets,
++ in_out, bb, enum_def, place, dirty_list, &*values, &*targets,
+ );
+- }
+
+- // Otherwise, it's just a normal `SwitchInt`, and every successor sees the same
+- // exit state.
+- None => {
+- for target in targets.iter().copied() {
+- self.propagate_bits_into_entry_set_for(&in_out, target, dirty_list);
+- }
++ return;
+ }
+ }
++
++ // Otherwise, it's just a normal `SwitchInt`, and every successor sees the same
++ // exit state.
++ for target in targets.iter().copied() {
++ self.propagate_bits_into_entry_set_for(&in_out, target, dirty_list);
++ }
+ }
+
+ Call { cleanup, ref destination, ref func, ref args, .. } => {
+@@ -345,27 +342,22 @@ where
+ }
+ }
+
+-/// Inspect a `SwitchInt`-terminated basic block to see if the condition of that `SwitchInt` is
+-/// an enum discriminant.
+-///
+-/// We expect such blocks to have a call to `discriminant` as their last statement like so:
+-/// _42 = discriminant(_1)
++/// Look at the last statement of a block that ends with to see if it is an assignment of an enum
++/// discriminant to the local that determines the target of a `SwitchInt` like so:
++/// _42 = discriminant(..)
+ /// SwitchInt(_42, ..)
+-///
+-/// If the basic block matches this pattern, this function returns the place corresponding to the
+-/// enum (`_1` in the example above) as well as the `AdtDef` of that enum.
+ fn switch_on_enum_discriminant(
+ tcx: TyCtxt<'tcx>,
+- body: &'mir mir::Body<'tcx>,
+- block: &'mir mir::BasicBlockData<'tcx>,
++ body: &mir::Body<'tcx>,
++ block: &mir::BasicBlockData<'tcx>,
+ switch_on: &mir::Place<'tcx>,
+-) -> Option<(&'mir mir::Place<'tcx>, &'tcx ty::AdtDef)> {
++) -> Option<&'tcx ty::AdtDef> {
+ match block.statements.last().map(|stmt| &stmt.kind) {
+ Some(mir::StatementKind::Assign(box (lhs, mir::Rvalue::Discriminant(discriminated))))
+ if lhs == switch_on =>
+ {
+ match &discriminated.ty(body, tcx).ty.kind {
+- ty::Adt(def, _) => Some((discriminated, def)),
++ ty::Adt(def, _) => Some(def),
+
+ // `Rvalue::Discriminant` is also used to get the active yield point for a
+ // generator, but we do not need edge-specific effects in that case. This may
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