PERFORCE change 1191138 for review
John Baldwin
jhb at FreeBSD.org
Tue Feb 18 19:33:26 UTC 2014
http://p4web.freebsd.org/@@1191138?ac=10
Change 1191138 by jhb at jhb_jhbbsd on 2014/02/18 19:33:16
IFC @1191136
Affected files ...
.. //depot/projects/pci/sys/amd64/conf/GENERIC#15 integrate
.. //depot/projects/pci/sys/amd64/conf/NOTES#13 integrate
.. //depot/projects/pci/sys/amd64/include/cpufunc.h#7 integrate
.. //depot/projects/pci/sys/amd64/vmm/intel/vmcs.h#9 integrate
.. //depot/projects/pci/sys/amd64/vmm/intel/vmx.c#13 integrate
.. //depot/projects/pci/sys/amd64/vmm/intel/vmx.h#8 integrate
.. //depot/projects/pci/sys/amd64/vmm/io/vioapic.c#4 integrate
.. //depot/projects/pci/sys/amd64/vmm/io/vlapic.c#8 integrate
.. //depot/projects/pci/sys/amd64/vmm/io/vlapic_priv.h#4 integrate
.. //depot/projects/pci/sys/arm/arm/locore.S#9 integrate
.. //depot/projects/pci/sys/arm/arm/pmap-v6.c#10 integrate
.. //depot/projects/pci/sys/arm/arm/trap.c#8 integrate
.. //depot/projects/pci/sys/arm/at91/at91_spi.c#5 integrate
.. //depot/projects/pci/sys/arm/at91/at91_twi.c#5 integrate
.. //depot/projects/pci/sys/arm/at91/board_eb9200.c#2 integrate
.. //depot/projects/pci/sys/arm/broadcom/bcm2835/bcm2835_gpio.c#6 integrate
.. //depot/projects/pci/sys/arm/broadcom/bcm2835/bcm2835_mbox.c#5 integrate
.. //depot/projects/pci/sys/arm/conf/BEAGLEBONE#6 integrate
.. //depot/projects/pci/sys/arm/freescale/fsl_ocotp.c#1 branch
.. //depot/projects/pci/sys/arm/freescale/fsl_ocotpreg.h#1 branch
.. //depot/projects/pci/sys/arm/freescale/fsl_ocotpvar.h#1 branch
.. //depot/projects/pci/sys/arm/freescale/imx/files.imx6#3 integrate
.. //depot/projects/pci/sys/arm/freescale/imx/imx_machdep.h#2 integrate
.. //depot/projects/pci/sys/arm/freescale/imx/imx_sdhci.c#3 integrate
.. //depot/projects/pci/sys/arm/freescale/vybrid/files.vybrid#4 integrate
.. //depot/projects/pci/sys/arm/freescale/vybrid/vf_anadig.c#3 integrate
.. //depot/projects/pci/sys/arm/freescale/vybrid/vf_common.h#3 integrate
.. //depot/projects/pci/sys/arm/freescale/vybrid/vf_sai.c#1 branch
.. //depot/projects/pci/sys/arm/include/armreg.h#9 integrate
.. //depot/projects/pci/sys/arm/include/physmem.h#2 integrate
.. //depot/projects/pci/sys/arm/include/pmap.h#11 integrate
.. //depot/projects/pci/sys/arm/ti/ti_gpio.c#5 integrate
.. //depot/projects/pci/sys/arm/xscale/ixp425/avila_machdep.c#7 integrate
.. //depot/projects/pci/sys/boot/fdt/dts/beaglebone-black.dts#4 integrate
.. //depot/projects/pci/sys/boot/fdt/dts/imx6.dtsi#2 integrate
.. //depot/projects/pci/sys/boot/fdt/dts/vybrid.dtsi#4 integrate
.. //depot/projects/pci/sys/boot/fdt/dts/wandboard-dual.dts#2 integrate
.. //depot/projects/pci/sys/boot/fdt/dts/wandboard-quad.dts#2 integrate
.. //depot/projects/pci/sys/boot/fdt/dts/wandboard-solo.dts#2 integrate
.. //depot/projects/pci/sys/boot/fdt/fdt_loader_cmd.c#4 integrate
.. //depot/projects/pci/sys/boot/forth/loader.conf#11 integrate
.. //depot/projects/pci/sys/conf/WITHOUT_SOURCELESS_HOST#4 integrate
.. //depot/projects/pci/sys/conf/files#22 integrate
.. //depot/projects/pci/sys/conf/files.amd64#14 integrate
.. //depot/projects/pci/sys/conf/files.arm#11 integrate
.. //depot/projects/pci/sys/conf/files.i386#17 integrate
.. //depot/projects/pci/sys/conf/files.ia64#7 integrate
.. //depot/projects/pci/sys/conf/files.mips#11 integrate
.. //depot/projects/pci/sys/conf/files.pc98#8 integrate
.. //depot/projects/pci/sys/conf/files.powerpc#14 integrate
.. //depot/projects/pci/sys/conf/files.sparc64#9 integrate
.. //depot/projects/pci/sys/conf/kern.mk#12 integrate
.. //depot/projects/pci/sys/conf/options#20 integrate
.. //depot/projects/pci/sys/contrib/dev/nve/adapter.h#2 delete
.. //depot/projects/pci/sys/contrib/dev/nve/amd64/nvenetlib.README#4 delete
.. //depot/projects/pci/sys/contrib/dev/nve/amd64/nvenetlib.o.bz2.uu#3 delete
.. //depot/projects/pci/sys/contrib/dev/nve/basetype.h#2 delete
.. //depot/projects/pci/sys/contrib/dev/nve/drvinfo.h#2 delete
.. //depot/projects/pci/sys/contrib/dev/nve/i386/nvenetlib.README#4 delete
.. //depot/projects/pci/sys/contrib/dev/nve/i386/nvenetlib.o.bz2.uu#3 delete
.. //depot/projects/pci/sys/contrib/dev/nve/nvenet_version.h#2 delete
.. //depot/projects/pci/sys/contrib/dev/nve/os.h#2 delete
.. //depot/projects/pci/sys/contrib/dev/nve/phy.h#2 delete
.. //depot/projects/pci/sys/dev/cxgbe/iw_cxgbe/provider.c#2 integrate
.. //depot/projects/pci/sys/dev/etherswitch/arswitch/arswitch_reg.c#3 integrate
.. //depot/projects/pci/sys/dev/etherswitch/arswitch/arswitch_reg.h#3 integrate
.. //depot/projects/pci/sys/dev/etherswitch/arswitch/arswitchreg.h#5 integrate
.. //depot/projects/pci/sys/dev/fdt/fdt_common.c#9 integrate
.. //depot/projects/pci/sys/dev/fdt/fdt_common.h#8 integrate
.. //depot/projects/pci/sys/dev/fdt/simplebus.c#8 integrate
.. //depot/projects/pci/sys/dev/gpio/gpiobus.c#6 integrate
.. //depot/projects/pci/sys/dev/gpio/gpiobusvar.h#3 integrate
.. //depot/projects/pci/sys/dev/gpio/gpioiic.c#5 integrate
.. //depot/projects/pci/sys/dev/gpio/gpioled.c#4 integrate
.. //depot/projects/pci/sys/dev/gpio/ofw_gpiobus.c#1 branch
.. //depot/projects/pci/sys/dev/iicbus/iicbb.c#5 integrate
.. //depot/projects/pci/sys/dev/mmc/mmc.c#9 integrate
.. //depot/projects/pci/sys/dev/nand/nandbus.c#5 integrate
.. //depot/projects/pci/sys/dev/netmap/netmap.c#8 integrate
.. //depot/projects/pci/sys/dev/netmap/netmap_freebsd.c#3 integrate
.. //depot/projects/pci/sys/dev/netmap/netmap_generic.c#4 integrate
.. //depot/projects/pci/sys/dev/netmap/netmap_kern.h#7 integrate
.. //depot/projects/pci/sys/dev/netmap/netmap_mem2.c#6 integrate
.. //depot/projects/pci/sys/dev/netmap/netmap_mem2.h#4 integrate
.. //depot/projects/pci/sys/dev/netmap/netmap_offloadings.c#1 branch
.. //depot/projects/pci/sys/dev/netmap/netmap_pipe.c#1 branch
.. //depot/projects/pci/sys/dev/netmap/netmap_vale.c#4 integrate
.. //depot/projects/pci/sys/dev/nve/if_nve.c#6 delete
.. //depot/projects/pci/sys/dev/nve/if_nvereg.h#3 delete
.. //depot/projects/pci/sys/dev/ofw/ofw_iicbus.c#5 integrate
.. //depot/projects/pci/sys/dev/qlxgb/qla_hw.c#5 integrate
.. //depot/projects/pci/sys/dev/qlxgb/qla_os.c#4 integrate
.. //depot/projects/pci/sys/dev/sdhci/sdhci.c#7 integrate
.. //depot/projects/pci/sys/dev/sdhci/sdhci.h#6 integrate
.. //depot/projects/pci/sys/dev/sound/pcm/sound.c#5 integrate
.. //depot/projects/pci/sys/dev/usb/controller/ehci.c#11 integrate
.. //depot/projects/pci/sys/dev/usb/controller/musb_otg.c#9 integrate
.. //depot/projects/pci/sys/dev/usb/controller/uss820dci.c#6 integrate
.. //depot/projects/pci/sys/dev/usb/controller/xhci.c#12 integrate
.. //depot/projects/pci/sys/dev/usb/controller/xhci.h#7 integrate
.. //depot/projects/pci/sys/dev/usb/controller/xhci_pci.c#8 integrate
.. //depot/projects/pci/sys/dev/usb/input/wsp.c#2 integrate
.. //depot/projects/pci/sys/dev/usb/net/usb_ethernet.c#5 integrate
.. //depot/projects/pci/sys/dev/usb/quirk/usb_quirk.c#9 integrate
.. //depot/projects/pci/sys/dev/usb/wlan/if_urtwn.c#6 integrate
.. //depot/projects/pci/sys/dev/xen/console/console.c#7 integrate
.. //depot/projects/pci/sys/fs/nandfs/nandfs_vfsops.c#2 integrate
.. //depot/projects/pci/sys/i386/conf/GENERIC#15 integrate
.. //depot/projects/pci/sys/i386/conf/NOTES#12 integrate
.. //depot/projects/pci/sys/i386/conf/PAE#8 integrate
.. //depot/projects/pci/sys/i386/conf/XEN#7 integrate
.. //depot/projects/pci/sys/i386/include/cpufunc.h#5 integrate
.. //depot/projects/pci/sys/i386/xbox/xbox.c#3 integrate
.. //depot/projects/pci/sys/kern/kern_descrip.c#16 integrate
.. //depot/projects/pci/sys/kern/kern_timeout.c#9 integrate
.. //depot/projects/pci/sys/kern/kern_uuid.c#5 integrate
.. //depot/projects/pci/sys/kern/subr_hints.c#4 integrate
.. //depot/projects/pci/sys/mips/atheros/ar724x_pci.c#5 integrate
.. //depot/projects/pci/sys/mips/conf/AR934X_BASE#3 integrate
.. //depot/projects/pci/sys/mips/conf/AR934X_BASE.hints#2 integrate
.. //depot/projects/pci/sys/mips/conf/DB120#3 integrate
.. //depot/projects/pci/sys/mips/conf/DB120.hints#3 integrate
.. //depot/projects/pci/sys/mips/conf/OCTEON1#11 integrate
.. //depot/projects/pci/sys/modules/Makefile#16 integrate
.. //depot/projects/pci/sys/modules/netmap/Makefile#3 integrate
.. //depot/projects/pci/sys/modules/nve/Makefile#4 delete
.. //depot/projects/pci/sys/modules/wlan/Makefile#7 integrate
.. //depot/projects/pci/sys/net/flowtable.c#6 integrate
.. //depot/projects/pci/sys/net/flowtable.h#4 integrate
.. //depot/projects/pci/sys/net/netmap.h#7 integrate
.. //depot/projects/pci/sys/net/netmap_user.h#7 integrate
.. //depot/projects/pci/sys/net/pfvar.h#4 integrate
.. //depot/projects/pci/sys/netinet/ip_output.c#15 integrate
.. //depot/projects/pci/sys/netinet6/ip6_input.c#12 integrate
.. //depot/projects/pci/sys/netinet6/ip6_output.c#10 integrate
.. //depot/projects/pci/sys/netinet6/nd6.c#17 integrate
.. //depot/projects/pci/sys/netpfil/ipfw/dummynet.txt#2 integrate
.. //depot/projects/pci/sys/netpfil/ipfw/ip_fw_dynamic.c#5 integrate
.. //depot/projects/pci/sys/netpfil/ipfw/ip_fw_table.c#3 integrate
.. //depot/projects/pci/sys/netpfil/pf/if_pfsync.c#5 integrate
.. //depot/projects/pci/sys/netpfil/pf/pf.c#7 integrate
.. //depot/projects/pci/sys/netpfil/pf/pf_ioctl.c#5 integrate
.. //depot/projects/pci/sys/powerpc/ofw/ofw_real.c#6 integrate
.. //depot/projects/pci/sys/sys/capability.h#9 integrate
.. //depot/projects/pci/sys/sys/mbuf.h#12 integrate
.. //depot/projects/pci/sys/sys/param.h#19 integrate
.. //depot/projects/pci/sys/vm/uma_core.c#12 integrate
.. //depot/projects/pci/sys/vm/vm_object.c#12 integrate
Differences ...
==== //depot/projects/pci/sys/amd64/conf/GENERIC#15 (text+ko) ====
@@ -16,12 +16,12 @@
# If you are in doubt as to the purpose or necessity of a line, check first
# in NOTES.
#
-# $FreeBSD: head/sys/amd64/conf/GENERIC 258768 2013-11-30 15:08:35Z pjd $
+# $FreeBSD: head/sys/amd64/conf/GENERIC 261991 2014-02-16 19:44:07Z dim $
cpu HAMMER
ident GENERIC
-makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
+makeoptions DEBUG=-gdwarf-2 # Build kernel with gdb(1) debug symbols
makeoptions WITH_CTF=1 # Run ctfconvert(1) for DTrace support
options SCHED_ULE # ULE scheduler
@@ -235,7 +235,6 @@
device msk # Marvell/SysKonnect Yukon II Gigabit Ethernet
device nfe # nVidia nForce MCP on-board Ethernet
device nge # NatSemi DP83820 gigabit Ethernet
-#device nve # nVidia nForce MCP on-board Ethernet Networking
device pcn # AMD Am79C97x PCI 10/100 (precedence over 'le')
device re # RealTek 8139C+/8169/8169S/8110S
device rl # RealTek 8129/8139
==== //depot/projects/pci/sys/amd64/conf/NOTES#13 (text+ko) ====
@@ -4,7 +4,7 @@
# This file contains machine dependent kernel configuration notes. For
# machine independent notes, look in /sys/conf/NOTES.
#
-# $FreeBSD: head/sys/amd64/conf/NOTES 260847 2014-01-18 06:14:38Z bryanv $
+# $FreeBSD: head/sys/amd64/conf/NOTES 261975 2014-02-16 12:22:43Z brueffer $
#
#
@@ -309,7 +309,6 @@
# mlxen: Mellanox ConnectX HCA Ethernet
# mthca: Mellanox HCA InfiniBand
# nfe: nVidia nForce MCP on-board Ethernet Networking (BSD open source)
-# nve: nVidia nForce MCP on-board Ethernet Networking
# sfxge: Solarflare SFC9000 family 10Gb Ethernet adapters
# vmx: VMware VMXNET3 Ethernet (BSD open source)
# wpi: Intel 3945ABG Wireless LAN controller
@@ -327,7 +326,6 @@
device mlxen # Mellanox ConnectX HCA Ethernet
device mthca # Mellanox HCA InfiniBand
device nfe # nVidia nForce MCP on-board Ethernet
-device nve # nVidia nForce MCP on-board Ethernet Networking
device sfxge # Solarflare SFC9000 10Gb Ethernet
device vmx # VMware VMXNET3 Ethernet
device wpi # Intel 3945ABG wireless NICs.
==== //depot/projects/pci/sys/amd64/include/cpufunc.h#7 (text+ko) ====
@@ -27,7 +27,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $FreeBSD: head/sys/amd64/include/cpufunc.h 255331 2013-09-06 22:17:02Z gibbs $
+ * $FreeBSD: head/sys/amd64/include/cpufunc.h 261891 2014-02-14 15:18:37Z avg $
*/
/*
@@ -154,6 +154,14 @@
return (mask == 0 ? mask : (int)bsfq((u_long)mask) + 1);
}
+#define HAVE_INLINE_FFSLL
+
+static __inline int
+ffsll(long long mask)
+{
+ return (ffsl((long)mask));
+}
+
#define HAVE_INLINE_FLS
static __inline int
@@ -170,6 +178,14 @@
return (mask == 0 ? mask : (int)bsrq((u_long)mask) + 1);
}
+#define HAVE_INLINE_FLSLL
+
+static __inline int
+flsll(long long mask)
+{
+ return (flsl((long)mask));
+}
+
#endif /* _KERNEL */
static __inline void
==== //depot/projects/pci/sys/amd64/vmm/intel/vmcs.h#9 (text+ko) ====
@@ -23,7 +23,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $FreeBSD: head/sys/amd64/vmm/intel/vmcs.h 261170 2014-01-25 20:58:05Z neel $
+ * $FreeBSD: head/sys/amd64/vmm/intel/vmcs.h 262144 2014-02-18 03:07:36Z jhb $
*/
#ifndef _VMCS_H_
@@ -345,6 +345,8 @@
#define VMCS_INTR_T_MASK 0x700 /* Interruption-info type */
#define VMCS_INTR_T_HWINTR (0 << 8)
#define VMCS_INTR_T_NMI (2 << 8)
+#define VMCS_INTR_T_HWEXCEPTION (3 << 8)
+#define VMCS_INTR_DEL_ERRCODE (1 << 11)
/*
* VMCS IDT-Vectoring information fields
==== //depot/projects/pci/sys/amd64/vmm/intel/vmx.c#13 (text+ko) ====
@@ -23,11 +23,11 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $FreeBSD: head/sys/amd64/vmm/intel/vmx.c 261638 2014-02-08 16:37:54Z jhb $
+ * $FreeBSD: head/sys/amd64/vmm/intel/vmx.c 262144 2014-02-18 03:07:36Z jhb $
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: head/sys/amd64/vmm/intel/vmx.c 261638 2014-02-08 16:37:54Z jhb $");
+__FBSDID("$FreeBSD: head/sys/amd64/vmm/intel/vmx.c 262144 2014-02-18 03:07:36Z jhb $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -884,6 +884,7 @@
vmx->state[i].lastcpu = -1;
vmx->state[i].vpid = vpid[i];
+ vmx->state[i].user_event.intr_info = 0;
msr_save_area_init(vmx->guest_msrs[i], &guest_msr_count);
@@ -1062,6 +1063,66 @@
VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING)
static void
+vmx_inject_user_event(struct vmx *vmx, int vcpu)
+{
+ struct vmxevent *user_event;
+ uint32_t info;
+
+ user_event = &vmx->state[vcpu].user_event;
+
+ info = vmcs_read(VMCS_ENTRY_INTR_INFO);
+ KASSERT((info & VMCS_INTR_VALID) == 0, ("vmx_inject_user_event: invalid "
+ "VM-entry interruption information %#x", info));
+
+ vmcs_write(VMCS_ENTRY_INTR_INFO, user_event->intr_info);
+ if (user_event->intr_info & VMCS_INTR_DEL_ERRCODE)
+ vmcs_write(VMCS_ENTRY_EXCEPTION_ERROR, user_event->error_code);
+ user_event->intr_info = 0;
+}
+
+static void
+vmx_inject_exception(struct vmx *vmx, int vcpu, struct vm_exit *vmexit,
+ int fault, int errvalid, int errcode)
+{
+ uint32_t info;
+
+ info = vmcs_read(VMCS_ENTRY_INTR_INFO);
+ KASSERT((info & VMCS_INTR_VALID) == 0, ("vmx_inject_exception: invalid "
+ "VM-entry interruption information %#x", info));
+
+ /*
+ * Although INTR_T_HWEXCEPTION does not advance %rip, vmx_run()
+ * always advances it, so we clear the instruction length to zero
+ * explicitly.
+ */
+ vmexit->inst_length = 0;
+ info = fault | VMCS_INTR_T_HWEXCEPTION | VMCS_INTR_VALID;
+ if (errvalid) {
+ info |= VMCS_INTR_DEL_ERRCODE;
+ vmcs_write(VMCS_ENTRY_EXCEPTION_ERROR, errcode);
+ }
+ vmcs_write(VMCS_ENTRY_INTR_INFO, info);
+
+ VCPU_CTR2(vmx->vm, vcpu, "Injecting fault %d (errcode %d)", fault,
+ errcode);
+}
+
+/* All GP# faults VMM injects use an error code of 0. */
+static void
+vmx_inject_gp(struct vmx *vmx, int vcpu, struct vm_exit *vmexit)
+{
+
+ vmx_inject_exception(vmx, vcpu, vmexit, IDT_GP, 1, 0);
+}
+
+static void
+vmx_inject_ud(struct vmx *vmx, int vcpu, struct vm_exit *vmexit)
+{
+
+ vmx_inject_exception(vmx, vcpu, vmexit, IDT_UD, 0, 0);
+}
+
+static void
vmx_inject_nmi(struct vmx *vmx, int vcpu)
{
uint32_t gi, info;
@@ -1126,6 +1187,24 @@
vmx_set_nmi_window_exiting(vmx, vcpu);
}
+ /*
+ * If there is a user injection event pending and there isn't
+ * an interrupt queued already, inject the user event.
+ */
+ if (vmx->state[vcpu].user_event.intr_info & VMCS_INTR_VALID) {
+ info = vmcs_read(VMCS_ENTRY_INTR_INFO);
+ if ((info & VMCS_INTR_VALID) == 0) {
+ vmx_inject_user_event(vmx, vcpu);
+ } else {
+ /*
+ * XXX: Do we need to force an exit so this can
+ * be injected?
+ */
+ VCPU_CTR1(vmx->vm, vcpu, "Cannot inject user event "
+ "due to VM-entry intr info %#x", info);
+ }
+ }
+
if (virtual_interrupt_delivery) {
vmx_inject_pir(vlapic);
return;
@@ -1228,7 +1307,7 @@
}
static int
-vmx_emulate_xsetbv(struct vmx *vmx, int vcpu)
+vmx_emulate_xsetbv(struct vmx *vmx, int vcpu, struct vm_exit *vmexit)
{
struct vmxctx *vmxctx;
uint64_t xcrval;
@@ -1237,20 +1316,40 @@
vmxctx = &vmx->ctx[vcpu];
limits = vmm_get_xsave_limits();
- /* We only handle xcr0 if the host has XSAVE enabled. */
- if (vmxctx->guest_rcx != 0 || !limits->xsave_enabled)
- return (UNHANDLED);
+ /*
+ * Note that the processor raises a GP# fault on its own if
+ * xsetbv is executed for CPL != 0, so we do not have to
+ * emulate that fault here.
+ */
+
+ /* Only xcr0 is supported. */
+ if (vmxctx->guest_rcx != 0) {
+ vmx_inject_gp(vmx, vcpu, vmexit);
+ return (HANDLED);
+ }
+
+ /* We only handle xcr0 if both the host and guest have XSAVE enabled. */
+ if (!limits->xsave_enabled || !(vmcs_read(VMCS_GUEST_CR4) & CR4_XSAVE)) {
+ vmx_inject_ud(vmx, vcpu, vmexit);
+ return (HANDLED);
+ }
xcrval = vmxctx->guest_rdx << 32 | (vmxctx->guest_rax & 0xffffffff);
- if ((xcrval & ~limits->xcr0_allowed) != 0)
- return (UNHANDLED);
+ if ((xcrval & ~limits->xcr0_allowed) != 0) {
+ vmx_inject_gp(vmx, vcpu, vmexit);
+ return (HANDLED);
+ }
- if (!(xcrval & XFEATURE_ENABLED_X87))
- return (UNHANDLED);
+ if (!(xcrval & XFEATURE_ENABLED_X87)) {
+ vmx_inject_gp(vmx, vcpu, vmexit);
+ return (HANDLED);
+ }
if ((xcrval & (XFEATURE_ENABLED_AVX | XFEATURE_ENABLED_SSE)) ==
- XFEATURE_ENABLED_AVX)
- return (UNHANDLED);
+ XFEATURE_ENABLED_AVX) {
+ vmx_inject_gp(vmx, vcpu, vmexit);
+ return (HANDLED);
+ }
/*
* This runs "inside" vmrun() with the guest's FPU state, so
@@ -1448,7 +1547,7 @@
if (!virtual_interrupt_delivery)
return (UNHANDLED);
- handled = 1;
+ handled = HANDLED;
offset = APIC_WRITE_OFFSET(qual);
switch (offset) {
case APIC_OFFSET_ID:
@@ -1470,7 +1569,7 @@
retu = false;
error = vlapic_icrlo_write_handler(vlapic, &retu);
if (error != 0 || retu)
- handled = 0;
+ handled = UNHANDLED;
break;
case APIC_OFFSET_CMCI_LVT:
case APIC_OFFSET_TIMER_LVT ... APIC_OFFSET_ERROR_LVT:
@@ -1483,7 +1582,7 @@
vlapic_dcr_write_handler(vlapic);
break;
default:
- handled = 0;
+ handled = UNHANDLED;
break;
}
return (handled);
@@ -1583,7 +1682,7 @@
CTASSERT((PINBASED_CTLS_ONE_SETTING & PINBASED_VIRTUAL_NMI) != 0);
CTASSERT((PINBASED_CTLS_ONE_SETTING & PINBASED_NMI_EXITING) != 0);
- handled = 0;
+ handled = UNHANDLED;
vmxctx = &vmx->ctx[vcpu];
qual = vmexit->u.vmx.exit_qualification;
@@ -1646,7 +1745,7 @@
vmexit->exitcode = VM_EXITCODE_RDMSR;
vmexit->u.msr.code = ecx;
} else if (!retu) {
- handled = 1;
+ handled = HANDLED;
} else {
/* Return to userspace with a valid exitcode */
KASSERT(vmexit->exitcode != VM_EXITCODE_BOGUS,
@@ -1666,7 +1765,7 @@
vmexit->u.msr.code = ecx;
vmexit->u.msr.wval = (uint64_t)edx << 32 | eax;
} else if (!retu) {
- handled = 1;
+ handled = HANDLED;
} else {
/* Return to userspace with a valid exitcode */
KASSERT(vmexit->exitcode != VM_EXITCODE_BOGUS,
@@ -1809,7 +1908,7 @@
handled = vmx_handle_apic_write(vlapic, qual);
break;
case EXIT_REASON_XSETBV:
- handled = vmx_emulate_xsetbv(vmx, vcpu);
+ handled = vmx_emulate_xsetbv(vmx, vcpu, vmexit);
break;
default:
vmm_stat_incr(vmx->vm, vcpu, VMEXIT_UNKNOWN, 1);
@@ -2239,10 +2338,8 @@
vmx_inject(void *arg, int vcpu, int type, int vector, uint32_t code,
int code_valid)
{
- int error;
- uint64_t info;
struct vmx *vmx = arg;
- struct vmcs *vmcs = &vmx->vmcs[vcpu];
+ struct vmxevent *user_event = &vmx->state[vcpu].user_event;
static uint32_t type_map[VM_EVENT_MAX] = {
0x1, /* VM_EVENT_NONE */
@@ -2258,25 +2355,15 @@
* If there is already an exception pending to be delivered to the
* vcpu then just return.
*/
- error = vmcs_getreg(vmcs, 0, VMCS_IDENT(VMCS_ENTRY_INTR_INFO), &info);
- if (error)
- return (error);
-
- if (info & VMCS_INTR_VALID)
+ if (user_event->intr_info & VMCS_INTR_VALID)
return (EAGAIN);
- info = vector | (type_map[type] << 8) | (code_valid ? 1 << 11 : 0);
- info |= VMCS_INTR_VALID;
- error = vmcs_setreg(vmcs, 0, VMCS_IDENT(VMCS_ENTRY_INTR_INFO), info);
- if (error != 0)
- return (error);
-
+ user_event->intr_info = vector | (type_map[type] << 8) | VMCS_INTR_VALID;
if (code_valid) {
- error = vmcs_setreg(vmcs, 0,
- VMCS_IDENT(VMCS_ENTRY_EXCEPTION_ERROR),
- code);
+ user_event->intr_info |= VMCS_INTR_DEL_ERRCODE;
+ user_event->error_code = code;
}
- return (error);
+ return (0);
}
static int
==== //depot/projects/pci/sys/amd64/vmm/intel/vmx.h#8 (text+ko) ====
@@ -23,7 +23,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $FreeBSD: head/sys/amd64/vmm/intel/vmx.h 261453 2014-02-04 02:45:08Z neel $
+ * $FreeBSD: head/sys/amd64/vmm/intel/vmx.h 262144 2014-02-18 03:07:36Z jhb $
*/
#ifndef _VMX_H_
@@ -80,9 +80,15 @@
uint32_t proc_ctls2;
};
+struct vmxevent {
+ uint32_t intr_info;
+ uint32_t error_code;
+};
+
struct vmxstate {
int lastcpu; /* host cpu that this 'vcpu' last ran on */
uint16_t vpid;
+ struct vmxevent user_event;
};
struct apic_page {
==== //depot/projects/pci/sys/amd64/vmm/io/vioapic.c#4 (text+ko) ====
@@ -24,11 +24,11 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $FreeBSD: head/sys/amd64/vmm/io/vioapic.c 260619 2014-01-14 01:55:58Z neel $
+ * $FreeBSD: head/sys/amd64/vmm/io/vioapic.c 262139 2014-02-17 22:57:51Z neel $
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: head/sys/amd64/vmm/io/vioapic.c 260619 2014-01-14 01:55:58Z neel $");
+__FBSDID("$FreeBSD: head/sys/amd64/vmm/io/vioapic.c 262139 2014-02-17 22:57:51Z neel $");
#include <sys/param.h>
#include <sys/queue.h>
@@ -64,8 +64,8 @@
} rtbl[REDIR_ENTRIES];
};
-#define VIOAPIC_LOCK(vioapic) mtx_lock(&((vioapic)->mtx))
-#define VIOAPIC_UNLOCK(vioapic) mtx_unlock(&((vioapic)->mtx))
+#define VIOAPIC_LOCK(vioapic) mtx_lock_spin(&((vioapic)->mtx))
+#define VIOAPIC_UNLOCK(vioapic) mtx_unlock_spin(&((vioapic)->mtx))
#define VIOAPIC_LOCKED(vioapic) mtx_owned(&((vioapic)->mtx))
static MALLOC_DEFINE(M_VIOAPIC, "vioapic", "bhyve virtual ioapic");
@@ -476,7 +476,7 @@
vioapic = malloc(sizeof(struct vioapic), M_VIOAPIC, M_WAITOK | M_ZERO);
vioapic->vm = vm;
- mtx_init(&vioapic->mtx, "vioapic lock", NULL, MTX_DEF);
+ mtx_init(&vioapic->mtx, "vioapic lock", NULL, MTX_SPIN);
/* Initialize all redirection entries to mask all interrupts */
for (i = 0; i < REDIR_ENTRIES; i++)
==== //depot/projects/pci/sys/amd64/vmm/io/vlapic.c#8 (text+ko) ====
@@ -23,11 +23,11 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $FreeBSD: head/sys/amd64/vmm/io/vlapic.c 261170 2014-01-25 20:58:05Z neel $
+ * $FreeBSD: head/sys/amd64/vmm/io/vlapic.c 262140 2014-02-17 23:07:16Z neel $
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: head/sys/amd64/vmm/io/vlapic.c 261170 2014-01-25 20:58:05Z neel $");
+__FBSDID("$FreeBSD: head/sys/amd64/vmm/io/vlapic.c 262140 2014-02-17 23:07:16Z neel $");
#include <sys/param.h>
#include <sys/lock.h>
@@ -289,9 +289,11 @@
* the vlapic TMR registers.
*/
tmrptr = &lapic->tmr0;
- KASSERT((tmrptr[idx] & mask) == (level ? mask : 0),
- ("vlapic TMR[%d] is 0x%08x but interrupt is %s-triggered",
- idx / 4, tmrptr[idx], level ? "level" : "edge"));
+ if ((tmrptr[idx] & mask) != (level ? mask : 0)) {
+ VLAPIC_CTR3(vlapic, "vlapic TMR[%d] is 0x%08x but "
+ "interrupt is %s-triggered", idx / 4, tmrptr[idx],
+ level ? "level" : "edge");
+ }
VLAPIC_CTR_IRR(vlapic, "vlapic_set_intr_ready");
return (1);
@@ -997,6 +999,18 @@
return (1);
}
+static void
+vlapic_self_ipi_handler(struct vlapic *vlapic, uint64_t val)
+{
+ int vec;
+
+ vec = val & 0xff;
+ lapic_intr_edge(vlapic->vm, vlapic->vcpuid, vec);
+ vmm_stat_array_incr(vlapic->vm, vlapic->vcpuid, IPIS_SENT,
+ vlapic->vcpuid, 1);
+ VLAPIC_CTR1(vlapic, "vlapic self-ipi %d", vec);
+}
+
int
vlapic_pending_intr(struct vlapic *vlapic, int *vecptr)
{
@@ -1190,6 +1204,12 @@
case APIC_OFFSET_TIMER_DCR:
*data = lapic->dcr_timer;
break;
+ case APIC_OFFSET_SELF_IPI:
+ /*
+ * XXX generate a GP fault if vlapic is in x2apic mode
+ */
+ *data = 0;
+ break;
case APIC_OFFSET_RRR:
default:
*data = 0;
@@ -1270,6 +1290,12 @@
case APIC_OFFSET_ESR:
vlapic_esr_write_handler(vlapic);
break;
+
+ case APIC_OFFSET_SELF_IPI:
+ if (x2apic(vlapic))
+ vlapic_self_ipi_handler(vlapic, data);
+ break;
+
case APIC_OFFSET_VER:
case APIC_OFFSET_APR:
case APIC_OFFSET_PPR:
==== //depot/projects/pci/sys/amd64/vmm/io/vlapic_priv.h#4 (text+ko) ====
@@ -23,7 +23,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $FreeBSD: head/sys/amd64/vmm/io/vlapic_priv.h 261170 2014-01-25 20:58:05Z neel $
+ * $FreeBSD: head/sys/amd64/vmm/io/vlapic_priv.h 262140 2014-02-17 23:07:16Z neel $
*/
#ifndef _VLAPIC_PRIV_H_
@@ -81,6 +81,7 @@
#define APIC_OFFSET_TIMER_ICR 0x380 /* Timer's Initial Count */
#define APIC_OFFSET_TIMER_CCR 0x390 /* Timer's Current Count */
#define APIC_OFFSET_TIMER_DCR 0x3E0 /* Timer's Divide Configuration */
+#define APIC_OFFSET_SELF_IPI 0x3F0 /* Self IPI register */
#define VLAPIC_CTR0(vlapic, format) \
VCPU_CTR0((vlapic)->vm, (vlapic)->vcpuid, format)
@@ -91,6 +92,9 @@
#define VLAPIC_CTR2(vlapic, format, p1, p2) \
VCPU_CTR2((vlapic)->vm, (vlapic)->vcpuid, format, p1, p2)
+#define VLAPIC_CTR3(vlapic, format, p1, p2, p3) \
+ VCPU_CTR3((vlapic)->vm, (vlapic)->vcpuid, format, p1, p2, p3)
+
#define VLAPIC_CTR_IRR(vlapic, msg) \
do { \
uint32_t *irrptr = &(vlapic)->apic_page->irr0; \
==== //depot/projects/pci/sys/arm/arm/locore.S#9 (text+ko) ====
@@ -39,7 +39,7 @@
#include <machine/armreg.h>
#include <machine/pte.h>
-__FBSDID("$FreeBSD: head/sys/arm/arm/locore.S 261783 2014-02-11 22:09:03Z imp $");
+__FBSDID("$FreeBSD: head/sys/arm/arm/locore.S 261855 2014-02-13 21:30:54Z andrew $");
/* What size should this really be ? It is only used by initarm() */
#define INIT_ARM_STACK_SIZE (2048 * 4)
@@ -148,15 +148,31 @@
* Build page table from scratch.
*/
- /* Load the page tables physical address */
- ldr r1, Lstartup_pagetable
- ldr r2, =(KERNVIRTADDR - KERNPHYSADDR)
+ /* Find the delta between VA and PA */
+ adr r0, Lpagetable
+ ldr r1, [r0]
+ sub r2, r1, r0
+ /* At this point: r2 = VA - PA */
+
+ /*
+ * Find the physical address of the table. After these two
+ * instructions:
+ * r1 = va(pagetable)
+ *
+ * r0 = va(pagetable) - (VA - PA)
+ * = va(pagetable) - VA + PA
+ * = pa(pagetable)
+ */
+ ldr r1, [r0, #4]
sub r0, r1, r2
/*
* Map PA == VA
*/
- ldr r5, =(PHYSADDR)
+ /* Find the start kernels load address */
+ adr r5, _start
+ ldr r2, =(L1_S_OFFSET)
+ bic r5, r2
mov r1, r5
mov r2, r5
/* Map 64MiB, preserved over calls to build_pagetables */
@@ -165,7 +181,7 @@
/* Create the kernel map to jump to */
mov r1, r5
- ldr r2, =(KERNBASE)
+ ldr r2, =(KERNVIRTADDR)
bl build_pagetables
#if defined(SOCDEV_PA) && defined(SOCDEV_VA)
@@ -223,16 +239,16 @@
virt_done:
mov r1, #28 /* loader info size is 28 bytes also second arg */
subs sp, sp, r1 /* allocate arm_boot_params struct on stack */
+ mov r0, sp /* loader info pointer is first arg */
bic sp, sp, #7 /* align stack to 8 bytes */
- mov r0, sp /* loader info pointer is first arg */
str r1, [r0] /* Store length of loader info */
str r9, [r0, #4] /* Store r0 from boot loader */
str r8, [r0, #8] /* Store r1 from boot loader */
str ip, [r0, #12] /* store r2 from boot loader */
str fp, [r0, #16] /* store r3 from boot loader */
- ldr r5, =KERNPHYSADDR /* load KERNPHYSADDR as the physical address */
str r5, [r0, #20] /* store the physical address */
- ldr r5, Lstartup_pagetable
+ adr r4, Lpagetable /* load the pagetable address */
+ ldr r5, [r4, #4]
str r5, [r0, #24] /* store the pagetable address */
mov fp, #0 /* trace back starts here */
bl _C_LABEL(initarm) /* Off we go */
@@ -279,16 +295,19 @@
RET
+Lpagetable:
+ .word .
+ .word pagetable
+
Lvirtaddr:
.word KERNVIRTADDR
Lphysaddr:
.word KERNPHYSADDR
Lreal_start:
.word _start
-Lend:
+Lend:
.word _edata
-Lstartup_pagetable:
- .word pagetable
+
#ifdef SMP
Lstartup_pagetable_secondary:
.word temp_pagetable
==== //depot/projects/pci/sys/arm/arm/pmap-v6.c#10 (text+ko) ====
@@ -146,7 +146,7 @@
#include "opt_pmap.h"
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: head/sys/arm/arm/pmap-v6.c 261596 2014-02-07 14:38:51Z ian $");
+__FBSDID("$FreeBSD: head/sys/arm/arm/pmap-v6.c 261922 2014-02-15 13:27:45Z zbb $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
@@ -2924,10 +2924,21 @@
pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
vm_prot_t prot, boolean_t wired)
{
+ struct l2_bucket *l2b;
rw_wlock(&pvh_global_lock);
PMAP_LOCK(pmap);
pmap_enter_locked(pmap, va, access, m, prot, wired, M_WAITOK);
+ /*
+ * If both the l2b_occupancy and the reservation are fully
+ * populated, then attempt promotion.
+ */
+ l2b = pmap_get_l2_bucket(pmap, va);
+ if ((l2b != NULL) && (l2b->l2b_occupancy == L2_PTE_NUM_TOTAL) &&
+ sp_enabled && (m->flags & PG_FICTITIOUS) == 0 &&
+ vm_reserv_level_iffullpop(m) == 0)
+ pmap_promote_section(pmap, va);
+
PMAP_UNLOCK(pmap);
rw_wunlock(&pvh_global_lock);
}
@@ -2962,8 +2973,10 @@
}
pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
- if ((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO)
- panic("pmap_enter_locked: attempt pmap_enter_on 1MB page");
+ if ((va < VM_MAXUSER_ADDRESS) &&
+ (*pl1pd & L1_TYPE_MASK) == L1_S_PROTO) {
+ (void)pmap_demote_section(pmap, va);
+ }
user = 0;
/*
@@ -3003,6 +3016,10 @@
}
}
+ pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
+ if ((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO)
+ panic("pmap_enter: attempt to enter on 1MB page, va: %#x", va);
+
ptep = &l2b->l2b_kva[l2pte_index(va)];
opte = *ptep;
@@ -3153,14 +3170,6 @@
if ((pmap != pmap_kernel()) && (pmap == &curproc->p_vmspace->vm_pmap))
cpu_icache_sync_range(va, PAGE_SIZE);
- /*
- * If both the l2b_occupancy and the reservation are fully
- * populated, then attempt promotion.
- */
- if ((l2b->l2b_occupancy == L2_PTE_NUM_TOTAL) &&
- sp_enabled && (m->flags & PG_FICTITIOUS) == 0 &&
- vm_reserv_level_iffullpop(m) == 0)
- pmap_promote_section(pmap, va);
}
/*
@@ -3325,10 +3334,6 @@
l1idx = L1_IDX(va);
l1pd = pmap->pm_l1->l1_kva[l1idx];
if (l1pte_section_p(l1pd)) {
- /*
- * These should only happen for the kernel pmap.
- */
- KASSERT(pmap == kernel_pmap, ("unexpected section"));
/* XXX: what to do about the bits > 32 ? */
if (l1pd & L1_S_SUPERSEC)
pa = (l1pd & L1_SUP_FRAME) | (va & L1_SUP_OFFSET);
@@ -3700,13 +3705,14 @@
KASSERT(l2b->l2b_occupancy == L2_PTE_NUM_TOTAL,
("pmap_remove_section: l2_bucket occupancy error"));
pmap_free_l2_bucket(pmap, l2b, L2_PTE_NUM_TOTAL);
- /*
- * Now invalidate L1 slot as it was not invalidated in
- * pmap_free_l2_bucket() due to L1_TYPE mismatch.
- */
- *pl1pd = 0;
- PTE_SYNC(pl1pd);
}
+ /* Now invalidate L1 slot */
+ *pl1pd = 0;
+ PTE_SYNC(pl1pd);
+ if (L1_S_EXECUTABLE(l1pd))
+ cpu_tlb_flushID_SE(sva);
+ else
+ cpu_tlb_flushD_SE(sva);
}
/*
@@ -3793,10 +3799,13 @@
* we just configure protections for the section mapping
* that is going to be created.
*/
- if (!L2_S_WRITABLE(firstpte) && (first_pve->pv_flags & PVF_WRITE)) {
- first_pve->pv_flags &= ~PVF_WRITE;
+ if ((first_pve->pv_flags & PVF_WRITE) != 0) {
+ if (!L2_S_WRITABLE(firstpte)) {
+ first_pve->pv_flags &= ~PVF_WRITE;
+ prot &= ~VM_PROT_WRITE;
+ }
+ } else
prot &= ~VM_PROT_WRITE;
- }
if (!L2_S_EXECUTABLE(firstpte))
prot &= ~VM_PROT_EXECUTE;
@@ -3841,6 +3850,12 @@
if (!L2_S_WRITABLE(oldpte) && (pve->pv_flags & PVF_WRITE))
pve->pv_flags &= ~PVF_WRITE;
+ if (pve->pv_flags != first_pve->pv_flags) {
+ pmap_section_p_failures++;
+ CTR2(KTR_PMAP, "pmap_promote_section: failure for "
+ "va %#x in pmap %p", va, pmap);
+ return;
+ }
old_va -= PAGE_SIZE;
pa -= PAGE_SIZE;
@@ -3853,6 +3868,24 @@
* Map the superpage.
*/
pmap_map_section(pmap, first_va, l2pte_pa(firstpte), prot, TRUE);
+ /*
+ * Invalidate all possible TLB mappings for small
+ * pages within the newly created superpage.
+ * Rely on the first PTE's attributes since they
+ * have to be consistent across all of the base pages
+ * within the superpage. If page is not executable it
+ * is at least referenced.
+ * The fastest way to do that is to invalidate whole
+ * TLB at once instead of executing 256 CP15 TLB
+ * invalidations by single entry. TLBs usually maintain
+ * several dozen entries so loss of unrelated entries is
+ * still a less agresive approach.
+ */
+ if (L2_S_EXECUTABLE(firstpte))
+ cpu_tlb_flushID();
+ else
+ cpu_tlb_flushD();
+
pmap_section_promotions++;
CTR2(KTR_PMAP, "pmap_promote_section: success for va %#x"
" in pmap %p", first_va, pmap);
@@ -3888,7 +3921,7 @@
struct l2_bucket *l2b;
struct pv_entry *l1pdpve;
struct md_page *pvh;
- pd_entry_t *pl1pd, l1pd;
+ pd_entry_t *pl1pd, l1pd, newl1pd;
pt_entry_t *firstptep, newpte;
vm_offset_t pa;
vm_page_t m;
@@ -3968,9 +4001,14 @@
pmap_pv_demote_section(pmap, va, pa);
/* Now fix-up L1 */
>>> TRUNCATED FOR MAIL (1000 lines) <<<
More information about the p4-projects
mailing list