PERFORCE change 985521 for review
Robert Watson
rwatson at FreeBSD.org
Sun Oct 6 20:40:07 UTC 2013
http://p4web.freebsd.org/@@985521?ac=10
Change 985521 by rwatson at rwatson_zenith_cl_cam_ac_uk on 2013/10/06 20:39:27
Correct a CCall exception-handler bug in PC bounds checking.
When an error is encountered in CCall or CReturn, jump to the
general-purpose userspace exception handler code. Until we can
set the capability cause register, this will incorrectly report
the error as a CCall/CReturn exception rather than as the
particular failure detected and handled, but this is better
than continuing blindly and failing to report (or describe) the
problem.
Affected files ...
.. //depot/projects/ctsrd/cheribsd/src/sys/mips/cheri/ccall.S#11 edit
Differences ...
==== //depot/projects/ctsrd/cheribsd/src/sys/mips/cheri/ccall.S#11 (text+ko) ====
@@ -104,11 +104,8 @@
* instruction to extract the capabilities to fixed ones targetable in
* assembly and by the compiler.
*
- * XXXRW: Lots of non-done checking -- e.g., types, protection bits, etc. We
- * need a C error-handling path.
- *
- * XXXRW: We'd like a CSetCause so that we can jump to the general CP2
- * exception handler from here after setting its state appropriately.
+ * XXXRW: We'd like a CSetCause so that the general CP2 exception handling
+ * code can pick up the pieces cleanly.
*
* NB: No attempt to make this pipeline well yet -- branch-delay slots not
* well-utilised, some CP2 fields accessed multiple times.
@@ -165,7 +162,7 @@
PTR_ADDU k0, k0, k1
PTR_SUBIU k0, 4
cgettype k1, CHERI_REG_CCALLCODE
- sltu k1, k1, k0
+ sltu k1, k0, k1
bnez k1, CCall_c1_range
nop
@@ -253,13 +250,13 @@
CCall_c1_perms:
CCall_c1_range:
CCall_stack_overflow:
- /* XXXRW: For now, treat as a NOP. */
- MFC0 k0, MIPS_COP_0_EXC_PC
- PTR_ADDIU k0, 4
- MTC0 k0, MIPS_COP_0_EXC_PC
-
- CHERI_EXCEPTION_RETURN(k0);
- eret
+ /*
+ * XXXRW: We would very much like to use CSetCause here to insert the
+ * right cause for the failure mode detected ... but CHERI doesn't yet
+ * support that.
+ */
+ j _C_LABEL(MipsUserGenException)
+ nop
.set pop
@@ -267,15 +264,12 @@
* Software implementation of CReturn; this code does not need to be position-
* independent as it is not relocated to an exception vector.
*
- * XXXRW: Lots of non-done checking -- e.g., types, protection bits, etc. We
- * need a C error handling path.
- *
- * XXXRW: We'd like a CSetCause so that we can jump to the general CP2
- * exception handler from here after setting its state appropriately.
+ * XXXRW: We'd like a CSetCause so that the general CP2 exception handling
+ * code can pick up the pieces cleanly.
*
* Possible failure modes:
*
- * 1. Trusted stack underflow. XXXRW: How to deal with this?
+ * 1. Trusted stack underflow.
*/
CHERICReturn:
.set push
@@ -328,12 +322,12 @@
eret
CReturn_stack_underflow:
- /* XXXRW: For now, treat as a NOP. */
- MFC0 k0, MIPS_COP_0_EXC_PC
- PTR_ADDIU k0, 4
- MTC0 k0, MIPS_COP_0_EXC_PC
-
- CHERI_EXCEPTION_RETURN(k0)
- eret
+ /*
+ * XXXRW: We would very much like to use CSetCause here to insert the
+ * right cause for the failure mode detected ... but CHERI doesn't yet
+ * support that.
+ */
+ j _C_LABEL(MipsUserGenException)
+ nop
.set pop
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