PERFORCE change 207076 for review

[Robert Watson]

http://p4web.freebsd.org/@@207076?ac=10

Change 207076 by rwatson at rwatson_svr_ctsrd_mipsbuild on 2012/02/29 09:59:59

	Modify FreeBSD MIPS exception handler installation to also install
	the XTLB handler for BERI.  Add a comment reflecting my surprise at
	the fact that we fail to install it by default for 64-bit MIPS
	architectures, instead requiring each to be manually enabled.
	
	To do this, define a BERI CPU type, matching similar arrangements
	for other 64-bit MIPS CPUs.

Affected files ...

.. //depot/projects/ctsrd/beribsd/src/sys/conf/options.mips#2 edit
.. //depot/projects/ctsrd/beribsd/src/sys/mips/mips/machdep.c#2 edit

Differences ...

==== //depot/projects/ctsrd/beribsd/src/sys/conf/options.mips#2 (text+ko) ====

@@ -37,6 +37,7 @@
 CPU_CNMIPS	opt_global.h
 CPU_RMI		opt_global.h
 CPU_NLM		opt_global.h
+CPU_BERI	opt_global.h
 
 ISA_MIPS1	opt_cputype.h
 ISA_MIPS3	opt_cputype.h

==== //depot/projects/ctsrd/beribsd/src/sys/mips/mips/machdep.c#2 (text+ko) ====

@@ -347,7 +347,11 @@
 	bcopy(MipsTLBMiss, (void *)MIPS_UTLB_MISS_EXC_VEC,
 	      MipsTLBMissEnd - MipsTLBMiss);
 
-#if defined(CPU_CNMIPS) || defined(CPU_RMI) || defined(CPU_NLM)
+	/*
+	 * XXXRW: Why don't we install the XTLB handler for all 64-bit
+	 * architectures?
+	 */
+#if defined(CPU_CNMIPS) || defined(CPU_RMI) || defined(CPU_NLM) || defined (CPU_BERI)
 /* Fake, but sufficient, for the 32-bit with 64-bit hardware addresses  */
 	bcopy(MipsTLBMiss, (void *)MIPS3_XTLB_MISS_EXC_VEC,
 	      MipsTLBMissEnd - MipsTLBMiss);