PERFORCE change 157989 for review

[Arnar Mar Sig]

http://perforce.freebsd.org/chv.cgi?CH=157989

Change 157989 by antab at antab_farm on 2009/02/20 19:48:34

	Little fix to cpu_switch. switching to p1 is done but its pmap has no mappings.

Affected files ...

.. //depot/projects/avr32/src/sys/avr32/avr32/pmap.c#5 edit
.. //depot/projects/avr32/src/sys/avr32/avr32/switch.S#4 edit

Differences ...

==== //depot/projects/avr32/src/sys/avr32/avr32/pmap.c#5 (text+ko) ====

@@ -96,6 +96,8 @@
 		kernel_pmap->pm_pd[j] = (pd_entry_t)(pagetables + (i * NPTEPG));
 	}
 
+	kernel_vm_end = VM_MAX_KERNEL_ADDRESS;
+
 	/* Enable paging */
 	tlb_flush();
 	sysreg_write(PTBR, (uint32_t)kernel_pmap->pm_pd);
@@ -382,7 +384,6 @@
 	pt_entry_t origpte, newpte;
 	vm_page_t mpte, om;
 
-
 	vm_page_lock_queues();
 	PMAP_LOCK(pmap);
 
@@ -437,7 +438,7 @@
 		}
 		if (page_is_managed(opa)) {
 			om = PHYS_TO_VM_PAGE(opa);
-	//		pmap_remove_entry(pmap, om, va);
+			pmap_remove_entry(pmap, om, va);
 		}
 		if (mpte) {
 			mpte->wire_count--;
@@ -679,7 +680,6 @@
 	 */
 	pmap->pm_stats.resident_count++;
 	ptepa = VM_PAGE_TO_PHYS(m);
-	printf("****: page: %x\n", ptepa);
 	pmap->pm_pd[ptepindex] = (pd_entry_t)ptepa;
 	avr32_impl();
 	return m;
@@ -827,12 +827,13 @@
 	}
 
 	if (!ent || !*ent) {
-		printf("\nTLB miss: %x\n", ecr);
+		breakpoint();
+	/*	printf("\nTLB miss: %x\n", ecr);
 		printf("pd: %x\n", sysreg_read(PTBR));
 		printf("TLBEAR: %x\n", tlbear);
 		printf("TLBEHI: %x\n", tlbehi);
 		printf("PC: %x\n", sysreg_read(RAR_EX));
-		printf("SR: %x\n", sysreg_read(RSR_EX));
+		printf("SR: %x\n", sysreg_read(RSR_EX)); */
 
 		panic("pmap_tlb_miss: address not in pmap\n");
 	}

==== //depot/projects/avr32/src/sys/avr32/avr32/switch.S#4 (text+ko) ====

@@ -53,6 +53,7 @@
 	mov	lr, r8
 	retal	sp				/* return 0 */
 
+
 /**
  * r12: Pointer struct thread
  * r11: Pmap
@@ -70,15 +71,17 @@
 	 * r4:  Misc
 	 * r3:	tlbehi save
 	 * r2:  Address of PCB
+	 * r1:  Pointer to PD
 	 */
 
-	/* Load PCB address */
+	/* Load PCB and PD address */
 	ld.w	r2, r12[TD_PCB]
+	sub	r1, r11, -(PMAP_PD)
+	ld.w	r1, r1
 
 
 	/* Check if stack is in stack is is P3 */
-	mov	r10, r12
-	sub	r10, -(TD_KSTACK)
+	sub	r10, r12, -(TD_KSTACK)
 	ld.w	r10, r10
 	mov	r9, r10
 	lsr	r9, 29
@@ -86,14 +89,12 @@
 	brne	restore_finish
 
 	/* Add ASID and V flag to kstack value */
-	mov	r4, r11
-	sub	r4, -(PMAP_ASID)
+	sub	r4, r11, -(PMAP_ASID)
 	ld.w	r4, r4
 	add	r10, r4
 	sbr	r10, AT32_SYS_TLBEHI_V
 
-	mov	r9, r12
-	sub	r9, -(TD_KPTE)			/* Add KPTE offset to thread struct pointer */
+	sub	r9, r12, -(TD_KPTE)		/* Add KPTE offset to thread struct pointer */
 	mov	r8, KSTACK_PAGES		/* Iterate thru thru all kstack pages */
 
 	mfsr	r3, AT32_SYS_TLBEHI
@@ -137,10 +138,7 @@
 	brne	1b				/* Or not */
 
 restore_finish:
-	/* Restore old context */
-	sub	r11, -(PMAP_PD)
-	ld.w	r11, r11
-	mtsr	AT32_SYS_PTBR, r11		/* Point lookups to new pmap */
+	mtsr	AT32_SYS_PTBR, r1		/* Point lookups to new pmap */
 	mtsr	AT32_SYS_TLBEHI, r10		/* Set TLBEHI (ASID for new td) */
 	nop					/* Wait for mtsr */
 	ld.w	r4, r2++			/* Load status register */
@@ -151,3 +149,4 @@
 	frs					/* Flush the return stack */
 	sub	pc, -2				/* Flush the pipeline */
 	retal	pc				/* return 1 */
+