PERFORCE change 151665 for review

[Nathan Whitehorn]

http://perforce.freebsd.org/chv.cgi?CH=151665

Change 151665 by nwhitehorn at nwhitehorn_trantor on 2008/10/21 15:04:40

	On 64-bit systems with an enabled hypervisor (e.g. IBM G5 systems),
	the system becomes extremely unhappy if you suddenly switch
	hyper-privileged mode off. 
	
	On a non-partitioned IBM system, you are supposed to keep MSR[HV] = 1
	at all times, but our trap handlers zeroed the upper 32 bits of the MSR.
	Instead, or the current MSR with the new SRR1 value to preserve any
	stray bits right before we exit the handler.
	
	This patch results in booting multi-user under Mambo. And now we return
	to my regularly scheduled field theory assignment...

Affected files ...

.. //depot/projects/ppc-g5/sys/powerpc/aim/trap_subr.S#4 edit

Differences ...

==== //depot/projects/ppc-g5/sys/powerpc/aim/trap_subr.S#4 (text+ko) ====

@@ -224,6 +224,11 @@
 	lwz	%r3,(savearea+CPUSAVE_SRR0)(%r2); /* restore srr0 */	\
 	mtsrr0	%r3;							\
 	lwz	%r3,(savearea+CPUSAVE_SRR1)(%r2); /* restore srr1 */	\
+									\
+	/* Make sure HV bit of MSR propagated to SRR1 */		\
+	mfmsr	%r2;							\
+	or	%r3,%r2,%r3;						\
+									\
 	mtsrr1	%r3;							\
 	mfsprg2	%r2;			/* restore r2 & r3 */		\
 	mfsprg3	%r3