PERFORCE change 150946 for review

[Rafal Jaworowski]

http://perforce.freebsd.org/chv.cgi?CH=150946

Change 150946 by raj at raj_mimi on 2008/10/04 11:03:34

	Adjust Marvell headers for better Discovery support.

Affected files ...

.. //depot/projects/arm/src/sys/arm/mv/mvreg.h#4 edit
.. //depot/projects/arm/src/sys/arm/mv/mvvar.h#3 edit

Differences ...

==== //depot/projects/arm/src/sys/arm/mv/mvreg.h#4 (text+ko) ====

@@ -98,11 +98,7 @@
 #define MV_INTREGS_BASE		(MV_MBUS_BRIDGE_BASE + 0x80)
 #define MV_CPU_CONTROL_BASE	(MV_MBUS_BRIDGE_BASE + 0x100)
 #define MV_IC_BASE		(MV_MBUS_BRIDGE_BASE + 0x200)
-#if defined(SOC_MV_DISCOVERY)
 #define MV_IC_SIZE		0x3C
-#else
-#define MV_IC_SIZE		0x20
-#endif
 #define MV_TIMERS_BASE		(MV_MBUS_BRIDGE_BASE + 0x300)
 #define MV_TIMERS_SIZE		0x30
 #define MV_PCI_BASE		(MV_BASE + 0x30000)
@@ -444,11 +440,15 @@
 /*
  * Decode windows definitions and macros
  */
-#define MV_WIN_CPU_CTRL(n)		(0x10 * (n) + 0x0)
-#define MV_WIN_CPU_BASE(n)		(0x10 * (n) + 0x4)
-#define MV_WIN_CPU_REMAP_LO(n)		(0x10 * (n) + 0x8)
-#define MV_WIN_CPU_REMAP_HI(n)		(0x10 * (n) + 0xc)
+#define MV_WIN_CPU_CTRL(n)		(0x10 * (n) + (((n) < 8) ? 0x000 : 0x880))
+#define MV_WIN_CPU_BASE(n)		(0x10 * (n) + (((n) < 8) ? 0x004 : 0x884))
+#define MV_WIN_CPU_REMAP_LO(n)		(0x10 * (n) + (((n) < 8) ? 0x008 : 0x888))
+#define MV_WIN_CPU_REMAP_HI(n)		(0x10 * (n) + (((n) < 8) ? 0x00C : 0x88C))
+#if defined(SOC_MV_DISCOVERY)
+#define MV_WIN_CPU_MAX			14
+#else
 #define MV_WIN_CPU_MAX			8
+#endif
 
 #define MV_WIN_DDR_BASE(n)		(0x8 * (n) + 0x0)
 #define MV_WIN_DDR_SIZE(n)		(0x8 * (n) + 0x4)
@@ -470,12 +470,12 @@
 #define MV_WIN_IDMA_MAX			8
 #define MV_IDMA_CHAN_MAX		4
 
-#define MV_WIN_PCIE_CTRL(n)		(0x10 * (((n) < 5) ? (n) : (n) + 1) + \
-					    0x1820)
-#define MV_WIN_PCIE_BASE(n)		(0x10 * (((n) < 5) ? (n) : (n) + 1) + \
-					    0x1824)
-#define MV_WIN_PCIE_REMAP(n)		(0x10 * (((n) < 5) ? (n) : (n) + 1) + \
-					    0x182C)
+#define MV_WIN_PCIE_CTRL(n)		(0x10 * (((n) < 5) ? (n) : \
+					    (n) + 1) + 0x1820)
+#define MV_WIN_PCIE_BASE(n)		(0x10 * (((n) < 5) ? (n) : \
+					    (n) + 1) + 0x1824)
+#define MV_WIN_PCIE_REMAP(n)		(0x10 * (((n) < 5) ? (n) : \
+					    (n) + 1) + 0x182C)
 #define MV_WIN_PCIE_MAX			6
 
 #define MV_PCIE_BAR(n)			(0x04 * (n) + 0x1804)

==== //depot/projects/arm/src/sys/arm/mv/mvvar.h#3 (text+ko) ====

@@ -84,7 +84,6 @@
 uint8_t	mv_gpio_in(uint32_t pin);
 
 int	platform_pmap_init(void);
-long	platform_ramsize(void);
 int	soc_decode_win(void);
 void	soc_id(uint32_t *dev, uint32_t *rev);
 void	soc_identify(void);