PERFORCE change 133529 for review

[Warner Losh]

http://perforce.freebsd.org/chv.cgi?CH=133529

Change 133529 by imp at imp_paco-paco on 2008/01/18 06:32:25

	rearrange things a little to eliminate all the redundant decls and
	missing decls.  We now link.

Affected files ...

.. //depot/projects/mips2-jnpr/src/sys/mips/include/md_var.h#9 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/cpu-mips2.c#4 edit
.. //depot/projects/mips2-jnpr/src/sys/mips/mips/machdep.c#15 edit

Differences ...

==== //depot/projects/mips2-jnpr/src/sys/mips/include/md_var.h#9 (text+ko) ====

@@ -61,6 +61,7 @@
 #define	MIPS_DEBUG_PRINT(fmt, args...)
 #endif
 
+void	mips_vector_init(void);
 void	cpu_identify(void);
 void	mips_cpu_init(void);
 void	mips_proc0_init(void);

==== //depot/projects/mips2-jnpr/src/sys/mips/mips/cpu-mips2.c#4 (text+ko) ====

@@ -46,67 +46,9 @@
 #include <machine/locore.h>
 #include <machine/pte.h>
 
-/*
- * mips_num_tlb_entries is
- * initialized by us in the mips_cpu_init thingo.
- */
-int mips_num_tlb_entries;
-
-void	mips_get_identity(struct mips_cpuinfo *cpuinfo);
+static struct mips_cpuinfo cpuinfo;
 
 /*
- * Exception vector table management.
- */
-#define	MIPS_DECLARE_VECTOR(class)					\
-	extern char class ## Vector[], class ## VectorEnd[]
-#define	MIPS_INSTALL_VECTOR(vector, class)				\
-	mips_vector_do_install(MIPS_VEC_ ## vector,			\
-			       class ## Vector,				\
-			       class ## VectorEnd)
-
-MIPS_DECLARE_VECTOR(TLBMiss);
-MIPS_DECLARE_VECTOR(XTLBMiss);
-MIPS_DECLARE_VECTOR(Cache);
-MIPS_DECLARE_VECTOR(Exception);
-
-static void
-mips_vector_do_install(vm_offset_t addr, char *begin, char *end)
-{
-	size_t len, max;
-
-	max = 0x80;
-	if(bootverbose)
-		printf("Installing exception vector:\n\t[%p..%p] <- [%p..%p]\n",
-		    (void *)addr, (void *)(addr+max), begin, end);
-	len = end - begin;
-	if (len > max)
-		panic("exception code too big for vector %jx", (intmax_t) addr);
-	if (len == max)
-		printf("Exception vector at %jx out of space\n", (intmax_t) addr);
-	else if (len + 8 >= max)
-		printf("Exception vector at %jx almost out of space\n",
-		    (intmax_t) addr);
-	memcpy((void *)addr, begin, len);
-}
-
-static void
-mips_vector_init(void)
-{
-
-	MIPS_INSTALL_VECTOR(TLB, TLBMiss);
-	MIPS_INSTALL_VECTOR(XTLB, XTLBMiss);
-	MIPS_INSTALL_VECTOR(CACHE, Cache);
-	MIPS_INSTALL_VECTOR(INTERRUPT, Exception); /* XXX */
-	MIPS_INSTALL_VECTOR(GENERIC, Exception);
-	mips_icache_sync_all();
-
-	mips_wr_status(mips_rd_status() & ~MIPS_SR_BEV);
-}
-
-#undef MIPS_INSTALL_VECTOR
-#undef MIPS_DECLARE_VECTOR
-
-/*
  * Attempt to identify the MIPS CPU as much as possible.
  *
  * XXX: Assumes the CPU is MIPS32 compliant.
@@ -114,7 +56,7 @@
  * as we don't currently use L2/L3 cache or additional
  * MIPS32 processor features.
  */
-void
+static void
 mips_get_identity(struct mips_cpuinfo *cpuinfo)
 {
     u_int32_t prid;
@@ -168,10 +110,11 @@
 void
 mips_cpu_init(void)
 {
-	struct mips_cpuinfo cpuinfo;
-
 	mips_get_identity(&cpuinfo);
-	mips_num_tlb_entries = cpuinfo.tlb_nentries;
+	num_tlbentries = cpuinfo.tlb_nentries;
+	Mips_SetWIRED(0);
+	Mips_TLBFlush(num_tlbentries);
+	Mips_SetWIRED(VMWIRED_ENTRIES);
 	mips_config_cache(&cpuinfo);
 	mips_vector_init();
 
@@ -182,10 +125,6 @@
 void
 cpu_identify(void)
 {
-    struct mips_cpuinfo cpuinfo;
-
-    mips_get_identity(&cpuinfo);
-
     printf("cpu%d: ", 0);   /* XXX per-cpu */
     switch (cpuinfo.cpu_vendor) {
     case MIPS_PRID_CID_MTI:

==== //depot/projects/mips2-jnpr/src/sys/mips/mips/machdep.c#15 (text+ko) ====

@@ -104,15 +104,9 @@
 static char cpu_model[30];
 SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, cpu_model, 0, "Machine model");
 
-void mips_init(int, int, u_int32_t, struct bootinfo *);
-void mips_vector_init(void);
-void hardware_basic_init(void);
 #if 0 /* see comment below */
 static void getmemsize(void);
 #endif
-#ifdef	DEBUG_UART_POLLED
-void init_bootstrap_console(void);
-#endif
 
 int cold = 1;
 int Maxmem;
@@ -422,21 +416,6 @@
 	CpuOnboardCacheOn = 1;
 
 	/*
-	 * FREEBSD_DEVELOPERS_FIXME:
-	 * Set up number of TLB entries, # of Wired TLB
-	 * entries needed and Invoke Cache Config routines
-	 * here, based on CPU-type.
-	 */
-#ifdef UNIMPLEMENTED
-	/* XXX this is done in mips_cpu_init() now, I think*/
-	cpucfg = Mips_ConfigCache();
-#endif
-	num_tlbentries = 64;
-	Mips_SetWIRED(0);
-	Mips_TLBFlush(num_tlbentries);
-	Mips_SetWIRED(VMWIRED_ENTRIES);
-
-	/*
 	 * Copy down exception vector code.
 	 */
 	if (MipsTLBMissEnd - MipsTLBMiss > 0x80)