PERFORCE change 154059 for review

[Sam Leffler]

http://perforce.freebsd.org/chv.cgi?CH=154059

Change 154059 by sam at sam_ebb on 2008/12/04 19:05:07

	o map out the virtual address space
	o remove IXP435_MCU_VBASE and IXP435_MCU_SIZE; we intentionally
	  map the 435's MCU registers to the same place as the 425, don't
	  obfuscate this behind some #defines
	o move the 435's MAC-A and MAC-C virtual mapping to where the we
	  map MAC-A and MAC-B on the 425, respectively
	o remove IXP435_USB1_OFFSET and IXP435_USB2_OFFSET
	o setup IXP435_USB1 and IXP435_USB2's mappings corrrectly (note
	  the Gateworks doc is wrong for these; use the IXP435 manual for ref)

Affected files ...

.. //depot/projects/vap/sys/arm/xscale/ixp425/ixp425reg.h#5 edit

Differences ...

==== //depot/projects/vap/sys/arm/xscale/ixp425/ixp425reg.h#5 (text+ko) ====

@@ -68,27 +68,48 @@
  */           
 
 /*
- * Virtual memory map for the Intel IXP425 integrated devices
+ * Virtual memory map for the Intel IXP425/IXP435 integrated devices
  */
 /*
  * FFFF FFFF ---------------------------
  *
+ *           Global cache clean area
+ * FF00 0000 ---------------------------
+ *
  * FC00 0000 ---------------------------
  *           PCI Data (memory space)
- * F800 0000 ---------------------------
+ * F800 0000 --------------------------- IXP425_PCI_MEM_VBASE
  *
  * F020 1000 ---------------------------
- *           SDRAM Controller
- * F020 0000 ---------------------------
+ *           SDRAM/DDR Memory Controller
+ * F020 0000 --------------------------- IXP425_MCU_VBASE
  *
- * F001 2000 ---------------------------
- *           PCI Configuration and Status Registers
- * F001 1000 ---------------------------
- *           Expansion bus Configuration Registers
- * F001 0000 ---------------------------
- *           System and Peripheral Registers
- *            VA F000 0000 = PA C800 0000 (SIZE 0x10000)
- * F000 0000 ---------------------------
+ * F001 7000 EHCI USB 2 (IXP435)
+ * F001 6000 EHCI USB 1 (IXP435)
+ * F020 6000 ---------------------------
+ *           Queue manager
+ * F001 2000 --------------------------- IXP425_QMGR_VBASE
+ *           PCI Configuration and Status
+ * F001 1000 --------------------------- IXP425_PCI_VBASE
+ *           Expansion Bus Configuration
+ * F001 0000 --------------------------- IXP425_EXP_VBASE
+ * F000 F000 Expansion Bus Chip Select 4
+ * F000 E000 Expansion Bus Chip Select 3
+ * F000 D000 Expansion Bus Chip Select 2
+ * F000 C000 Expansion Bus Chip Select 1
+ * F000 B000 USB (option on IXP425)
+ * F000 A000 MAC-B (IXP425) | MAC-C (IXP435)
+ * F000 9000 MAC-A
+ * F000 8000 NPE-C
+ * F000 7000 NPE-B (IXP425)
+ * F000 6000 NPE-A
+ * F000 5000 Timers
+ * F000 4000 GPIO Controller
+ * F000 3000 Interrupt Controller
+ * F000 2000 Performance Monitor Controller (PMC)
+ * F000 1000 UART 1 (IXP425)
+ * F000 0000 UART 0
+ * F000 0000 --------------------------- IXP425_IO_VBASE
  *
  * 0000 0000 ---------------------------
  *
@@ -117,8 +138,6 @@
 
 #define	IXP435_MAC_C_OFFSET	0x0000a000UL	/* Ethernet MAC on NPE C */
 #define	IXP435_MAC_A_OFFSET	0x0000c000UL	/* Ethernet MAC on NPE A */
-#define	IXP435_USB1_OFFSET	0x0000d000UL	/* USB host controller 1 */
-#define	IXP435_USB2_OFFSET	0x0000e000UL	/* USB host controller 2 */
 
 #define	IXP425_REG_SIZE		0x1000
 
@@ -147,7 +166,6 @@
 
 /*
  * Timers
- *
  */
 #define	IXP425_TIMER_HWBASE	(IXP425_IO_HWBASE + IXP425_TIMER_OFFSET)
 #define	IXP425_TIMER_VBASE	(IXP425_IO_VBASE + IXP425_TIMER_OFFSET)
@@ -518,8 +536,6 @@
  * IXP435 DDR MCU Registers
  */
 #define	IXP435_MCU_HWBASE	0xcc00e500UL
-#define	IXP435_MCU_VBASE	0xf0200000UL	/* NB: use same addr as 425 */
-#define	IXP435_MCU_SIZE		0x1000		/* NB: does not map all regs */
 #define	MCU_DDR_SDIR		0x00		/* DDR SDAM Initialization Reg*/
 #define	MCU_DDR_SDCR0		0x04		/* DDR SDRAM Control Reg 0 */
 #define	MCU_DDR_SDCR1		0x08		/* DDR SDRAM Control Reg 1 */
@@ -605,12 +621,13 @@
 #define IXP425_MAC_B_VBASE	(IXP425_IO_VBASE + IXP425_MAC_B_OFFSET)
 #define IXP425_MAC_B_SIZE	0x1000 		/* Actually only 256 bytes */
 
+/* NB: IXP435 MAC's are mapped differently */
 #define IXP435_MAC_A_HWBASE	(IXP425_IO_HWBASE + IXP435_MAC_A_OFFSET)
-#define IXP435_MAC_A_VBASE	(IXP425_IO_VBASE + IXP435_MAC_A_OFFSET)
+#define IXP435_MAC_A_VBASE	(IXP425_IO_VBASE + IXP425_MAC_A_OFFSET)
 #define IXP435_MAC_A_SIZE	0x1000		/* Actually only 256 bytes */
 
 #define IXP435_MAC_C_HWBASE	(IXP425_IO_HWBASE + IXP435_MAC_C_OFFSET)
-#define IXP435_MAC_C_VBASE	(IXP425_IO_VBASE + IXP435_MAC_C_OFFSET)
+#define IXP435_MAC_C_VBASE	(IXP425_IO_VBASE + IXP425_MAC_B_OFFSET)
 #define IXP435_MAC_C_SIZE	0x1000 		/* Actually only 256 bytes */
 
 /*
@@ -621,7 +638,6 @@
 
 #define	IXP425_EXP_BUS_CSx_HWBASE(i) \
 	(IXP425_EXP_BUS_HWBASE + (i)*IXP425_EXP_BUS_SIZE)
-
 #define	IXP425_EXP_BUS_CSx_VBASE(i) \
 	(IXP425_MAC_B_VBASE + (i)*IXP425_MAC_B_SIZE)
 
@@ -665,4 +681,12 @@
 #define	CAMBRIA_CFSEL0_HWBASE	(CAMBRIA_CFSEL1_HWBASE - 0x40000)
 #define	CAMBRIA_CFSEL0_SIZE	0x40000
 
+#define IXP435_USB1_HWBASE	0xcd000000UL	/* USB host controller 1 */
+#define IXP435_USB1_VBASE	(IXP425_QMGR_VBASE + IXP425_QMGR_SIZE)
+#define IXP435_USB1_SIZE	0x1000		/* NB: only uses 0x300 */
+
+#define IXP435_USB2_HWBASE	0xce000000UL	/* USB host controller 2 */
+#define IXP435_USB2_VBASE	(IXP435_USB1_VBASE + IXP435_USB1_SIZE)
+#define IXP435_USB2_SIZE	0x1000		/* NB: only uses 0x300 */
+
 #endif /* _IXP425REG_H_ */