PERFORCE change 153971 for review

[Sam Leffler]

http://perforce.freebsd.org/chv.cgi?CH=153971

Change 153971 by sam at sam_ebb on 2008/12/02 22:20:52

	Fix pci dma after changes to memory layout so memory starts at
	0 instead of 0x10000000: AHB_OFFSET was set to 0x10000000 but
	needs to be 0; rename it to IXP425_AHB_OFFSET and move it to
	be near the PCI register defs so it's more clear it's related.
	
	Submitted by:	cognet

Affected files ...

.. //depot/projects/vap/sys/arm/xscale/ixp425/ixp425_pci.c#3 edit
.. //depot/projects/vap/sys/arm/xscale/ixp425/ixp425reg.h#4 edit

Differences ...

==== //depot/projects/vap/sys/arm/xscale/ixp425/ixp425_pci.c#3 (text+ko) ====

@@ -130,8 +130,8 @@
 	if (sc->sc_mem == NULL)
 		panic("cannot allocate PCI MEM space");
 
-#define	AHB_OFFSET	0x10000000UL
-	if (bus_dma_tag_create(NULL, 1, 0, AHB_OFFSET + 64 * 1024 * 1024,
+	/* NB: PCI dma window is 64M so anything above must be bounced */
+	if (bus_dma_tag_create(NULL, 1, 0, IXP425_AHB_OFFSET + 64 * 1024 * 1024,
 	    BUS_SPACE_MAXADDR, NULL, NULL,  0xffffffff, 0xff, 0xffffffff, 0, 
 	    NULL, NULL, &sc->sc_dmat))
 		panic("couldn't create the PCI dma tag !");
@@ -173,20 +173,20 @@
 	 * 	begin at the physical memory start + OFFSET
 	 */
 	PCI_CSR_WRITE_4(sc, PCI_AHBMEMBASE,
-	    (AHB_OFFSET & 0xFF000000) +
-	    ((AHB_OFFSET & 0xFF000000) >> 8) +
-	    ((AHB_OFFSET & 0xFF000000) >> 16) +
-	    ((AHB_OFFSET & 0xFF000000) >> 24) +
+	    (IXP425_AHB_OFFSET & 0xFF000000) +
+	    ((IXP425_AHB_OFFSET & 0xFF000000) >> 8) +
+	    ((IXP425_AHB_OFFSET & 0xFF000000) >> 16) +
+	    ((IXP425_AHB_OFFSET & 0xFF000000) >> 24) +
 	    0x00010203);
 	
 #define IXPPCIB_WRITE_CONF(sc, reg, val) \
 	ixp425_pci_conf_reg_write(sc, reg, val)
 	/* Write Mapping registers PCI Configuration Registers */
 	/* Base Address 0 - 3 */
-	IXPPCIB_WRITE_CONF(sc, PCI_MAPREG_BAR0, AHB_OFFSET + 0x00000000);
-	IXPPCIB_WRITE_CONF(sc, PCI_MAPREG_BAR1, AHB_OFFSET + 0x01000000);
-	IXPPCIB_WRITE_CONF(sc, PCI_MAPREG_BAR2, AHB_OFFSET + 0x02000000);
-	IXPPCIB_WRITE_CONF(sc, PCI_MAPREG_BAR3, AHB_OFFSET + 0x03000000);
+	IXPPCIB_WRITE_CONF(sc, PCI_MAPREG_BAR0, IXP425_AHB_OFFSET + 0x00000000);
+	IXPPCIB_WRITE_CONF(sc, PCI_MAPREG_BAR1, IXP425_AHB_OFFSET + 0x01000000);
+	IXPPCIB_WRITE_CONF(sc, PCI_MAPREG_BAR2, IXP425_AHB_OFFSET + 0x02000000);
+	IXPPCIB_WRITE_CONF(sc, PCI_MAPREG_BAR3, IXP425_AHB_OFFSET + 0x03000000);
 	
 	/* Base Address 4 */
 	IXPPCIB_WRITE_CONF(sc, PCI_MAPREG_BAR4, 0xffffffff);

==== //depot/projects/vap/sys/arm/xscale/ixp425/ixp425reg.h#4 (text+ko) ====

@@ -405,6 +405,8 @@
 							/* 0xf0011000 */
 #define	IXP425_PCI_SIZE		IXP425_REG_SIZE		/* 0x1000 */
 
+#define	IXP425_AHB_OFFSET	0x00000000UL	/* AHB bus */
+
 /*
  * Mapping registers of IXP425 PCI Configuration
  */