PERFORCE change 127137 for review
Xin LI
delphij at FreeBSD.org
Wed Oct 3 13:37:39 PDT 2007
http://perforce.freebsd.org/chv.cgi?CH=127137
Change 127137 by delphij at tarsier on 2007/10/03 20:37:04
IFC
Affected files ...
.. //depot/projects/delphij_fork/sys/amd64/amd64/legacy.c#2 integrate
.. //depot/projects/delphij_fork/sys/amd64/conf/GENERIC#2 integrate
.. //depot/projects/delphij_fork/sys/amd64/include/legacyvar.h#2 integrate
.. //depot/projects/delphij_fork/sys/amd64/include/vmparam.h#2 integrate
.. //depot/projects/delphij_fork/sys/amd64/pci/pci_bus.c#2 integrate
.. //depot/projects/delphij_fork/sys/arm/arm/locore.S#2 integrate
.. //depot/projects/delphij_fork/sys/arm/conf/AVILA#2 integrate
.. //depot/projects/delphij_fork/sys/arm/include/vmparam.h#2 integrate
.. //depot/projects/delphij_fork/sys/arm/xscale/i80321/i80321_pci.c#3 integrate
.. //depot/projects/delphij_fork/sys/arm/xscale/i8134x/i81342_pci.c#2 integrate
.. //depot/projects/delphij_fork/sys/arm/xscale/ixp425/files.ixp425#2 integrate
.. //depot/projects/delphij_fork/sys/arm/xscale/ixp425/ixp425_npe.c#2 integrate
.. //depot/projects/delphij_fork/sys/arm/xscale/ixp425/ixp425_npevar.h#2 integrate
.. //depot/projects/delphij_fork/sys/arm/xscale/ixp425/ixp425_pci.c#2 integrate
.. //depot/projects/delphij_fork/sys/boot/forth/loader.conf#2 integrate
.. //depot/projects/delphij_fork/sys/compat/ia32/ia32_sysvec.c#3 integrate
.. //depot/projects/delphij_fork/sys/conf/NOTES#11 integrate
.. //depot/projects/delphij_fork/sys/contrib/dev/acpica/evmisc.c#2 integrate
.. //depot/projects/delphij_fork/sys/contrib/dev/acpica/evxface.c#2 integrate
.. //depot/projects/delphij_fork/sys/contrib/dev/npe/IxNpeMicrocode.dat.uu#1 branch
.. //depot/projects/delphij_fork/sys/contrib/dev/npe/LICENSE#1 branch
.. //depot/projects/delphij_fork/sys/dev/acpica/acpi_ec.c#2 integrate
.. //depot/projects/delphij_fork/sys/dev/acpica/acpi_pci.c#2 integrate
.. //depot/projects/delphij_fork/sys/dev/acpica/acpi_pcib_acpi.c#2 integrate
.. //depot/projects/delphij_fork/sys/dev/bge/if_bge.c#2 integrate
.. //depot/projects/delphij_fork/sys/dev/cardbus/cardbus.c#2 integrate
.. //depot/projects/delphij_fork/sys/dev/gem/if_gem.c#2 integrate
.. //depot/projects/delphij_fork/sys/dev/gem/if_gem_pci.c#2 integrate
.. //depot/projects/delphij_fork/sys/dev/gem/if_gemreg.h#2 integrate
.. //depot/projects/delphij_fork/sys/dev/gem/if_gemvar.h#2 integrate
.. //depot/projects/delphij_fork/sys/dev/pccbb/pccbb.c#2 integrate
.. //depot/projects/delphij_fork/sys/dev/pccbb/pccbb_pci.c#2 integrate
.. //depot/projects/delphij_fork/sys/dev/pccbb/pccbbvar.h#2 integrate
.. //depot/projects/delphij_fork/sys/dev/pci/pci.c#3 integrate
.. //depot/projects/delphij_fork/sys/dev/pci/pci_pci.c#2 integrate
.. //depot/projects/delphij_fork/sys/dev/pci/pci_private.h#2 integrate
.. //depot/projects/delphij_fork/sys/dev/pci/pci_user.c#2 integrate
.. //depot/projects/delphij_fork/sys/dev/pci/pcib_private.h#2 integrate
.. //depot/projects/delphij_fork/sys/dev/pci/pcivar.h#2 integrate
.. //depot/projects/delphij_fork/sys/dev/usb/if_axe.c#3 integrate
.. //depot/projects/delphij_fork/sys/dev/usb/if_axereg.h#3 integrate
.. //depot/projects/delphij_fork/sys/geom/geom_event.c#2 integrate
.. //depot/projects/delphij_fork/sys/i386/conf/GENERIC#2 integrate
.. //depot/projects/delphij_fork/sys/i386/i386/legacy.c#2 integrate
.. //depot/projects/delphij_fork/sys/i386/include/legacyvar.h#2 integrate
.. //depot/projects/delphij_fork/sys/i386/include/vmparam.h#2 integrate
.. //depot/projects/delphij_fork/sys/i386/pci/pci_bus.c#2 integrate
.. //depot/projects/delphij_fork/sys/ia64/conf/GENERIC#2 integrate
.. //depot/projects/delphij_fork/sys/ia64/include/vmparam.h#2 integrate
.. //depot/projects/delphij_fork/sys/kern/kern_exec.c#3 integrate
.. //depot/projects/delphij_fork/sys/kern/kern_sx.c#3 integrate
.. //depot/projects/delphij_fork/sys/kern/sched_ule.c#7 integrate
.. //depot/projects/delphij_fork/sys/kern/vfs_bio.c#2 integrate
.. //depot/projects/delphij_fork/sys/modules/Makefile#6 integrate
.. //depot/projects/delphij_fork/sys/modules/acpi/acpi/Makefile#2 integrate
.. //depot/projects/delphij_fork/sys/netinet/ip_fw2.c#6 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_asconf.c#10 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_constants.h#8 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_indata.c#8 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_input.c#11 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_output.c#10 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_output.h#4 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_pcb.c#10 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_timer.c#8 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_usrreq.c#11 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctp_var.h#7 integrate
.. //depot/projects/delphij_fork/sys/netinet/sctputil.c#10 integrate
.. //depot/projects/delphij_fork/sys/netinet/tcp_timer.c#3 integrate
.. //depot/projects/delphij_fork/sys/nfsclient/nfs_bio.c#2 integrate
.. //depot/projects/delphij_fork/sys/nfsclient/nfs_nfsiod.c#2 integrate
.. //depot/projects/delphij_fork/sys/pc98/conf/GENERIC#2 integrate
.. //depot/projects/delphij_fork/sys/powerpc/conf/GENERIC#2 integrate
.. //depot/projects/delphij_fork/sys/powerpc/conf/NOTES#2 integrate
.. //depot/projects/delphij_fork/sys/powerpc/include/vmparam.h#2 integrate
.. //depot/projects/delphij_fork/sys/powerpc/powermac/grackle.c#2 integrate
.. //depot/projects/delphij_fork/sys/powerpc/powermac/uninorth.c#2 integrate
.. //depot/projects/delphij_fork/sys/sparc64/conf/GENERIC#2 integrate
.. //depot/projects/delphij_fork/sys/sparc64/include/vmparam.h#2 integrate
.. //depot/projects/delphij_fork/sys/sparc64/pci/apb.c#2 integrate
.. //depot/projects/delphij_fork/sys/sparc64/pci/ofw_pcibus.c#2 integrate
.. //depot/projects/delphij_fork/sys/sparc64/pci/psycho.c#4 integrate
.. //depot/projects/delphij_fork/sys/sun4v/conf/GENERIC#2 integrate
.. //depot/projects/delphij_fork/sys/sun4v/include/vmparam.h#2 integrate
.. //depot/projects/delphij_fork/sys/sun4v/sun4v/hv_pci.c#2 integrate
.. //depot/projects/delphij_fork/sys/sys/param.h#3 integrate
.. //depot/projects/delphij_fork/sys/sys/pciio.h#2 integrate
.. //depot/projects/delphij_fork/sys/sys/vmmeter.h#3 integrate
.. //depot/projects/delphij_fork/sys/vm/vm_contig.c#2 integrate
.. //depot/projects/delphij_fork/sys/vm/vm_fault.c#5 integrate
.. //depot/projects/delphij_fork/sys/vm/vm_map.c#3 integrate
.. //depot/projects/delphij_fork/sys/vm/vm_object.c#2 integrate
.. //depot/projects/delphij_fork/sys/vm/vm_object.h#2 integrate
.. //depot/projects/delphij_fork/sys/vm/vm_page.c#5 integrate
.. //depot/projects/delphij_fork/sys/vm/vm_page.h#3 integrate
.. //depot/projects/delphij_fork/sys/vm/vm_pageout.c#3 integrate
.. //depot/projects/delphij_fork/sys/vm/vm_pageq.c#2 integrate
.. //depot/projects/delphij_fork/sys/vm/vm_phys.c#3 integrate
.. //depot/projects/delphij_fork/sys/vm/vm_phys.h#3 integrate
Differences ...
==== //depot/projects/delphij_fork/sys/amd64/amd64/legacy.c#2 (text+ko) ====
@@ -28,7 +28,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/amd64/amd64/legacy.c,v 1.60 2007/03/20 20:21:44 jhb Exp $");
+__FBSDID("$FreeBSD: src/sys/amd64/amd64/legacy.c,v 1.61 2007/09/30 11:05:13 marius Exp $");
/*
* This code implements a system driver for legacy systems that do not
@@ -207,6 +207,9 @@
struct legacy_device *atdev = DEVTOAT(child);
switch (which) {
+ case LEGACY_IVAR_PCIDOMAIN:
+ *result = 0;
+ break;
case LEGACY_IVAR_PCIBUS:
*result = atdev->lg_pcibus;
break;
@@ -223,6 +226,8 @@
struct legacy_device *atdev = DEVTOAT(child);
switch (which) {
+ case LEGACY_IVAR_PCIDOMAIN:
+ return EINVAL;
case LEGACY_IVAR_PCIBUS:
atdev->lg_pcibus = value;
break;
==== //depot/projects/delphij_fork/sys/amd64/conf/GENERIC#2 (text+ko) ====
@@ -16,7 +16,7 @@
# If you are in doubt as to the purpose or necessity of a line, check first
# in NOTES.
#
-# $FreeBSD: src/sys/amd64/conf/GENERIC,v 1.483 2007/07/01 21:47:45 njl Exp $
+# $FreeBSD: src/sys/amd64/conf/GENERIC,v 1.484 2007/09/26 20:05:06 brueffer Exp $
cpu HAMMER
ident GENERIC
@@ -30,7 +30,7 @@
options PREEMPTION # Enable kernel thread preemption
options INET # InterNETworking
options INET6 # IPv6 communications protocols
-options SCTP # Stream Transmission Control Protocol
+options SCTP # Stream Control Transmission Protocol
options FFS # Berkeley Fast Filesystem
options SOFTUPDATES # Enable FFS soft updates support
options UFS_ACL # Support for access control lists
==== //depot/projects/delphij_fork/sys/amd64/include/legacyvar.h#2 (text+ko) ====
@@ -23,19 +23,21 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $FreeBSD: src/sys/amd64/include/legacyvar.h,v 1.7 2005/09/18 01:42:43 imp Exp $
+ * $FreeBSD: src/sys/amd64/include/legacyvar.h,v 1.8 2007/09/30 11:05:13 marius Exp $
*/
#ifndef _MACHINE_LEGACYVAR_H_
#define _MACHINE_LEGACYVAR_H_
enum legacy_device_ivars {
+ LEGACY_IVAR_PCIDOMAIN,
LEGACY_IVAR_PCIBUS
};
#define LEGACY_ACCESSOR(var, ivar, type) \
__BUS_ACCESSOR(legacy, var, LEGACY, ivar, type)
+LEGACY_ACCESSOR(pcidomain, PCIDOMAIN, uint32_t)
LEGACY_ACCESSOR(pcibus, PCIBUS, uint32_t)
#undef LEGACY_ACCESSOR
==== //depot/projects/delphij_fork/sys/amd64/include/vmparam.h#2 (text+ko) ====
@@ -38,7 +38,7 @@
* SUCH DAMAGE.
*
* from: @(#)vmparam.h 5.9 (Berkeley) 5/12/91
- * $FreeBSD: src/sys/amd64/include/vmparam.h,v 1.48 2007/06/03 23:18:29 alc Exp $
+ * $FreeBSD: src/sys/amd64/include/vmparam.h,v 1.49 2007/09/25 06:25:04 alc Exp $
*/
@@ -101,12 +101,13 @@
#define VM_PHYSSEG_MAX 31
/*
- * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool
+ * Create three free page pools: VM_FREEPOOL_DEFAULT is the default pool
* from which physical pages are allocated and VM_FREEPOOL_DIRECT is
* the pool from which physical pages for page tables and small UMA
* objects are allocated.
*/
-#define VM_NFREEPOOL 2
+#define VM_NFREEPOOL 3
+#define VM_FREEPOOL_CACHE 2
#define VM_FREEPOOL_DEFAULT 0
#define VM_FREEPOOL_DIRECT 1
==== //depot/projects/delphij_fork/sys/amd64/pci/pci_bus.c#2 (text+ko) ====
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/amd64/pci/pci_bus.c,v 1.121 2007/05/02 17:50:34 jhb Exp $");
+__FBSDID("$FreeBSD: src/sys/amd64/pci/pci_bus.c,v 1.122 2007/09/30 11:05:13 marius Exp $");
#include "opt_cpu.h"
@@ -276,6 +276,9 @@
{
switch (which) {
+ case PCIB_IVAR_DOMAIN:
+ *result = 0;
+ return 0;
case PCIB_IVAR_BUS:
*result = legacy_get_pcibus(dev);
return 0;
@@ -289,6 +292,8 @@
{
switch (which) {
+ case PCIB_IVAR_DOMAIN:
+ return EINVAL;
case PCIB_IVAR_BUS:
legacy_set_pcibus(dev, value);
return 0;
==== //depot/projects/delphij_fork/sys/arm/arm/locore.S#2 (text+ko) ====
@@ -37,7 +37,7 @@
#include <machine/asm.h>
#include <machine/armreg.h>
#include <machine/pte.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/locore.S,v 1.16 2007/02/26 02:03:48 cognet Exp $");
+__FBSDID("$FreeBSD: src/sys/arm/arm/locore.S,v 1.17 2007/09/27 20:52:17 cognet Exp $");
/* What size should this really be ? It is only used by initarm() */
#define INIT_ARM_STACK_SIZE 2048
@@ -134,7 +134,7 @@
adds r1, r1, #-1
bhi 2b
3:
- ldmia r4!, {r1,r2,r3} /* # of sections, PA|attr, VA */
+ ldmia r4!, {r1,r2,r3} /* # of sections, VA, PA|attr */
cmp r1, #0
adrne r5, 2b
bicne r5, r5, #0xff000000
==== //depot/projects/delphij_fork/sys/arm/conf/AVILA#2 (text+ko) ====
@@ -16,7 +16,7 @@
# If you are in doubt as to the purpose or necessity of a line, check first
# in NOTES.
#
-# $FreeBSD: src/sys/arm/conf/AVILA,v 1.4 2007/05/24 16:27:48 sam Exp $
+# $FreeBSD: src/sys/arm/conf/AVILA,v 1.6 2007/09/27 22:39:49 cognet Exp $
machine arm
ident AVILA
@@ -104,8 +104,8 @@
device avila_ata # Gateworks CF/IDE support
device npe # Network Processing Engine
-device npe_fw # NPE firmware
-device firmware # firmware support for npe_fw
+device npe_fw
+device firmware
device qmgr # Q Manager (required by npe)
device miibus # NB: required by npe
device ether
==== //depot/projects/delphij_fork/sys/arm/include/vmparam.h#2 (text+ko) ====
@@ -28,7 +28,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $FreeBSD: src/sys/arm/include/vmparam.h,v 1.10 2007/06/04 08:02:22 alc Exp $
+ * $FreeBSD: src/sys/arm/include/vmparam.h,v 1.11 2007/09/25 06:25:04 alc Exp $
*/
#ifndef _MACHINE_VMPARAM_H_
@@ -59,12 +59,13 @@
#define VM_PHYSSEG_DENSE
/*
- * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool
+ * Create three free page pools: VM_FREEPOOL_DEFAULT is the default pool
* from which physical pages are allocated and VM_FREEPOOL_DIRECT is
* the pool from which physical pages for small UMA objects are
* allocated.
*/
-#define VM_NFREEPOOL 2
+#define VM_NFREEPOOL 3
+#define VM_FREEPOOL_CACHE 2
#define VM_FREEPOOL_DEFAULT 0
#define VM_FREEPOOL_DIRECT 1
==== //depot/projects/delphij_fork/sys/arm/xscale/i80321/i80321_pci.c#3 (text+ko) ====
@@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/xscale/i80321/i80321_pci.c,v 1.11 2007/07/27 14:53:42 cognet Exp $");
+__FBSDID("$FreeBSD: src/sys/arm/xscale/i80321/i80321_pci.c,v 1.12 2007/09/30 11:05:13 marius Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -250,8 +250,10 @@
{
struct i80321_pci_softc *sc = device_get_softc(dev);
switch (which) {
+ case PCIB_IVAR_DOMAIN:
+ *result = 0;
+ return (0);
case PCIB_IVAR_BUS:
-
*result = sc->sc_busno;
return (0);
@@ -265,6 +267,8 @@
struct i80321_pci_softc * sc = device_get_softc(dev);
switch (which) {
+ case PCIB_IVAR_DOMAIN:
+ return (EINVAL);
case PCIB_IVAR_BUS:
sc->sc_busno = result;
return (0);
==== //depot/projects/delphij_fork/sys/arm/xscale/i8134x/i81342_pci.c#2 (text+ko) ====
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/xscale/i8134x/i81342_pci.c,v 1.1 2007/07/27 14:50:57 cognet Exp $");
+__FBSDID("$FreeBSD: src/sys/arm/xscale/i8134x/i81342_pci.c,v 1.2 2007/09/30 11:05:14 marius Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -481,8 +481,10 @@
{
struct i81342_pci_softc *sc = device_get_softc(dev);
switch (which) {
+ case PCIB_IVAR_DOMAIN:
+ *result = 0;
+ return (0);
case PCIB_IVAR_BUS:
-
*result = sc->sc_busno;
return (0);
@@ -496,6 +498,8 @@
struct i81342_pci_softc * sc = device_get_softc(dev);
switch (which) {
+ case PCIB_IVAR_DOMAIN:
+ return (EINVAL);
case PCIB_IVAR_BUS:
sc->sc_busno = result;
return (0);
==== //depot/projects/delphij_fork/sys/arm/xscale/ixp425/files.ixp425#2 (text+ko) ====
@@ -1,4 +1,4 @@
-#$FreeBSD: src/sys/arm/xscale/ixp425/files.ixp425,v 1.2 2006/12/07 00:49:33 sam Exp $
+#$FreeBSD: src/sys/arm/xscale/ixp425/files.ixp425,v 1.4 2007/09/27 22:39:49 cognet Exp $
arm/arm/cpufunc_asm_xscale.S standard
arm/arm/irq_dispatch.S standard
arm/xscale/ixp425/ixp425.c standard
@@ -16,12 +16,7 @@
arm/xscale/ixp425/ixp425_a4x_io.S optional uart
dev/uart/uart_dev_ns8250.c optional uart
#
-# NPE-based Ethernet support (requires qmgr also). Note the
-# firmware images must be downloaded from the Intel web site.
-# The URL seems to change frequently; try this as a starting
-# place:
-#
-# http://www.intel.com/design/network/products/npfamily/download_ixp400.htm
+# NPE-based Ethernet support (requires qmgr also).
#
arm/xscale/ixp425/if_npe.c optional npe
arm/xscale/ixp425/ixp425_npe.c optional npe
@@ -41,7 +36,7 @@
clean "IxNpeMicrocode.fwo"
IxNpeMicrocode.dat optional npe_fw \
dependency ".PHONY" \
- compile-with "if [ -e $S/arm/xscale/ixp425/IxNpeMicrocode.dat ]; then ln -sf $S/arm/xscale/ixp425/IxNpeMicrocode.dat .; else echo 'WARNING, no IxNpeMicrocode.dat file; you must obtain this from the Intel web site'; false; fi" \
+ compile-with "uudecode < $S/contrib/dev/npe/IxNpeMicrocode.dat.uu" \
no-obj no-implicit-rule \
clean "IxNpeMicrocode.dat"
#
==== //depot/projects/delphij_fork/sys/arm/xscale/ixp425/ixp425_npe.c#2 (text+ko) ====
@@ -57,7 +57,7 @@
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/xscale/ixp425/ixp425_npe.c,v 1.6 2007/05/24 16:31:22 sam Exp $");
+__FBSDID("$FreeBSD: src/sys/arm/xscale/ixp425/ixp425_npe.c,v 1.8 2007/09/27 22:39:49 cognet Exp $");
/*
* Intel XScale Network Processing Engine (NPE) support.
==== //depot/projects/delphij_fork/sys/arm/xscale/ixp425/ixp425_npevar.h#2 (text+ko) ====
@@ -21,7 +21,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $FreeBSD: src/sys/arm/xscale/ixp425/ixp425_npevar.h,v 1.2 2007/05/24 16:31:22 sam Exp $
+ * $FreeBSD: src/sys/arm/xscale/ixp425/ixp425_npevar.h,v 1.4 2007/09/27 22:39:49 cognet Exp $
*/
#ifndef _IXP425_NPEVAR_H_
==== //depot/projects/delphij_fork/sys/arm/xscale/ixp425/ixp425_pci.c#2 (text+ko) ====
@@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/xscale/ixp425/ixp425_pci.c,v 1.4 2007/03/06 10:58:22 piso Exp $");
+__FBSDID("$FreeBSD: src/sys/arm/xscale/ixp425/ixp425_pci.c,v 1.5 2007/09/30 11:05:14 marius Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -229,6 +229,9 @@
sc = device_get_softc(dev);
switch (which) {
+ case PCIB_IVAR_DOMAIN:
+ *result = 0;
+ return (0);
case PCIB_IVAR_BUS:
*result = sc->sc_bus;
return (0);
@@ -244,6 +247,8 @@
sc = device_get_softc(dev);
switch (which) {
+ case PCIB_IVAR_DOMAIN:
+ return (EINVAL);
case PCIB_IVAR_BUS:
sc->sc_bus = value;
return (0);
==== //depot/projects/delphij_fork/sys/boot/forth/loader.conf#2 (text+ko) ====
@@ -6,7 +6,7 @@
#
# All arguments must be in double quotes.
#
-# $FreeBSD: src/sys/boot/forth/loader.conf,v 1.121 2007/06/25 05:06:55 rafan Exp $
+# $FreeBSD: src/sys/boot/forth/loader.conf,v 1.122 2007/09/26 08:38:25 ru Exp $
##############################################################
### Basic configuration options ############################
@@ -44,7 +44,8 @@
#autoboot_delay="10" # Delay in seconds before autobooting,
# set to -1 if you don't want user to be
# allowed to interrupt autoboot process and
- # escape to the loader prompt
+ # escape to the loader prompt, set to
+ # "NO" to disable autobooting
#beastie_disable="NO" # Turn the beastie boot menu on and off
#loader_logo="fbsdbw" # Desired logo: fbsdbw, beastiebw, beastie, none
#comconsole_speed="9600" # Set the current serial console speed
==== //depot/projects/delphij_fork/sys/compat/ia32/ia32_sysvec.c#3 (text+ko) ====
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/compat/ia32/ia32_sysvec.c,v 1.26 2007/07/12 18:01:30 jhb Exp $");
+__FBSDID("$FreeBSD: src/sys/compat/ia32/ia32_sysvec.c,v 1.27 2007/09/24 20:49:39 jhb Exp $");
#include "opt_compat.h"
@@ -102,10 +102,13 @@
static u_long ia32_maxdsiz = IA32_MAXDSIZ;
SYSCTL_ULONG(_compat_ia32, OID_AUTO, maxdsiz, CTLFLAG_RW, &ia32_maxdsiz, 0, "");
+TUNABLE_ULONG("compat.ia32.maxdsiz", &ia32_maxdsiz);
static u_long ia32_maxssiz = IA32_MAXSSIZ;
SYSCTL_ULONG(_compat_ia32, OID_AUTO, maxssiz, CTLFLAG_RW, &ia32_maxssiz, 0, "");
+TUNABLE_ULONG("compat.ia32.maxssiz", &ia32_maxssiz);
static u_long ia32_maxvmem = IA32_MAXVMEM;
SYSCTL_ULONG(_compat_ia32, OID_AUTO, maxvmem, CTLFLAG_RW, &ia32_maxvmem, 0, "");
+TUNABLE_ULONG("compat.ia32.maxvmem", &ia32_maxvmem);
struct sysentvec ia32_freebsd_sysvec = {
FREEBSD32_SYS_MAXSYSCALL,
==== //depot/projects/delphij_fork/sys/conf/NOTES#11 (text+ko) ====
@@ -1,4 +1,4 @@
-# $FreeBSD: src/sys/conf/NOTES,v 1.1453 2007/09/23 07:34:22 pjd Exp $
+# $FreeBSD: src/sys/conf/NOTES,v 1.1454 2007/09/26 21:14:17 marius Exp $
#
# NOTES -- Lines that can be cut/pasted into kernel and hints configs.
#
@@ -1766,6 +1766,7 @@
# fpa: Support for the Digital DEFPA PCI FDDI. `device fddi' is also needed.
# fxp: Intel EtherExpress Pro/100B
# (hint of prefer_iomap can be done to prefer I/O instead of Mem mapping)
+# gem: Apple GMAC/Sun ERI/Sun GEM
# hme: Sun HME (Happy Meal Ethernet)
# le: AMD Am7900 LANCE and Am79C9xx PCnet
# lge: Support for PCI gigabit ethernet adapters based on the Level 1
@@ -1880,6 +1881,7 @@
device dc # DEC/Intel 21143 and various workalikes
device fxp # Intel EtherExpress PRO/100B (82557, 82558)
hint.fxp.0.prefer_iomap="0"
+device gem # Apple GMAC/Sun ERI/Sun GEM
device hme # Sun HME (Happy Meal Ethernet)
device lge # Level 1 LXT1001 gigabit Ethernet
device my # Myson Fast Ethernet (MTD80X, MTD89X)
==== //depot/projects/delphij_fork/sys/contrib/dev/acpica/evmisc.c#2 (text+ko) ====
@@ -568,6 +568,20 @@
}
/*
+ * Update the global lock handle and check for wraparound. The handle is
+ * only used for the external global lock interfaces, but it is updated
+ * here to properly handle the case where a single thread may acquire the
+ * lock via both the AML and the AcpiAcquireGlobalLock interfaces. The
+ * handle is therefore updated on the first acquire from a given thread
+ * regardless of where the acquisition request originated.
+ */
+ AcpiGbl_GlobalLockHandle++;
+ if (AcpiGbl_GlobalLockHandle == 0)
+ {
+ AcpiGbl_GlobalLockHandle = 1;
+ }
+
+ /*
* Make sure that a global lock actually exists. If not, just treat
* the lock as a standard mutex.
*/
==== //depot/projects/delphij_fork/sys/contrib/dev/acpica/evxface.c#2 (text+ko) ====
@@ -921,16 +921,7 @@
if (ACPI_SUCCESS (Status))
{
- /*
- * If this was the first acquisition of the Global Lock by this thread,
- * create a new handle. Otherwise, return the existing handle.
- */
- if (AcpiGbl_GlobalLockMutex->Mutex.AcquisitionDepth == 1)
- {
- AcpiGbl_GlobalLockHandle++;
- }
-
- /* Return the global lock handle */
+ /* Return the global lock handle (updated in AcpiEvAcquireGlobalLock) */
*Handle = AcpiGbl_GlobalLockHandle;
}
==== //depot/projects/delphij_fork/sys/dev/acpica/acpi_ec.c#2 (text+ko) ====
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2003 Nate Lawson
+ * Copyright (c) 2003-2007 Nate Lawson
* Copyright (c) 2000 Michael Smith
* Copyright (c) 2000 BSDi
* All rights reserved.
@@ -25,118 +25,9 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
-/*-
- ******************************************************************************
- *
- * 1. Copyright Notice
- *
- * Some or all of this work - Copyright (c) 1999, Intel Corp. All rights
- * reserved.
- *
- * 2. License
- *
- * 2.1. This is your license from Intel Corp. under its intellectual property
- * rights. You may have additional license terms from the party that provided
- * you this software, covering your right to use that party's intellectual
- * property rights.
- *
- * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
- * copy of the source code appearing in this file ("Covered Code") an
- * irrevocable, perpetual, worldwide license under Intel's copyrights in the
- * base code distributed originally by Intel ("Original Intel Code") to copy,
- * make derivatives, distribute, use and display any portion of the Covered
- * Code in any form, with the right to sublicense such rights; and
- *
- * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
- * license (with the right to sublicense), under only those claims of Intel
- * patents that are infringed by the Original Intel Code, to make, use, sell,
- * offer to sell, and import the Covered Code and derivative works thereof
- * solely to the minimum extent necessary to exercise the above copyright
- * license, and in no event shall the patent license extend to any additions
- * to or modifications of the Original Intel Code. No other license or right
- * is granted directly or by implication, estoppel or otherwise;
- *
- * The above copyright and patent license is granted only if the following
- * conditions are met:
- *
- * 3. Conditions
- *
- * 3.1. Redistribution of Source with Rights to Further Distribute Source.
- * Redistribution of source code of any substantial portion of the Covered
- * Code or modification with rights to further distribute source must include
- * the above Copyright Notice, the above License, this list of Conditions,
- * and the following Disclaimer and Export Compliance provision. In addition,
- * Licensee must cause all Covered Code to which Licensee contributes to
- * contain a file documenting the changes Licensee made to create that Covered
- * Code and the date of any change. Licensee must include in that file the
- * documentation of any changes made by any predecessor Licensee. Licensee
- * must include a prominent statement that the modification is derived,
- * directly or indirectly, from Original Intel Code.
- *
- * 3.2. Redistribution of Source with no Rights to Further Distribute Source.
- * Redistribution of source code of any substantial portion of the Covered
- * Code or modification without rights to further distribute source must
- * include the following Disclaimer and Export Compliance provision in the
- * documentation and/or other materials provided with distribution. In
- * addition, Licensee may not authorize further sublicense of source of any
- * portion of the Covered Code, and must include terms to the effect that the
- * license from Licensee to its licensee is limited to the intellectual
- * property embodied in the software Licensee provides to its licensee, and
- * not to intellectual property embodied in modifications its licensee may
- * make.
- *
- * 3.3. Redistribution of Executable. Redistribution in executable form of any
- * substantial portion of the Covered Code or modification must reproduce the
- * above Copyright Notice, and the following Disclaimer and Export Compliance
- * provision in the documentation and/or other materials provided with the
- * distribution.
- *
- * 3.4. Intel retains all right, title, and interest in and to the Original
- * Intel Code.
- *
- * 3.5. Neither the name Intel nor any other trademark owned or controlled by
- * Intel shall be used in advertising or otherwise to promote the sale, use or
- * other dealings in products derived from or relating to the Covered Code
- * without prior written authorization from Intel.
- *
- * 4. Disclaimer and Export Compliance
- *
- * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
- * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
- * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
- * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
- * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
- * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
- * PARTICULAR PURPOSE.
- *
- * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
- * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
- * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
- * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
- * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
- * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
- * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
- * LIMITED REMEDY.
- *
- * 4.3. Licensee shall not export, either directly or indirectly, any of this
- * software or system incorporating such software without first obtaining any
- * required license or other approval from the U. S. Department of Commerce or
- * any other agency or department of the United States Government. In the
- * event Licensee exports any such software from the United States or
- * re-exports any such software from a foreign destination, Licensee shall
- * ensure that the distribution and export/re-export of the software is in
- * compliance with all laws, regulations, orders, or other restrictions of the
- * U.S. Export Administration Regulations. Licensee agrees that neither it nor
- * any of its subsidiaries will export/re-export any technical data, process,
- * software, or service, directly or indirectly, to any country for which the
- * United States government or any agency thereof requires an export license,
- * other governmental approval, or letter of assurance, without first obtaining
- * such license, approval or letter.
- *
- *****************************************************************************/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/acpica/acpi_ec.c,v 1.75 2007/06/15 18:02:33 njl Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/acpica/acpi_ec.c,v 1.76 2007/09/24 16:59:06 njl Exp $");
#include "opt_acpi.h"
#include <sys/param.h>
@@ -171,7 +62,7 @@
#define EC_COMMAND_BURST_DISABLE ((EC_COMMAND) 0x83)
#define EC_COMMAND_QUERY ((EC_COMMAND) 0x84)
-/*
+/*
* EC_STATUS:
* ----------
* The encoding of the EC status register is illustrated below.
@@ -248,8 +139,7 @@
int ec_uid;
ACPI_HANDLE ec_gpehandle;
UINT8 ec_gpebit;
- UINT8 ec_csrvalue;
-
+
int ec_data_rid;
struct resource *ec_data_res;
bus_space_tag_t ec_data_tag;
@@ -260,11 +150,11 @@
bus_space_tag_t ec_csr_tag;
bus_space_handle_t ec_csr_handle;
- struct mtx ec_mtx;
int ec_glk;
int ec_glkhandle;
int ec_burstactive;
int ec_sci_pend;
+ u_int ec_gencount;
};
/*
@@ -275,13 +165,10 @@
#define EC_LOCK_TIMEOUT 1000
/* Default delay in microseconds between each run of the status polling loop. */
-#define EC_POLL_DELAY 10
-
-/* Default time in microseconds spent polling before sleep waiting. */
-#define EC_POLL_TIME 500
+#define EC_POLL_DELAY 5
/* Total time in ms spent waiting for a response from EC. */
-#define EC_TIMEOUT 500
+#define EC_TIMEOUT 750
#define EVENT_READY(event, status) \
(((event) == EC_EVENT_OUTPUT_BUFFER_FULL && \
@@ -298,17 +185,17 @@
TUNABLE_INT("debug.acpi.ec.burst", &ec_burst_mode);
SYSCTL_INT(_debug_acpi_ec, OID_AUTO, burst, CTLFLAG_RW, &ec_burst_mode, 0,
"Enable use of burst mode (faster for nearly all systems)");
-static int ec_poll_time = EC_POLL_TIME;
-TUNABLE_INT("debug.acpi.ec.poll_time", &ec_poll_time);
-SYSCTL_INT(_debug_acpi_ec, OID_AUTO, poll_time, CTLFLAG_RW, &ec_poll_time,
- EC_POLL_TIME, "Time spent polling vs. sleeping (CPU intensive)");
+static int ec_polled_mode;
+TUNABLE_INT("debug.acpi.ec.polled", &ec_polled_mode);
+SYSCTL_INT(_debug_acpi_ec, OID_AUTO, polled, CTLFLAG_RW, &ec_polled_mode, 0,
+ "Force use of polled mode (only if interrupt mode doesn't work)");
static int ec_timeout = EC_TIMEOUT;
TUNABLE_INT("debug.acpi.ec.timeout", &ec_timeout);
SYSCTL_INT(_debug_acpi_ec, OID_AUTO, timeout, CTLFLAG_RW, &ec_timeout,
EC_TIMEOUT, "Total time spent waiting for a response (poll+sleep)");
-static __inline ACPI_STATUS
-EcLock(struct acpi_ec_softc *sc, int serialize)
+static ACPI_STATUS
+EcLock(struct acpi_ec_softc *sc)
{
ACPI_STATUS status;
@@ -319,37 +206,27 @@
if (ACPI_FAILURE(status))
return (status);
}
-
- /*
- * If caller is executing a series of commands, acquire the exclusive lock
- * to serialize with other users.
- * To sync with bottom-half interrupt handler, always acquire the mutex.
- */
- if (serialize)
- ACPI_SERIAL_BEGIN(ec);
- mtx_lock(&sc->ec_mtx);
-
+ ACPI_SERIAL_BEGIN(ec);
return (status);
}
-static __inline void
+static void
EcUnlock(struct acpi_ec_softc *sc)
{
- mtx_unlock(&sc->ec_mtx);
- if (sx_xlocked(&ec_sxlock))
- ACPI_SERIAL_END(ec);
+ ACPI_SERIAL_END(ec);
if (sc->ec_glk)
AcpiReleaseGlobalLock(sc->ec_glkhandle);
}
static uint32_t EcGpeHandler(void *Context);
-static ACPI_STATUS EcSpaceSetup(ACPI_HANDLE Region, UINT32 Function,
+static ACPI_STATUS EcSpaceSetup(ACPI_HANDLE Region, UINT32 Function,
void *Context, void **return_Context);
static ACPI_STATUS EcSpaceHandler(UINT32 Function,
ACPI_PHYSICAL_ADDRESS Address,
UINT32 width, ACPI_INTEGER *Value,
void *Context, void *RegionContext);
-static ACPI_STATUS EcWaitEvent(struct acpi_ec_softc *sc, EC_EVENT Event);
+static ACPI_STATUS EcWaitEvent(struct acpi_ec_softc *sc, EC_EVENT Event,
+ u_int gen_count);
static ACPI_STATUS EcCommand(struct acpi_ec_softc *sc, EC_COMMAND cmd);
static ACPI_STATUS EcRead(struct acpi_ec_softc *sc, UINT8 Address,
UINT8 *Data);
@@ -387,10 +264,12 @@
MODULE_DEPEND(acpi_ec, acpi, 1, 1, 1);
/*
- * Look for an ECDT and if we find one, set up default GPE and
+ * Look for an ECDT and if we find one, set up default GPE and
* space handlers to catch attempts to access EC space before
* we have a real driver instance in place.
- * TODO: if people report invalid ECDTs, add a tunable to disable them.
+ *
+ * TODO: Some old Gateway laptops need us to fake up an ECDT or
+ * otherwise attach early so that _REG methods can run.
*/
void
acpi_ec_ecdt_probe(device_t parent)
@@ -578,7 +457,6 @@
params = acpi_get_private(dev);
sc->ec_dev = dev;
sc->ec_handle = acpi_get_handle(dev);
- mtx_init(&sc->ec_mtx, "ACPI EC lock", NULL, MTX_DEF);
/* Retrieve previously probed values via device ivars. */
sc->ec_glk = params->glk;
@@ -621,7 +499,7 @@
goto error;
}
- /*
+ /*
* Install address space handler
*/
ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "attaching address space handler\n"));
@@ -656,12 +534,11 @@
AcpiRemoveAddressSpaceHandler(sc->ec_handle, ACPI_ADR_SPACE_EC,
EcSpaceHandler);
if (sc->ec_csr_res)
- bus_release_resource(sc->ec_dev, SYS_RES_IOPORT, sc->ec_csr_rid,
+ bus_release_resource(sc->ec_dev, SYS_RES_IOPORT, sc->ec_csr_rid,
sc->ec_csr_res);
if (sc->ec_data_res)
bus_release_resource(sc->ec_dev, SYS_RES_IOPORT, sc->ec_data_rid,
sc->ec_data_res);
- mtx_destroy(&sc->ec_mtx);
return (ENXIO);
}
@@ -715,57 +592,55 @@
KASSERT(Context != NULL, ("EcGpeQueryHandler called with NULL"));
/* Serialize user access with EcSpaceHandler(). */
- Status = EcLock(sc, TRUE);
+ Status = EcLock(sc);
if (ACPI_FAILURE(Status)) {
- ACPI_VPRINT(sc->ec_dev, acpi_device_get_parent_softc(sc->ec_dev),
- "GpeQuery lock error: %s\n", AcpiFormatException(Status));
+ device_printf(sc->ec_dev, "GpeQuery lock error: %s\n",
+ AcpiFormatException(Status));
return;
}
/*
* Send a query command to the EC to find out which _Qxx call it
* wants to make. This command clears the SCI bit and also the
- * interrupt source since we are edge-triggered.
+ * interrupt source since we are edge-triggered. To prevent the GPE
+ * that may arise from running the query from causing another query
+ * to be queued, we clear the pending flag only after running it.
*/
Status = EcCommand(sc, EC_COMMAND_QUERY);
+ sc->ec_sci_pend = FALSE;
if (ACPI_FAILURE(Status)) {
EcUnlock(sc);
- ACPI_VPRINT(sc->ec_dev, acpi_device_get_parent_softc(sc->ec_dev),
- "GPE query failed - %s\n", AcpiFormatException(Status));
- goto re_enable;
+ device_printf(sc->ec_dev, "GPE query failed: %s\n",
+ AcpiFormatException(Status));
+ return;
}
Data = EC_GET_DATA(sc);
- sc->ec_sci_pend = FALSE;
- /* Drop locks before evaluating _Qxx method since it may trigger GPEs. */
+ /*
+ * We have to unlock before running the _Qxx method below since that
+ * method may attempt to read/write from EC address space, causing
+ * recursive acquisition of the lock.
+ */
EcUnlock(sc);
/* Ignore the value for "no outstanding event". (13.3.5) */
- CTR2(KTR_ACPI, "ec query ok,%s running _Q%02x", Data ? "" : " not", Data);
+ CTR2(KTR_ACPI, "ec query ok,%s running _Q%02X", Data ? "" : " not", Data);
if (Data == 0)
- goto re_enable;
+ return;
/* Evaluate _Qxx to respond to the controller. */
- snprintf(qxx, sizeof(qxx), "_Q%02x", Data);
+ snprintf(qxx, sizeof(qxx), "_Q%02X", Data);
AcpiUtStrupr(qxx);
Status = AcpiEvaluateObject(sc->ec_handle, qxx, NULL, NULL);
if (ACPI_FAILURE(Status) && Status != AE_NOT_FOUND) {
- ACPI_VPRINT(sc->ec_dev, acpi_device_get_parent_softc(sc->ec_dev),
- "evaluation of GPE query method %s failed - %s\n",
- qxx, AcpiFormatException(Status));
+ device_printf(sc->ec_dev, "evaluation of query method %s failed: %s\n",
+ qxx, AcpiFormatException(Status));
}
-
-re_enable:
- /* Re-enable the GPE event so we'll get future requests. */
- Status = AcpiEnableGpe(sc->ec_gpehandle, sc->ec_gpebit, ACPI_ISR);
- if (ACPI_FAILURE(Status))
- printf("EcGpeQueryHandler: AcpiEnableEvent failed\n");
}
/*
- * Handle a GPE. Currently we only handle SCI events as others must
- * be handled by polling in EcWaitEvent(). This is because some ECs
- * treat events as level when they should be edge-triggered.
+ * The GPE handler is called when IBE/OBF or SCI events occur. We are
+ * called from an unknown lock context.
*/
static uint32_t
EcGpeHandler(void *Context)
@@ -773,68 +648,32 @@
struct acpi_ec_softc *sc = Context;
ACPI_STATUS Status;
EC_STATUS EcStatus;
- int query_pend;
KASSERT(Context != NULL, ("EcGpeHandler called with NULL"));
+ CTR0(KTR_ACPI, "ec gpe handler start");
/*
- * Disable further GPEs while we handle this one. Since we are directly
- * called by ACPI-CA and it may have unknown locks held, we specify the
- * ACPI_ISR flag to keep it from acquiring any more mutexes (although
- * sleeping would be ok since we're in an ithread.)
+ * Notify EcWaitEvent() that the status register is now fresh. If we
+ * didn't do this, it wouldn't be possible to distinguish an old IBE
+ * from a new one, for example when doing a write transaction (writing
+ * address and then data values.)
*/
- AcpiDisableGpe(sc->ec_gpehandle, sc->ec_gpebit, ACPI_ISR);
+ atomic_add_int(&sc->ec_gencount, 1);
+ wakeup(&sc->ec_gencount);
- /* For interrupt (GPE) handler, don't acquire serialization lock. */
- Status = EcLock(sc, FALSE);
- if (ACPI_FAILURE(Status)) {
- ACPI_VPRINT(sc->ec_dev, acpi_device_get_parent_softc(sc->ec_dev),
- "GpeQuery lock error: %s\n", AcpiFormatException(Status));
- return (-1);
- }
-
/*
- * If burst was active, but the status bit was cleared, the EC had to
- * exit burst mode for some reason. Record this for later.
+ * If the EC_SCI bit of the status register is set, queue a query handler.
+ * It will run the query and _Qxx method later, under the lock.
*/
EcStatus = EC_GET_CSR(sc);
- if (sc->ec_burstactive && (EcStatus & EC_FLAG_BURST_MODE) == 0) {
- CTR0(KTR_ACPI, "ec burst disabled in query handler");
- sc->ec_burstactive = FALSE;
- }
>>> TRUNCATED FOR MAIL (1000 lines) <<<
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