PERFORCE change 108425 for review
Olivier Houchard
cognet at FreeBSD.org
Wed Oct 25 13:41:36 PDT 2006
http://perforce.freebsd.org/chv.cgi?CH=108425
Change 108425 by cognet at cognet on 2006/10/25 20:39:14
MFsam_avila: implement bus_teardown_intr
Affected files ...
.. //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425.c#11 edit
.. //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425_pci.c#10 edit
Differences ...
==== //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425.c#11 (text+ko) ====
@@ -67,12 +67,19 @@
uint32_t size;
uint32_t vbase;
} hwvtrans[] = {
- { IXP425_IO_HWBASE, IXP425_IO_SIZE, IXP425_IO_VBASE },
- { IXP425_EXP_HWBASE, IXP425_EXP_SIZE, IXP425_EXP_VBASE },
- { IXP425_PCI_HWBASE, IXP425_PCI_SIZE, IXP425_PCI_VBASE },
- { IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE, IXP425_PCI_MEM_VBASE },
- /*{ IXP425_PCI_IO_HWBASE, IXP425_PCI_IO_SIZE, IXP425_PCI_IO_VBASE },*/
- { IXP425_MCU_HWBASE, IXP425_MCU_SIZE, IXP425_MCU_VBASE },
+ { IXP425_IO_HWBASE, IXP425_IO_SIZE, IXP425_IO_VBASE },
+ { IXP425_EXP_HWBASE, IXP425_EXP_SIZE, IXP425_EXP_VBASE },
+ { IXP425_PCI_HWBASE, IXP425_PCI_SIZE, IXP425_PCI_VBASE },
+ { IXP425_PCI_MEM_HWBASE,IXP425_PCI_MEM_SIZE, IXP425_PCI_MEM_VBASE },
+#if 0
+ { IXP425_PCI_IO_HWBASE, IXP425_PCI_IO_SIZE, IXP425_PCI_IO_VBASE },
+#endif
+ { IXP425_MCU_HWBASE, IXP425_MCU_SIZE, IXP425_MCU_VBASE },
+ { IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE, IXP425_QMGR_VBASE },
+ { IXP425_NPE_A_HWBASE, IXP425_NPE_A_SIZE, IXP425_NPE_A_VBASE },
+ { IXP425_NPE_B_HWBASE, IXP425_NPE_B_SIZE, IXP425_NPE_B_VBASE },
+ { IXP425_MAC_A_HWBASE, IXP425_MAC_A_SIZE, IXP425_MAC_A_VBASE },
+ { IXP425_MAC_B_HWBASE, IXP425_MAC_B_SIZE, IXP425_MAC_B_VBASE },
};
static int
@@ -230,10 +237,18 @@
device_add_child(dev, "ixpclk", 0);
device_add_child(dev, "ixpiic", 0);
device_add_child(dev, "uart", 0);
+ /* XXX these are optional, what if they are not configured? */
+ device_add_child(dev, "ixpqmgr", 0);
+ device_add_child(dev, "npe", 0); /* NPE-A */
+ device_add_child(dev, "npe", 1); /* NPE-B */
if (bus_space_map(sc->sc_iot, IXP425_GPIO_HWBASE, IXP425_GPIO_SIZE,
0, &sc->sc_gpio_ioh))
panic("ixp425_attach: unable to map GPIO registers");
+ if (bus_space_map(sc->sc_iot, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
+ 0, &sc->sc_exp_ioh))
+ panic("ixp425_attach: unable to map Expansion Bus registers");
+
bus_generic_probe(dev);
bus_generic_attach(dev);
@@ -248,19 +263,25 @@
struct rman *rmanp;
struct resource *rv;
uint32_t vbase;
+ int isuart = (start == 0 && end == ~0); /* XXX how to do this right? */
rv = NULL;
switch (type) {
case SYS_RES_IRQ:
rmanp = &sc->sc_irq_rman;
+ if (isuart) {
+ if (device_get_unit(dev) == 0)
+ start = IXP425_INT_UART0;
+ else
+ start = IXP425_INT_UART1;
+ end = start;
+ }
break;
case SYS_RES_MEMORY:
rmanp = &sc->sc_mem_rman;
- /* Naughty hack to get the UART memory-mapped register. */
- /* I'm not sure of how to do it cleanly. */
- if (start == 0 && end == ~0) {
+ if (isuart) {
if (device_get_unit(dev) == 0)
start = IXP425_UART0_HWBASE;
else
@@ -279,11 +300,8 @@
if (rv != NULL) {
rman_set_rid(rv, *rid);
if (type == SYS_RES_MEMORY) {
- if (start == IXP425_UART0_HWBASE || start ==
- IXP425_UART1_HWBASE)
- rman_set_bustag(rv, &ixp425_a4x_bs_tag);
- else
- rman_set_bustag(rv, sc->sc_iot);
+ rman_set_bustag(rv,
+ isuart ? &ixp425_a4x_bs_tag : sc->sc_iot);
rman_set_bushandle(rv, vbase);
}
}
@@ -317,6 +335,8 @@
void *cookie)
{
+ intr_enabled &= ~ 1 << rman_get_start(res);
+ ixp425_set_intrmask();
return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie));
}
==== //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425_pci.c#10 (text+ko) ====
@@ -101,8 +101,8 @@
PCI_CRP_AD_CBE, ((reg & ~3) | COMMAND_CRP_WRITE));
PCI_CSR_WRITE_4(sc,
PCI_CRP_AD_WDATA, data);
- printf("DID IT %x %x\n", reg, data);
}
+
static int
ixppcib_attach(device_t dev)
{
@@ -251,8 +251,7 @@
void *cookie)
{
- device_printf(dev, "%s called teardown_intr\n", device_get_nameunit(child));
- return (ENXIO);
+ return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec, cookie));
}
static struct resource *
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