PERFORCE change 109692 for review
Sam Leffler
sam at FreeBSD.org
Fri Nov 10 18:23:13 UTC 2006
http://perforce.freebsd.org/chv.cgi?CH=109692
Change 109692 by sam at sam_ebb on 2006/11/10 18:22:20
o correct CS1 configuration
o disable interrupts until we sort out ata device reset; otherwise
ata storms ('cuz reset has done something to generate an
interrupt but then no devices are presumed to exist so the
interrupt is not processed)
Affected files ...
.. //depot/projects/arm/src/sys/arm/xscale/ixp425/avila_ata.c#3 edit
Differences ...
==== //depot/projects/arm/src/sys/arm/xscale/ixp425/avila_ata.c#3 (text+ko) ====
@@ -81,7 +81,9 @@
} sc_intr[1]; /* NB: 1/channel */
};
+#if 0
static void ata_avila_intr(void *);
+#endif
bs_protos(ata);
static int
@@ -142,20 +144,21 @@
/* clear ISR */
GPIO_CONF_WRITE_4(sa, IXP425_GPIO_GPISR, (1<<AVILA_IDE_GPIN));
- /* configure CS1 window */
+ /* configure CS1 window, leaving timing unchanged */
EXP_BUS_WRITE_4(sc, EXP_TIMING_CS1_OFFSET,
EXP_BUS_READ_4(sc, EXP_TIMING_CS1_OFFSET) |
- EXP_MUX_EN | EXP_WR_EN | EXP_BYTE_EN);
+ EXP_BYTE_EN | EXP_WR_EN | EXP_BYTE_RD16 | EXP_CS_EN);
/* setup interrupt */
sc->sc_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->sc_rid,
AVILA_IDE_IRQ, AVILA_IDE_IRQ, 1, RF_ACTIVE);
if (!sc->sc_irq)
panic("Unable to allocate irq %u.\n", AVILA_IDE_IRQ);
+#if 0
bus_setup_intr(dev, sc->sc_irq,
INTR_TYPE_BIO | INTR_MPSAFE | INTR_ENTROPY,
ata_avila_intr, sc, &sc->sc_ih);
-
+#endif
bootverbose=1;
/* attach channel on this controller */
device_add_child(dev, "ata", devclass_find_free_unit(ata_devclass, 0));
@@ -186,15 +189,19 @@
return 0;
}
+#if 0
static void
ata_avila_intr(void *xsc)
{
struct ata_avila_softc *sc = xsc;
+#if 0
printf("%s: cb %p arg %p\n", __func__, sc->sc_intr[0].cb, sc->sc_intr[0].arg);/*XXX*/
+#endif
if (sc->sc_intr[0].cb != NULL)
sc->sc_intr[0].cb(sc->sc_intr[0].arg);
}
+#endif
static struct resource *
ata_avila_alloc_resource(device_t dev, device_t child, int type, int *rid,
@@ -412,7 +419,9 @@
}
ch->r_io[ATA_CONTROL].res = &sc->sc_ata;
ch->r_io[ATA_CONTROL].offset = AVILA_IDE_CTRL;
+ /* NB: by convention this points at the base of registers */
ch->r_io[ATA_IDX_ADDR].res = &sc->sc_ata;
+ ch->r_io[ATA_IDX_ADDR].offset = 0;
ata_default_registers(dev);
ata_generic_hw(dev);
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