PERFORCE change 109529 for review

[Sam Leffler]

http://perforce.freebsd.org/chv.cgi?CH=109529

Change 109529 by sam at sam_ebb on 2006/11/08 17:15:37

	Rx fixups:
	o correct rx mac setup: must enable pause frame processing
	  when operating in full duplex
	o correctly handle failure to replenish a rx mbuf
	o eliminiate obfuscating defines used for default values
	  in mac setup
	o move tick callout startup below mac enable

Affected files ...

.. //depot/projects/arm/src/sys/arm/xscale/ixp425/if_npe.c#16 edit

Differences ...

==== //depot/projects/arm/src/sys/arm/xscale/ixp425/if_npe.c#16 (text+ko) ====

@@ -91,8 +91,8 @@
 	device_t	sc_mii;		/* child miibus */
 	bus_space_handle_t sc_miih;	/* MII register window */
 	struct ixpnpe_softc *sc_npe;	/* NPE support */
-	int		sc_portid;
-	int		debug;
+	int		sc_portid;	/* NPE port identification */
+	int		debug;		/* DPRINTF* control */
 	struct callout	tick_ch;	/* Tick callout */
 	struct npedma	txdma;
 	struct npebuf	*tx_free;	/* list of free tx buffers */
@@ -856,21 +856,16 @@
 
 			ifp->if_ipackets++;
 			ifp->if_input(ifp, mrx);
-
-			if (npe_rxbuf_init(sc, npe, m) != 0) {
-				/* XXX recover? */
-				continue;
-			}
 		} else {
+			/* discard frame and re-use mbuf */
 			m = npe->ix_m;
-			npe->ix_ne[0].len = htobe32(m->m_len << 16);
-			npe->ix_ne[0].next = 0;
-			/* XXX? sync? */
+		}
+		if (npe_rxbuf_init(sc, npe, m) == 0) {
+			/* return npe buf to rx free list */
+			ixpqmgr_qwrite(sc->rx_freeqid, npe->ix_neaddr);
+		} else {
+			/* XXX should not happen */
 		}
-		bus_dmamap_sync(dma->buf_tag, dma->buf_map,
-		    BUS_DMASYNC_PREWRITE);
-		/* return npe buf to rx free list */
-		ixpqmgr_qwrite(sc->rx_freeqid, npe->ix_neaddr);
 	}
 #undef P2V
 }
@@ -938,36 +933,32 @@
  	WR4(sc, NPE_MAC_TX_CNTRL1,
 	    RD4(sc, NPE_MAC_TX_CNTRL1) &~ NPE_TX_CNTRL1_TX_EN);
 
-	/* set clock for ixp4xx */
-	WR4(sc, NPE_MAC_INT_CLK_THRESH, NPE_MAC_INT_CLK_THRESH_DEFAULT);
-
 	/*
 	 * Set the MAC core registers.
 	 */
-	WR4(sc, NPE_MAC_TX_CNTRL2, NPE_TX_CNTRL2_RETRIES_MASK);
-	WR4(sc, NPE_MAC_RANDOM_SEED, NPE_RANDOM_SEED_DEFAULT);
-	WR4(sc, NPE_MAC_THRESH_P_EMPTY, NPE_MAC_THRESH_P_EMPTY_DEFAULT);
-	WR4(sc, NPE_MAC_THRESH_P_FULL, NPE_MAC_THRESH_P_FULL_DEFAULT);
-	WR4(sc, NPE_MAC_TX_DEFER, NPE_MAC_TX_DEFER_DEFAULT);
-	WR4(sc, NPE_MAC_TX_TWO_DEFER_1, NPE_MAC_TX_TWO_DEFER_1_DEFAULT);
-	WR4(sc, NPE_MAC_TX_TWO_DEFER_2, NPE_MAC_TX_TWO_DEFER_2_DEFAULT);
-	WR4(sc, NPE_MAC_SLOT_TIME, NPE_MAC_SLOT_TIME_DEFAULT);
-	WR4(sc, NPE_MAC_INT_CLK_THRESH, NPE_MAC_INT_CLK_THRESH_DEFAULT);
-	WR4(sc, NPE_MAC_BUF_SIZE_TX, NPE_MAC_BUF_SIZE_TX_DEFAULT);
-	/* NB: enables padding and FCS append */
-#if 0
-	WR4(sc, NPE_MAC_TX_CNTRL1, NPE_TX_CNTRL1_DEFAULT);
-	WR4(sc, NPE_MAC_RX_CNTRL1, NPE_RX_CNTRL1_DEFAULT);
-#else
-	/* XXX full duplex */
+	WR4(sc, NPE_MAC_INT_CLK_THRESH, 0x1);	/* clock ratio: for ipx4xx */
+	WR4(sc, NPE_MAC_TX_CNTRL2,	0xf);	/* max retries */
+	WR4(sc, NPE_MAC_RANDOM_SEED,	0x8);	/* LFSR back-off seed */
+	/* thresholds determined by NPE firmware FS */
+	WR4(sc, NPE_MAC_THRESH_P_EMPTY,	0x12);
+	WR4(sc, NPE_MAC_THRESH_P_FULL,	0x30);
+	WR4(sc, NPE_MAC_BUF_SIZE_TX,	0x8);	/* tx fifo threshold (bytes) */
+	WR4(sc, NPE_MAC_TX_DEFER,	0x15);	/* for single deferral */
+	WR4(sc, NPE_MAC_RX_DEFER,	0x16);	/* deferral on inter-frame gap*/
+	WR4(sc, NPE_MAC_TX_TWO_DEFER_1,	0x8);	/* for 2-part deferral */
+	WR4(sc, NPE_MAC_TX_TWO_DEFER_2,	0x7);	/* for 2-part deferral */
+	WR4(sc, NPE_MAC_SLOT_TIME,	0x80);	/* assumes MII mode */
+
 	WR4(sc, NPE_MAC_TX_CNTRL1,
-	     (NPE_TX_CNTRL1_DEFAULT &~ NPE_TX_CNTRL1_TX_EN)
-	    | NPE_TX_CNTRL1_DUPLEX);
+		  NPE_TX_CNTRL1_RETRY		/* retry failed xmits */
+		| NPE_TX_CNTRL1_FCS_EN		/* append FCS */
+		| NPE_TX_CNTRL1_2DEFER		/* 2-part deferal */
+		| NPE_TX_CNTRL1_PAD_EN);	/* pad runt frames */
+	/* XXX pad strip? */
 	WR4(sc, NPE_MAC_RX_CNTRL1,
-	     (NPE_RX_CNTRL1_DEFAULT &~ NPE_RX_CNTRL1_RX_EN)
-	    | NPE_RX_CNTRL1_PAUSE_EN);
-#endif
-	/* XXX RC_CNTRL2? */
+		  NPE_RX_CNTRL1_CRC_EN		/* include CRC/FCS */
+		| NPE_RX_CNTRL1_PAUSE_EN);	/* ena pause frame handling */
+	WR4(sc, NPE_MAC_RX_CNTRL2, 0);
 
 	npe_setmac(sc, IF_LLADDR(ifp));
 	npe_setmcast(sc);
@@ -975,21 +966,17 @@
 	npe_startxmit(sc);
 	npe_startrecv(sc);
 
-	/*
-	 * Set 'running' flag, and clear output active flag
-	 * and attempt to start the output
-	 */
 	ifp->if_drv_flags |= IFF_DRV_RUNNING;
 	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 	ifp->if_timer = 0;		/* just in case */
 
-	callout_reset(&sc->tick_ch, hz, npe_tick, sc);
-
 	/* enable transmitter and reciver in the MAC */
  	WR4(sc, NPE_MAC_RX_CNTRL1,
 	    RD4(sc, NPE_MAC_RX_CNTRL1) | NPE_RX_CNTRL1_RX_EN);
  	WR4(sc, NPE_MAC_TX_CNTRL1,
 	    RD4(sc, NPE_MAC_TX_CNTRL1) | NPE_TX_CNTRL1_TX_EN);
+
+	callout_reset(&sc->tick_ch, hz, npe_tick, sc);
 }
 
 static void