PERFORCE change 100083 for review

[Warner Losh]

http://perforce.freebsd.org/chv.cgi?CH=100083

Change 100083 by imp at imp_lighthouse on 2006/06/26 19:08:07

	Mask out all interrupts when we initialize for console use.
	Start to sort out the interrupt enable/disable mess.  TXRDY appears
	to be level rather than edge in its nature.

Affected files ...

.. //depot/projects/arm/src/sys/arm/at91/uart_dev_at91usart.c#25 edit

Differences ...

==== //depot/projects/arm/src/sys/arm/at91/uart_dev_at91usart.c#25 (text+ko) ====

@@ -212,13 +212,14 @@
 	cr = USART_CR_RSTSTA | USART_CR_RSTRX | USART_CR_RSTTX;
 	WR4(bas, USART_CR, cr);
 	WR4(bas, USART_CR, USART_CR_RXEN | USART_CR_TXEN);
+	WR4(bas, USART_IDR, 0xffffffff);
 #if 0
 	WR4(bas, USART_IER, USART_CSR_TIMEOUT |
 	    USART_CSR_TXRDY | USART_CSR_RXRDY |
 	    USART_CSR_RXBRK | USART_CSR_ENDRX | USART_CSR_ENDTX);
-#endif
 	/* Set the receive timeout to be 1.5 character times. */
 	WR4(bas, USART_RTOR, 12);
+#endif
 }
 
 /*
@@ -336,9 +337,11 @@
 	WR4(&sc->sc_bas, USART_CR, cr);
 	WR4(&sc->sc_bas, USART_CR, USART_CR_RXEN | USART_CR_TXEN);
 	WR4(&sc->sc_bas, USART_IDR, 0xffffffff);
+#if 0
 	WR4(&sc->sc_bas, USART_IER, USART_CSR_TIMEOUT |
 	    USART_CSR_TXRDY | USART_CSR_RXRDY |
 	    USART_CSR_RXBRK | USART_CSR_ENDRX | USART_CSR_ENDTX);
+#endif
 	/* Set the receive timeout to be 1.5 character times. */
 	WR4(&sc->sc_bas, USART_RTOR, 12);
 errout:;
@@ -383,6 +386,7 @@
 	WR4(&sc->sc_bas, PDC_TPR, addr);
 	WR4(&sc->sc_bas, PDC_TCR, sc->sc_txdatasz);
 	WR4(&sc->sc_bas, PDC_PTCR, PDC_PTCR_TXTEN);
+	WR4(&sc->sc_bas, USART_IER, USART_CSR_TXRDY);
 	uart_unlock(sc->sc_hwmtx);
 	if (device_get_unit(sc->sc_dev))
 	    device_printf(sc->sc_dev, "transmit %d bytes\n", sc->sc_txdatasz);
@@ -460,8 +464,10 @@
 		bus_dmamap_unload(atsc->dmatag, atsc->tx_map);
 	}
 	uart_lock(sc->sc_hwmtx);
-	if (csr & USART_CSR_TXRDY && sc->sc_txbusy)
+	if (csr & USART_CSR_TXRDY && sc->sc_txbusy) {
 		ipend |= SER_INT_TXIDLE;
+		WR4(&sc->sc_bas, USART_IDR, USART_CSR_TXRDY);
+	}
 	if (csr & USART_CSR_ENDTX && sc->sc_txbusy)
 		ipend |= SER_INT_TXIDLE;
 	if (csr & (USART_CSR_RXRDY /* | USART_CSR_ENDRX | USART_CSR_TIMEOUT */))