PERFORCE change 89938 for review

[Warner Losh]

http://perforce.freebsd.org/chv.cgi?CH=89938

Change 89938 by imp at imp_Speedy on 2006/01/18 23:37:21

	minor nits

Affected files ...

.. //depot/projects/arm/src/sys/arm/at91/if_ate.c#22 edit
.. //depot/projects/arm/src/sys/arm/at91/if_atereg.h#5 edit

Differences ...

==== //depot/projects/arm/src/sys/arm/at91/if_ate.c#22 (text+ko) ====

@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2005 M. Warner Losh.  All rights reserved.
+ * Copyright (c) 2006 M. Warner Losh.  All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -64,11 +64,6 @@
 #define ATE_MAX_TX_BUFFERS 2		/* We have ping-pong tx buffers */
 #define ATE_MAX_RX_BUFFERS 8
 
-typedef struct {
-    	bus_addr_t addr;
-	int status;
-} rx_desc_t;
-
 struct ate_softc
 {
 	struct ifnet *ifp;		/* ifnet pointer */
@@ -89,7 +84,7 @@
 	struct mbuf *sent_mbuf[ATE_MAX_TX_BUFFERS]; /* Sent mbufs */
 	struct mbuf *rx_mbuf[ATE_MAX_RX_BUFFERS]; /* RX mbufs */
 	bus_addr_t rx_desc_phys;
-	rx_desc_t *rx_descs;
+	eth_rx_desc_t *rx_descs;
 
 	// XXX bogus
 	int intr;
@@ -289,10 +284,10 @@
 	}
 
 	/* Dma TAG and MAP for the rx descriptors. */
-	err = bus_dma_tag_create(NULL, sizeof(rx_desc_t), 0, 
+	err = bus_dma_tag_create(NULL, sizeof(eth_rx_desc_t), 0, 
 	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
-	    ATE_MAX_RX_BUFFERS * sizeof(rx_desc_t), 1,
-	    ATE_MAX_RX_BUFFERS * sizeof(rx_desc_t), 0, busdma_lock_mutex,
+	    ATE_MAX_RX_BUFFERS * sizeof(eth_rx_desc_t), 1,
+	    ATE_MAX_RX_BUFFERS * sizeof(eth_rx_desc_t), 0, busdma_lock_mutex,
 	    &sc->sc_mtx, &sc->rx_desc_tag);
 	if (err != 0)
 		goto errout;
@@ -300,7 +295,7 @@
 	    &sc->rx_desc_map) != 0)
 		goto errout;
 	if (bus_dmamap_load(sc->rx_desc_tag, sc->rx_desc_map, 
-	    sc->rx_descs, ATE_MAX_RX_BUFFERS * sizeof(rx_desc_t), ate_getaddr,
+	    sc->rx_descs, ATE_MAX_RX_BUFFERS * sizeof(eth_rx_desc_t), ate_getaddr,
 	    sc, 0) != 0)
 		goto errout;
 	for (i = 0; i < ATE_MAX_RX_BUFFERS; i++) {
@@ -530,7 +525,7 @@
 		bus_dmamap_sync(sc->rx_desc_tag, sc->rx_desc_map,
 		    BUS_DMASYNC_POSTREAD);
 		for (i = 0; i < ATE_MAX_RX_BUFFERS; i++) {
-			if (sc->rx_descs[i].addr & 1) {
+			if (sc->rx_descs[i].addr & ETH_CPU_OWNER) {
 				struct mbuf *mb = sc->rx_mbuf[i];
 				bus_dma_segment_t seg;
 				int rx_stat = sc->rx_descs[i].status;
@@ -548,7 +543,7 @@
 				    M_PKTHDR);
 				if (!sc->rx_mbuf[i]) {
 					sc->rx_mbuf[i] = mb;
-					sc->rx_descs[i].addr &= ~1;
+					sc->rx_descs[i].addr &= ~ETH_CPU_OWNER;
 					bus_dmamap_sync(sc->rx_desc_tag,
 					    sc->rx_desc_map, 
 					    BUS_DMASYNC_PREWRITE);
@@ -558,22 +553,22 @@
 				    sc->rx_map[i],
 				    sc->rx_mbuf[i], &seg, &nsegs, 0) != 0) {
 					sc->rx_mbuf[i] = mb;
-					sc->rx_descs[i].addr &= ~1;
+					sc->rx_descs[i].addr &= ~ETH_CPU_OWNER;
 					bus_dmamap_sync(sc->rx_desc_tag,
 					    sc->rx_desc_map,
 					    BUS_DMASYNC_PREWRITE);
 					break;
 				}
 				/*
-				 * For the last buffer, set the wrap bit so the controller
-				 * restarts from the first descriptor.
+				 * For the last buffer, set the wrap bit so
+				 * the controller restarts from the first
+				 * descriptor.
 				 */
 				if (i == ATE_MAX_RX_BUFFERS - 1)
 					seg.ds_addr |= 1 << 1;
 				sc->rx_descs[i].addr = seg.ds_addr;
 				sc->rx_descs[i].status = 0;
-				/* Bits 0-10 of the status file == length. */
-				mb->m_len = rx_stat & 0x7ff;
+				mb->m_len = rx_stat & ETH_LEN_MASK;
 				(*sc->ifp->if_input)(sc->ifp, mb);
 				break;
 

==== //depot/projects/arm/src/sys/arm/at91/if_atereg.h#5 (text+ko) ====

@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2005 M. Warner Losh.  All rights reserved.
+ * Copyright (c) 2006 M. Warner Losh.  All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -155,4 +155,21 @@
 		(ETH_MAN_BITS | ETH_MAN_READ | ((phy) << ETH_MAN_PHYA_BIT) | \
 		((reg) << ETH_MAN_REGA_BIT))
 
+typedef struct {
+	uint32_t	addr;
+#define ETH_CPU_OWNER	(1U << 0)
+#define ETH_WRAP_BIT	(1U << 1)
+	uint32_t	status;
+#define ETH_LEN_MASK	0x7ff
+#define ETH_MAC_LOCAL_4	(1U << 23)	/* Packet matched addr 4 */
+#define ETH_MAC_LOCAL_3	(1U << 24)	/* Packet matched addr 3 */
+#define ETH_MAC_LOCAL_2	(1U << 25)	/* Packet matched addr 2 */
+#define ETH_MAC_LOCAL_1	(1U << 26)	/* Packet matched addr 1 */
+#define ETH_MAC_UNK	(1U << 27)	/* Unkown source address RFU */
+#define ETH_MAC_EXT	(1U << 28)	/* External Address */
+#define ETH_MAC_UCAST	(1U << 29)	/* Unicast hash match */
+#define ETH_MAC_MCAST	(1U << 30)	/* Multicast hash match */
+#define ETH_MAC_ONES	(1U << 31)	/* Global all ones bcast addr */
+} eth_rx_desc_t;
+
 #endif /* ARM_AT91_IF_ATEREG_H */