PERFORCE change 89014 for review
Robert Watson
rwatson at FreeBSD.org
Sun Jan 1 09:12:28 PST 2006
http://perforce.freebsd.org/chv.cgi?CH=89014
Change 89014 by rwatson at rwatson_sesame on 2006/01/01 17:11:55
Further integrate netsmp branch.
Affected files ...
.. //depot/projects/netsmp/src/sys/alpha/alpha/cpuconf.c#2 integrate
.. //depot/projects/netsmp/src/sys/amd64/amd64/identcpu.c#4 integrate
.. //depot/projects/netsmp/src/sys/arm/arm/identcpu.c#3 integrate
.. //depot/projects/netsmp/src/sys/conf/NOTES#6 integrate
.. //depot/projects/netsmp/src/sys/conf/options#6 integrate
.. //depot/projects/netsmp/src/sys/dev/pccbb/pccbb.c#7 integrate
.. //depot/projects/netsmp/src/sys/dev/pci/pci.c#8 integrate
.. //depot/projects/netsmp/src/sys/i386/i386/identcpu.c#5 integrate
.. //depot/projects/netsmp/src/sys/ia64/ia64/machdep.c#6 integrate
.. //depot/projects/netsmp/src/sys/kern/vfs_bio.c#7 integrate
.. //depot/projects/netsmp/src/sys/powerpc/powerpc/machdep.c#5 integrate
.. //depot/projects/netsmp/src/sys/sparc64/sparc64/identcpu.c#2 integrate
.. //depot/projects/netsmp/src/sys/sys/copyright.h#2 integrate
.. //depot/projects/netsmp/src/sys/sys/param.h#9 integrate
.. //depot/projects/netsmp/src/sys/vm/vm_contig.c#3 integrate
.. //depot/projects/netsmp/src/sys/vm/vm_fault.c#4 integrate
.. //depot/projects/netsmp/src/sys/vm/vm_object.c#5 integrate
.. //depot/projects/netsmp/src/sys/vm/vm_page.c#6 integrate
.. //depot/projects/netsmp/src/sys/vm/vm_page.h#3 integrate
.. //depot/projects/netsmp/src/sys/vm/vm_pageout.c#4 integrate
.. //depot/projects/netsmp/src/sys/vm/vm_pageq.c#2 integrate
.. //depot/projects/netsmp/src/sys/vm/vm_zeroidle.c#3 integrate
.. //depot/projects/netsmp/src/tools/regression/msdosfs/msdosfstest-6.sh#1 branch
Differences ...
==== //depot/projects/netsmp/src/sys/alpha/alpha/cpuconf.c#2 (text+ko) ====
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/alpha/alpha/cpuconf.c,v 1.18 2005/01/05 20:05:48 imp Exp $");
+__FBSDID("$FreeBSD: src/sys/alpha/alpha/cpuconf.c,v 1.19 2005/12/31 14:39:18 netchild Exp $");
#include "opt_cpu.h"
@@ -171,6 +171,13 @@
};
int napi_cpuinit = (sizeof(api_cpuinit) / sizeof(api_cpuinit[0]));
+void setPQL2(int *const size, int *const ways);
+
+void
+setPQL2(int *const size, int *const ways)
+{
+ return;
+}
void
platform_not_configured(int cputype)
==== //depot/projects/netsmp/src/sys/amd64/amd64/identcpu.c#4 (text+ko) ====
@@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/amd64/amd64/identcpu.c,v 1.141 2005/11/17 02:32:39 obrien Exp $");
+__FBSDID("$FreeBSD: src/sys/amd64/amd64/identcpu.c,v 1.143 2006/01/01 05:35:57 netchild Exp $");
#include "opt_cpu.h"
@@ -69,6 +69,8 @@
static void print_AMD_info(void);
static void print_AMD_assoc(int i);
+void setPQL2(int *const size, int *const ways);
+static void setPQL2_AMD(int *const size, int *const ways);
int cpu_class;
char machine[] = "amd64";
@@ -93,6 +95,9 @@
{ "Sledgehammer", CPUCLASS_K8 }, /* CPU_SLEDGEHAMMER */
};
+extern int pq_l2size;
+extern int pq_l2nways;
+
void
printcpuinfo(void)
{
@@ -526,3 +531,30 @@
print_AMD_l2_assoc((regs[2] >> 12) & 0x0f);
}
}
+
+static void
+setPQL2_AMD(int *const size, int *const ways)
+{
+ if (cpu_exthigh >= 0x80000006) {
+ u_int regs[4];
+
+ do_cpuid(0x80000006, regs);
+ *size = regs[2] >> 16;
+ *ways = (regs[2] >> 12) & 0x0f;
+ switch (*ways) {
+ case 0: /* disabled/not present */
+ case 15: /* fully associative */
+ default: *ways = 1; break; /* reserved configuration */
+ case 4: *ways = 4; break;
+ case 6: *ways = 8; break;
+ case 8: *ways = 16; break;
+ }
+ }
+}
+
+void
+setPQL2(int *const size, int *const ways)
+{
+ if (strcmp(cpu_vendor, "AuthenticAMD") == 0)
+ setPQL2_AMD(size, ways);
+}
==== //depot/projects/netsmp/src/sys/arm/arm/identcpu.c#3 (text+ko) ====
@@ -42,7 +42,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/identcpu.c,v 1.5 2005/11/21 19:06:25 cognet Exp $");
+__FBSDID("$FreeBSD: src/sys/arm/arm/identcpu.c,v 1.6 2005/12/31 14:39:18 netchild Exp $");
#include <sys/systm.h>
#include <sys/param.h>
#include <sys/malloc.h>
@@ -298,6 +298,15 @@
"**unknown 15**",
};
+void setPQL2(int *const size, int *const ways);
+
+void
+setPQL2(int *const size, int *const ways)
+{
+ return;
+}
+
+
extern int ctrl;
void
identify_arm_cpu(void)
==== //depot/projects/netsmp/src/sys/conf/NOTES#6 (text+ko) ====
@@ -1,4 +1,4 @@
-# $FreeBSD: src/sys/conf/NOTES,v 1.1340 2005/12/29 02:12:54 jkoshy Exp $
+# $FreeBSD: src/sys/conf/NOTES,v 1.1341 2005/12/31 14:39:19 netchild Exp $
#
# NOTES -- Lines that can be cut/pasted into kernel and hints configs.
#
@@ -111,14 +111,8 @@
options BLKDEV_IOSIZE=8192
# Options for the VM subsystem
-# L2 cache size (in KB) can be specified in PQ_CACHESIZE
-options PQ_CACHESIZE=512 # color for 512k cache
# Deprecated options supported for backwards compatibility
#options PQ_NOOPT # No coloring
-#options PQ_LARGECACHE # color for 512k cache
-#options PQ_HUGECACHE # color for 1024k cache
-#options PQ_MEDIUMCACHE # color for 256k cache
-#options PQ_NORMALCACHE # color for 64k cache
# This allows you to actually store this configuration file into
# the kernel binary itself, where it may be later read by saying:
@@ -409,7 +403,7 @@
#
# RESTARTABLE_PANICS allows one to continue from a panic as if it were
-# a call to the debugger via the Debugger() function instead. It is only
+# a call to the debugger to continue from a panic as instead. It is only
# useful if a kernel debugger is present. To restart from a panic, reset
# the panicstr variable to NULL and continue execution. This option is
# for development use only and should NOT be used in production systems
==== //depot/projects/netsmp/src/sys/conf/options#6 (text+ko) ====
@@ -1,4 +1,4 @@
-# $FreeBSD: src/sys/conf/options,v 1.521 2005/12/12 10:15:11 ru Exp $
+# $FreeBSD: src/sys/conf/options,v 1.522 2005/12/31 14:39:19 netchild Exp $
#
# On the handling of kernel options
#
@@ -517,11 +517,6 @@
MALLOC_MAKE_FAILURES opt_vm.h
MALLOC_PROFILE opt_vm.h
PQ_NOOPT opt_vmpage.h
-PQ_NORMALCACHE opt_vmpage.h
-PQ_MEDIUMCACHE opt_vmpage.h
-PQ_LARGECACHE opt_vmpage.h
-PQ_HUGECACHE opt_vmpage.h
-PQ_CACHESIZE opt_vmpage.h
# The MemGuard replacement allocator used for tamper-after-free detection
DEBUG_MEMGUARD opt_vm.h
==== //depot/projects/netsmp/src/sys/dev/pccbb/pccbb.c#7 (text+ko) ====
@@ -75,7 +75,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/pccbb/pccbb.c,v 1.136 2005/12/29 23:38:45 imp Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/pccbb/pccbb.c,v 1.137 2005/12/31 20:04:39 imp Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -485,7 +485,7 @@
*/
mtx_lock(&Giant);
status = cbb_get(sc, CBB_SOCKET_STATE);
- DPRINTF(("Status is 0x%x %x\n", status, sc->bsh));
+ DPRINTF(("Status is 0x%x\n", status));
if (!CBB_CARD_PRESENT(status)) {
not_a_card = 0; /* We know card type */
cbb_removal(sc);
==== //depot/projects/netsmp/src/sys/dev/pci/pci.c#8 (text+ko) ====
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/pci/pci.c,v 1.307 2005/12/30 19:36:29 imp Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/pci/pci.c,v 1.308 2006/01/01 08:26:39 imp Exp $");
#include "opt_bus.h"
@@ -897,12 +897,8 @@
* read back. These maps have had all f's written to them by the
* BIOS in an attempt to disable the resources.
*/
- if (!force && (base == 0 || map == testval)) {
- if (bootverbose)
- printf("ignored rid %#x: base %#llx map %#x testval %#x\n",
- reg, base, map, testval);
+ if (!force && (base == 0 || map == testval))
return (barlen);
- }
/*
* This code theoretically does the right thing, but has
==== //depot/projects/netsmp/src/sys/i386/i386/identcpu.c#5 (text+ko) ====
@@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/i386/i386/identcpu.c,v 1.151 2005/12/05 14:22:11 ru Exp $");
+__FBSDID("$FreeBSD: src/sys/i386/i386/identcpu.c,v 1.152 2005/12/31 14:39:17 netchild Exp $");
#include "opt_cpu.h"
@@ -74,7 +74,13 @@
void panicifcpuunsupported(void);
static void identifycyrix(void);
+void setPQL2(int *const size, int *const ways);
+static void setPQL2_AMD(int *const size, int *const ways);
+static void setPQL2_INTEL(int *const size, int *const ways);
+static void get_INTEL_TLB(u_int data, int *const size, int *const ways);
static void print_AMD_info(void);
+static void print_INTEL_info(void);
+static void print_INTEL_TLB(u_int data);
static void print_AMD_assoc(int i);
static void print_transmeta_info(void);
@@ -873,6 +879,8 @@
if (strcmp(cpu_vendor, "AuthenticAMD") == 0)
print_AMD_info();
+ else if (strcmp(cpu_vendor, "GenuineIntel") == 0)
+ print_INTEL_info();
else if (strcmp(cpu_vendor, "GenuineTMx86") == 0 ||
strcmp(cpu_vendor, "TransmetaCPU") == 0)
print_transmeta_info();
@@ -1218,6 +1226,464 @@
}
static void
+print_INTEL_info(void)
+{
+ u_int regs[4];
+ u_int rounds, regnum;
+
+ do_cpuid(0x2, regs);
+
+ rounds = (regs[0] & 0xff) - 1;
+
+ for (regnum = 0; regnum <= 3; ++regnum) {
+ if ((regs[regnum] & (1<<31)) == 0) {
+ if (regnum != 0)
+ print_INTEL_TLB(regs[regnum] & 0xff);
+ print_INTEL_TLB((regs[regnum] >> 8) & 0xff);
+ print_INTEL_TLB((regs[regnum] >> 16) & 0xff);
+ print_INTEL_TLB((regs[regnum] >> 24) & 0xff);
+ }
+ }
+
+ while (rounds > 0) {
+ do_cpuid(0x2, regs);
+
+ for (regnum = 0; regnum <= 3; ++regnum) {
+ if ((regs[regnum] & (1<<31)) == 0) {
+ if (regnum != 0)
+ print_INTEL_TLB(regs[regnum] & 0xff);
+ print_INTEL_TLB((regs[regnum] >> 8) & 0xff);
+ print_INTEL_TLB((regs[regnum] >> 16) & 0xff);
+ print_INTEL_TLB((regs[regnum] >> 24) & 0xff);
+ }
+ }
+
+ --rounds;
+ }
+
+ if (cpu_exthigh >= 0x80000006) {
+ do_cpuid(0x80000006, regs);
+ printf("\nL2 cache: %u kbytes, %u-way associative, %u bytes/line",
+ regs[2] & 0xffff, (regs[2] >> 16) & 0xff, regs[2] >> 24);
+ }
+
+ printf("\n");
+}
+
+static void
+print_INTEL_TLB(u_int data)
+{
+ switch (data) {
+ case 0x0:
+ case 0x40:
+ default:
+ break;
+ case 0x1:
+ printf("\nInstruction TLB: 4-KBPages, 4-way set associative, 32 entries");
+ break;
+ case 0x2:
+ printf("\nInstruction TLB: 4-MB Pages, fully associative, 2 entries");
+ break;
+ case 0x3:
+ printf("\nData TLB: 4-KB Pages, 4-way set associative, 64 entries");
+ break;
+ case 0x4:
+ printf("\nData TLB: 4-MB Pages, 4-way set associative, 8 entries");
+ break;
+ case 0x6:
+ printf("\n1st-level instruction cache: 8-KB, 4-way set associative, 32-byte line size");
+ break;
+ case 0x8:
+ printf("\n1st-level instruction cache: 16-KB, 4-way set associative, 32-byte line size");
+ break;
+ case 0xa:
+ printf("\n1st-level data cache: 8-KB, 2-way set associative, 32-byte line size");
+ break;
+ case 0xc:
+ printf("\n1st-level data cache: 16-KB, 4-way set associative, 32-byte line size");
+ break;
+ case 0x22:
+ printf("\n3rd-level cache: 512 KB, 4-way set associative, sectored cache, 64-byte line size");
+ break;
+ case 0x23:
+ printf("\n3rd-level cache: 1-MB, 8-way set associative, sectored cache, 64-byte line size");
+ break;
+ case 0x25:
+ printf("\n3rd-level cache: 2-MB, 8-way set associative, sectored cache, 64-byte line size");
+ break;
+ case 0x29:
+ printf("\n3rd-level cache: 4-MB, 8-way set associative, sectored cache, 64-byte line size");
+ break;
+ case 0x2c:
+ printf("\n1st-level data cache: 32-KB, 8-way set associative, 64-byte line size");
+ break;
+ case 0x30:
+ printf("\n1st-level instruction cache: 32-KB, 8-way set associative, 64-byte line size");
+ break;
+ case 0x39:
+ printf("\n2nd-level cache: 128-KB, 4-way set associative, sectored cache, 64-byte line size");
+ break;
+ case 0x3b:
+ printf("\n2nd-level cache: 128-KB, 2-way set associative, sectored cache, 64-byte line size");
+ break;
+ case 0x3c:
+ printf("\n2nd-level cache: 256-KB, 4-way set associative, sectored cache, 64-byte line size");
+ break;
+ case 0x41:
+ printf("\n2nd-level cache: 128-KB, 4-way set associative, 32-byte line size");
+ break;
+ case 0x42:
+ printf("\n2nd-level cache: 256-KB, 4-way set associative, 32-byte line size");
+ break;
+ case 0x43:
+ printf("\n2nd-level cache: 512-KB, 4-way set associative, 32 byte line size");
+ break;
+ case 0x44:
+ printf("\n2nd-level cache: 1-MB, 4-way set associative, 32 byte line size");
+ break;
+ case 0x45:
+ printf("\n2nd-level cache: 2-MB, 4-way set associative, 32 byte line size");
+ break;
+ case 0x50:
+ printf("\nInstruction TLB: 4-KB, 2-MB or 4-MB pages, fully associative, 64 entries");
+ break;
+ case 0x51:
+ printf("\nInstruction TLB: 4-KB, 2-MB or 4-MB pages, fully associative, 128 entries");
+ break;
+ case 0x52:
+ printf("\nInstruction TLB: 4-KB, 2-MB or 4-MB pages, fully associative, 256 entries");
+ break;
+ case 0x5b:
+ printf("\nData TLB: 4-KB or 4-MB pages, fully associative, 64 entries");
+ break;
+ case 0x5c:
+ printf("\nData TLB: 4-KB or 4-MB pages, fully associative, 128 entries");
+ break;
+ case 0x5d:
+ printf("\nData TLB: 4-KB or 4-MB pages, fully associative, 256 entries");
+ break;
+ case 0x60:
+ printf("\n1st-level data cache: 16-KB, 8-way set associative, sectored cache, 64-byte line size");
+ break;
+ case 0x66:
+ printf("\n1st-level data cache: 8-KB, 4-way set associative, sectored cache, 64-byte line size");
+ break;
+ case 0x67:
+ printf("\n1st-level data cache: 16-KB, 4-way set associative, sectored cache, 64-byte line size");
+ break;
+ case 0x68:
+ printf("\n1st-level data cache: 32-KB, 4 way set associative, sectored cache, 64-byte line size");
+ break;
+ case 0x70:
+ printf("\nTrace cache: 12K-uops, 8-way set associative");
+ break;
+ case 0x71:
+ printf("\nTrace cache: 16K-uops, 8-way set associative");
+ break;
+ case 0x72:
+ printf("\nTrace cache: 32K-uops, 8-way set associative");
+ break;
+ case 0x79:
+ printf("\n2nd-level cache: 128-KB, 8-way set associative, sectored cache, 64-byte line size");
+ break;
+ case 0x7a:
+ printf("\n2nd-level cache: 256-KB, 8-way set associative, sectored cache, 64-byte line size");
+ break;
+ case 0x7b:
+ printf("\n2nd-level cache: 512-KB, 8-way set associative, sectored cache, 64-byte line size");
+ break;
+ case 0x7c:
+ printf("\n2nd-level cache: 1-MB, 8-way set associative, sectored cache, 64-byte line size");
+ break;
+ case 0x82:
+ printf("\n2nd-level cache: 256-KB, 8-way set associative, 32 byte line size");
+ break;
+ case 0x83:
+ printf("\n2nd-level cache: 512-KB, 8-way set associative, 32 byte line size");
+ break;
+ case 0x84:
+ printf("\n2nd-level cache: 1-MB, 8-way set associative, 32 byte line size");
+ break;
+ case 0x85:
+ printf("\n2nd-level cache: 2-MB, 8-way set associative, 32 byte line size");
+ break;
+ case 0x86:
+ printf("\n2nd-level cache: 512-KB, 4-way set associative, 64 byte line size");
+ break;
+ case 0x87:
+ printf("\n2nd-level cache: 1-MB, 8-way set associative, 64 byte line size");
+ break;
+ case 0xb0:
+ printf("\nInstruction TLB: 4-KB Pages, 4-way set associative, 128 entries");
+ break;
+ case 0xb3:
+ printf("\nData TLB: 4-KB Pages, 4-way set associative, 128 entries");
+ break;
+ }
+}
+
+
+static void
+setPQL2_AMD(int *const size, int *const ways) {
+ if (cpu_exthigh >= 0x80000006) {
+ u_int regs[4];
+
+ do_cpuid(0x80000006, regs);
+ *size = regs[2] >> 16;
+ *ways = (regs[2] >> 12) & 0x0f;
+ if(*ways == 255) /* fully associative */
+ *ways = 1;
+ }
+}
+
+
+static void
+setPQL2_INTEL(int *const size, int *const ways)
+{
+ u_int rounds, regnum;
+ u_int regs[4];
+
+ do_cpuid(0x2, regs);
+ rounds = (regs[0] & 0xff) - 1;
+
+ for (regnum = 0; regnum <= 3; ++regnum) {
+ if ((regs[regnum] & (1<<31)) == 0) {
+ if (regnum != 0)
+ get_INTEL_TLB(regs[regnum] & 0xff,
+ size, ways);
+ get_INTEL_TLB((regs[regnum] >> 8) & 0xff,
+ size, ways);
+ get_INTEL_TLB((regs[regnum] >> 16) & 0xff,
+ size, ways);
+ get_INTEL_TLB((regs[regnum] >> 24) & 0xff,
+ size, ways);
+ }
+ }
+
+ while (rounds > 0) {
+ do_cpuid(0x2, regs);
+
+ for (regnum = 0; regnum <= 3; ++regnum) {
+ if ((regs[regnum] & (1<<31)) == 0) {
+ if (regnum != 0)
+ get_INTEL_TLB(regs[regnum] & 0xff,
+ size, ways);
+ get_INTEL_TLB((regs[regnum] >> 8) & 0xff,
+ size, ways);
+ get_INTEL_TLB((regs[regnum] >> 16) & 0xff,
+ size, ways);
+ get_INTEL_TLB((regs[regnum] >> 24) & 0xff,
+ size, ways);
+ }
+ }
+
+ --rounds;
+ }
+
+ if (cpu_exthigh >= 0x80000006) {
+ do_cpuid(0x80000006, regs);
+ if (*size < (regs[2] & 0xffff)) {
+ *size = regs[2] & 0xffff;
+ *ways = (regs[2] >> 16) & 0xff;
+ }
+ }
+}
+
+static void
+get_INTEL_TLB(u_int data, int *const size, int *const ways)
+{
+ switch (data) {
+ default:
+ break;
+ case 0x22:
+ /* 3rd-level cache: 512 KB, 4-way set associative,
+ * sectored cache, 64-byte line size */
+ if (*size < 512) {
+ *size = 512;
+ *ways = 4;
+ }
+ break;
+ case 0x23:
+ /* 3rd-level cache: 1-MB, 8-way set associative,
+ * sectored cache, 64-byte line size */
+ if (*size < 1024) {
+ *size = 1024;
+ *ways = 8;
+ }
+ break;
+ case 0x25:
+ /* 3rd-level cache: 2-MB, 8-way set associative,
+ * sectored cache, 64-byte line size */
+ if (*size < 2048) {
+ *size = 2048;
+ *ways = 8;
+ }
+ break;
+ case 0x29:
+ /* 3rd-level cache: 4-MB, 8-way set associative,
+ * sectored cache, 64-byte line size */
+ if (*size < 4096) {
+ *size = 4096;
+ *ways = 8;
+ }
+ break;
+ case 0x39:
+ /* 2nd-level cache: 128-KB, 4-way set associative,
+ * sectored cache, 64-byte line size */
+ if (*size < 128) {
+ *size = 128;
+ *ways = 4;
+ }
+ break;
+ case 0x3b:
+ /* 2nd-level cache: 128-KB, 2-way set associative,
+ * sectored cache, 64-byte line size */
+ if (*size < 128) {
+ *size = 128;
+ *ways = 2;
+ }
+ break;
+ case 0x3c:
+ /* 2nd-level cache: 256-KB, 4-way set associative,
+ * sectored cache, 64-byte line size */
+ if (*size < 256) {
+ *size = 256;
+ *ways = 4;
+ }
+ break;
+ case 0x41:
+ /* 2nd-level cache: 128-KB, 4-way set associative,
+ * 32-byte line size */
+ if (*size < 128) {
+ *size = 128;
+ *ways = 4;
+ }
+ break;
+ case 0x42:
+ /* 2nd-level cache: 256-KB, 4-way set associative,
+ * 32-byte line size */
+ if (*size < 256) {
+ *size = 256;
+ *ways = 4;
+ }
+ break;
+ case 0x43:
+ /* 2nd-level cache: 512-KB, 4-way set associative,
+ * 32 byte line size */
+ if (*size < 512) {
+ *size = 512;
+ *ways = 4;
+ }
+ break;
+ case 0x44:
+ /* 2nd-level cache: 1-MB, 4-way set associative,
+ * 32 byte line size */
+ if (*size < 1024) {
+ *size = 1024;
+ *ways = 4;
+ }
+ break;
+ case 0x45:
+ /* 2nd-level cache: 2-MB, 4-way set associative,
+ * 32 byte line size */
+ if (*size < 2048) {
+ *size = 2048;
+ *ways = 4;
+ }
+ break;
+ case 0x79:
+ /* 2nd-level cache: 128-KB, 8-way set associative,
+ * sectored cache, 64-byte line size */
+ if (*size < 128) {
+ *size = 128;
+ *ways = 8;
+ }
+ break;
+ case 0x7a:
+ /* 2nd-level cache: 256-KB, 8-way set associative,
+ * sectored cache, 64-byte line size */
+ if (*size < 256) {
+ *size = 256;
+ *ways = 8;
+ }
+ break;
+ case 0x7b:
+ /* 2nd-level cache: 512-KB, 8-way set associative,
+ * sectored cache, 64-byte line size */
+ if (*size < 512) {
+ *size = 512;
+ *ways = 8;
+ }
+ break;
+ case 0x7c:
+ /* 2nd-level cache: 1-MB, 8-way set associative,
+ * sectored cache, 64-byte line size */
+ if (*size < 1024) {
+ *size = 1024;
+ *ways = 8;
+ }
+ break;
+ case 0x82:
+ /* 2nd-level cache: 256-KB, 8-way set associative,
+ * 32 byte line size */
+ if (*size < 128) {
+ *size = 128;
+ *ways = 8;
+ }
+ break;
+ case 0x83:
+ /* 2nd-level cache: 512-KB, 8-way set associative,
+ * 32 byte line size */
+ if (*size < 512) {
+ *size = 512;
+ *ways = 8;
+ }
+ break;
+ case 0x84:
+ /* 2nd-level cache: 1-MB, 8-way set associative,
+ * 32 byte line size */
+ if (*size < 1024) {
+ *size = 1024;
+ *ways = 8;
+ }
+ break;
+ case 0x85:
+ /* 2nd-level cache: 2-MB, 8-way set associative,
+ * 32 byte line size */
+ if (*size < 2048) {
+ *size = 2048;
+ *ways = 8;
+ }
+ break;
+ case 0x86:
+ /* 2nd-level cache: 512-KB, 4-way set associative,
+ * 64 byte line size */
+ if (*size < 512) {
+ *size = 512;
+ *ways = 4;
+ }
+ break;
+ case 0x87:
+ /* 2nd-level cache: 1-MB, 8-way set associative,
+ * 64 byte line size */
+ if (*size < 1024) {
+ *size = 512;
+ *ways = 8;
+ }
+ break;
+ }
+}
+
+void
+setPQL2(int *const size, int *const ways)
+{
+ if (strcmp(cpu_vendor, "AuthenticAMD") == 0)
+ setPQL2_AMD(size, ways);
+ else if (strcmp(cpu_vendor, "GenuineIntel") == 0)
+ setPQL2_INTEL(size, ways);
+}
+
+static void
print_transmeta_info()
{
u_int regs[4], nreg = 0;
==== //depot/projects/netsmp/src/sys/ia64/ia64/machdep.c#6 (text+ko) ====
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/machdep.c,v 1.204 2005/12/06 11:19:37 ru Exp $");
+__FBSDID("$FreeBSD: src/sys/ia64/ia64/machdep.c,v 1.205 2005/12/31 14:39:18 netchild Exp $");
#include "opt_compat.h"
#include "opt_ddb.h"
@@ -158,6 +158,14 @@
#define Mhz 1000000L
#define Ghz (1000L*Mhz)
+void setPQL2(int *const size, int *const ways);
+
+void
+setPQL2(int *const size, int *const ways)
+{
+ return;
+}
+
static void
identifycpu(void)
{
==== //depot/projects/netsmp/src/sys/kern/vfs_bio.c#7 (text+ko) ====
@@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/kern/vfs_bio.c,v 1.499 2005/12/07 03:39:07 rodrigc Exp $");
+__FBSDID("$FreeBSD: src/sys/kern/vfs_bio.c,v 1.500 2005/12/31 14:39:19 netchild Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -2863,9 +2863,9 @@
* page daemon?
*/
if ((curproc != pageproc) &&
- ((m->queue - m->pc) == PQ_CACHE) &&
+ (VM_PAGE_INQUEUE1(m, PQ_CACHE)) &&
((cnt.v_free_count + cnt.v_cache_count) <
- (cnt.v_free_min + cnt.v_cache_min))) {
+ (cnt.v_free_min + cnt.v_cache_min))) {
pagedaemon_wakeup();
}
vm_page_wire(m);
==== //depot/projects/netsmp/src/sys/powerpc/powerpc/machdep.c#5 (text+ko) ====
@@ -55,7 +55,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/powerpc/powerpc/machdep.c,v 1.92 2005/11/08 06:48:08 grehan Exp $");
+__FBSDID("$FreeBSD: src/sys/powerpc/powerpc/machdep.c,v 1.93 2005/12/31 14:39:18 netchild Exp $");
#include "opt_compat.h"
#include "opt_ddb.h"
@@ -170,6 +170,14 @@
struct kva_md_info kmi;
+void setPQL2(int *const size, int *const ways);
+
+void
+setPQL2(int *const size, int *const ways)
+{
+ return;
+}
+
static void
powerpc_ofw_shutdown(void *junk, int howto)
{
==== //depot/projects/netsmp/src/sys/sparc64/sparc64/identcpu.c#2 (text+ko) ====
@@ -6,7 +6,7 @@
* As long as the above copyright statement and this notice remain
* unchanged, you can do what ever you want with this file.
*
- * $FreeBSD: src/sys/sparc64/sparc64/identcpu.c,v 1.14 2005/01/07 02:29:23 imp Exp $
+ * $FreeBSD: src/sys/sparc64/sparc64/identcpu.c,v 1.15 2005/12/31 14:39:19 netchild Exp $
*/
#include <sys/param.h>
#include <sys/systm.h>
@@ -27,6 +27,14 @@
int cpu_impl;
+void setPQL2(int *const size, int *const ways);
+
+void
+setPQL2(int *const size, int *const ways)
+{
+ return;
+}
+
void
cpu_identify(u_long vers, u_int freq, u_int id)
{
==== //depot/projects/netsmp/src/sys/sys/copyright.h#2 (text+ko) ====
@@ -1,5 +1,5 @@
/*-
- * Copyright (C) 1992-2005 The FreeBSD Project. All rights reserved.
+ * Copyright (C) 1992-2006 The FreeBSD Project. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $FreeBSD: src/sys/sys/copyright.h,v 1.19 2005/01/07 02:29:23 imp Exp $
+ * $FreeBSD: src/sys/sys/copyright.h,v 1.21 2005/12/31 20:00:12 imp Exp $
*/
@@ -30,7 +30,7 @@
/* FreeBSD */
#define COPYRIGHT_FreeBSD \
- "Copyright (c) 1992-2005 The FreeBSD Project.\n"
+ "Copyright (c) 1992-2006 The FreeBSD Project.\n"
/* Berkeley */
#define COPYRIGHT_UCB \
@@ -38,11 +38,11 @@
/* a port of FreeBSD to the NEC PC98, Japan */
#define COPYRIGHT_PC98 \
- "Copyright (c) 1994-2005 FreeBSD(98) porting team.\nCopyright (c) 1992 A.Kojima F.Ukai M.Ishii (KMC).\n"
+ "Copyright (c) 1994-2006 FreeBSD(98) porting team.\nCopyright (c) 1992 A.Kojima F.Ukai M.Ishii (KMC).\n"
#if defined(PC98)
-char copyright[] = COPYRIGHT_FreeBSD/**/COPYRIGHT_PC98/**/COPYRIGHT_UCB;
+char copyright[] = COPYRIGHT_FreeBSD COPYRIGHT_PC98 COPYRIGHT_UCB;
#else
-char copyright[] = COPYRIGHT_FreeBSD/**/COPYRIGHT_UCB;
+char copyright[] = COPYRIGHT_FreeBSD COPYRIGHT_UCB;
#endif
==== //depot/projects/netsmp/src/sys/sys/param.h#9 (text+ko) ====
@@ -32,7 +32,7 @@
* SUCH DAMAGE.
*
* @(#)param.h 8.3 (Berkeley) 4/4/95
- * $FreeBSD: src/sys/sys/param.h,v 1.258 2005/12/20 22:44:35 jhb Exp $
+ * $FreeBSD: src/sys/sys/param.h,v 1.259 2005/12/31 11:26:54 trhodes Exp $
*/
#ifndef _SYS_PARAM_H_
@@ -57,7 +57,7 @@
* is created, otherwise 1.
*/
#undef __FreeBSD_version
-#define __FreeBSD_version 700010 /* Master, propagated to newvers */
+#define __FreeBSD_version 700011 /* Master, propagated to newvers */
#ifndef LOCORE
#include <sys/types.h>
==== //depot/projects/netsmp/src/sys/vm/vm_contig.c#3 (text+ko) ====
@@ -60,7 +60,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/vm/vm_contig.c,v 1.44 2005/08/12 18:17:40 tegge Exp $");
+__FBSDID("$FreeBSD: src/sys/vm/vm_contig.c,v 1.45 2005/12/31 14:39:20 netchild Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -141,7 +141,7 @@
if ((m->flags & PG_MARKER) != 0)
continue;
- KASSERT(m->queue == queue,
+ KASSERT(VM_PAGE_INQUEUE2(m, queue),
("vm_contig_launder: page %p's queue is not %d", m, queue));
error = vm_contig_launder_page(m);
if (error == 0)
@@ -255,7 +255,7 @@
for (i = start; i < (start + size / PAGE_SIZE); i++) {
vm_page_t m = &pga[i];
- if ((m->queue - m->pc) == PQ_CACHE) {
+ if (VM_PAGE_INQUEUE1(m, PQ_CACHE)) {
if (m->hold_count != 0) {
start++;
goto again0;
@@ -456,16 +456,15 @@
pqtype = m->queue - m->pc;
if (pass != 0 && pqtype != PQ_FREE &&
pqtype != PQ_CACHE) {
- switch (m->queue) {
- case PQ_ACTIVE:
- case PQ_INACTIVE:
+ if (m->queue == PQ_ACTIVE ||
+ m->queue == PQ_INACTIVE) {
if (vm_contig_launder_page(m) != 0)
goto cleanup_freed;
pqtype = m->queue - m->pc;
if (pqtype == PQ_FREE ||
pqtype == PQ_CACHE)
break;
- default:
+ } else {
cleanup_freed:
vm_page_release_contigl(&pga[i + 1],
start + npages - 1 - i);
==== //depot/projects/netsmp/src/sys/vm/vm_fault.c#4 (text+ko) ====
@@ -72,7 +72,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/vm/vm_fault.c,v 1.210 2005/12/20 12:27:59 tegge Exp $");
+__FBSDID("$FreeBSD: src/sys/vm/vm_fault.c,v 1.211 2005/12/31 14:39:20 netchild Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -410,7 +410,8 @@
vm_pageq_remove_nowakeup(fs.m);
- if ((queue - fs.m->pc) == PQ_CACHE && vm_page_count_severe()) {
+ if ((queue - fs.m->pc) == PQ_CACHE \
+ && vm_page_count_severe()) {
vm_page_activate(fs.m);
vm_page_unlock_queues();
unlock_and_deallocate(&fs);
@@ -1006,7 +1007,7 @@
(m->flags & (PG_BUSY | PG_FICTITIOUS)) == 0) {
vm_page_lock_queues();
- if ((m->queue - m->pc) == PQ_CACHE)
+ if (VM_PAGE_INQUEUE1(m, PQ_CACHE))
vm_page_deactivate(m);
mpte = pmap_enter_quick(pmap, addr, m,
entry->protection, mpte);
==== //depot/projects/netsmp/src/sys/vm/vm_object.c#5 (text+ko) ====
>>> TRUNCATED FOR MAIL (1000 lines) <<<
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