PERFORCE change 92034 for review

[Warner Losh]

http://perforce.freebsd.org/chv.cgi?CH=92034

Change 92034 by imp at imp_plunger on 2006/02/19 08:38:00

	Go ahead and allocate things for the pmc.

Affected files ...

.. //depot/projects/arm/src/sys/arm/at91/at91_pmc.c#7 edit

Differences ...

==== //depot/projects/arm/src/sys/arm/at91/at91_pmc.c#7 (text+ko) ====

@@ -42,12 +42,13 @@
 #include <machine/frame.h>
 #include <machine/intr.h>
 #include <arm/at91/at91rm92reg.h>
-#include <arm/at91/at91var.h>
+
 #include <arm/at91/at91_pmcreg.h>
 
 static struct at91_pmc_softc {
 	bus_space_tag_t		sc_st;
 	bus_space_handle_t	sc_sh;
+	struct resource	*mem_res;	/* Memory resource */
 	device_t		dev;
 	int			main_clock_hz;
 	uint32_t		pllb_init;
@@ -154,10 +155,17 @@
 	&ohci_clk
 };
 
-#define RD4(off) \
-	bus_space_read_4(pmc_softc->sc_st, pmc_softc->sc_sh, (off))
-#define WR4(off, val) \
-	bus_space_write_4(pmc_softc->sc_st, pmc_softc->sc_sh, (off), (val))
+static inline uint32_t
+RD4(struct at91_pmc_softc *sc, bus_size_t off)
+{
+	return bus_read_4(sc->mem_res, off);
+}
+
+static inline void
+WR4(struct at91_pmc_softc *sc, bus_size_t off, uint32_t val)
+{
+	bus_write_4(sc->mem_res, off, val);
+}
 
 static void
 at91_pmc_set_pllb_mode(struct at91_pmc_clock *clk, int on)
@@ -249,33 +257,65 @@
 	 */
         sc->pllb_init = at91_pmc_pll_calc(main_clock, 48000000 * 2) |0x10000000;
         pllb.hz = at91_pmc_pll_rate(main_clock, sc->pllb_init, 1);
-        WR4(PMC_PCDR, (1 << AT91RM92_IRQ_UHP) | (1 << AT91RM92_IRQ_UDP));
-        WR4(PMC_SCDR, PMC_SCER_UHP | PMC_SCER_UDP);
-        WR4(CKGR_PLLBR, 0);
-        WR4(PMC_SCER, PMC_SCER_MCKUDP);
+        WR4(sc, PMC_PCDR, (1 << AT91RM92_IRQ_UHP) | (1 << AT91RM92_IRQ_UDP));
+        WR4(sc, PMC_SCDR, PMC_SCER_UHP | PMC_SCER_UDP);
+        WR4(sc, CKGR_PLLBR, 0);
+        WR4(sc, PMC_SCER, PMC_SCER_MCKUDP);
 
 	/*
 	 * MCK and PCU derive from one of the primary clocks.  Initialize
 	 * this relationship.
 	 */
-	mckr = RD4(PMC_MCKR);
+	mckr = RD4(sc, PMC_MCKR);
 	mck.parent = clock_list[mckr & 0x3];
 	mck.parent->refcnt++;
 	freq = mck.parent->hz;
 	freq /= 1 << ((mckr >> 2) & 3);
 	mck.hz = freq / (1 + ((mckr >> 8) & 3));
 
-	printf("Main clock is %x\n", RD4(PMC_MCKR));
+	printf("Main clock is %x\n", RD4(sc, PMC_MCKR));
 
 	device_printf(sc->dev, "main clock = %d Hz PLLA = %d Hz CPU %d Hz main %d Hz\n",
 	    sc->main_clock_hz,
-	    at91_pmc_pll_rate(main_clock, RD4(CKGR_PLLAR), 0),
+	    at91_pmc_pll_rate(main_clock, RD4(sc, CKGR_PLLAR), 0),
 	    freq, mck.hz);
-	WR4(PMC_SCDR, PMC_SCER_PCK0 | PMC_SCER_PCK1 | PMC_SCER_PCK2 |
+	WR4(sc, PMC_SCDR, PMC_SCER_PCK0 | PMC_SCER_PCK1 | PMC_SCER_PCK2 |
 	    PMC_SCER_PCK3);
 }
 
+static void
+at91_pmc_deactivate(device_t dev)
+{
+	struct at91_pmc_softc *sc;
+
+	sc = device_get_softc(dev);
+	bus_generic_detach(sc->dev);
+	if (sc->mem_res)
+		bus_release_resource(dev, SYS_RES_IOPORT,
+		    rman_get_rid(sc->mem_res), sc->mem_res);
+	sc->mem_res = 0;
+	return;
+}
+
 static int
+at91_pmc_activate(device_t dev)
+{
+	struct at91_pmc_softc *sc;
+	int rid;
+
+	sc = device_get_softc(dev);
+	rid = 0;
+	sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
+	    RF_ACTIVE);
+	if (sc->mem_res == NULL)
+		goto errout;
+	return (0);
+errout:
+	at91_pmc_deactivate(dev);
+	return (ENOMEM);
+}
+
+static int
 at91_pmc_probe(device_t dev)
 {
 
@@ -286,14 +326,12 @@
 static int
 at91_pmc_attach(device_t dev)
 {
-	struct at91_softc *sc = device_get_softc(device_get_parent(dev));
+	int err;
 
 	pmc_softc = device_get_softc(dev);
-	pmc_softc->sc_st = sc->sc_st;
 	pmc_softc->dev = dev;
-	if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91RM92_PMC_BASE,
-	    AT91RM92_PMC_SIZE, &pmc_softc->sc_sh) != 0)
-		panic("couldn't subregion timer registers");
+	if ((err = at91_pmc_activate(dev)) != 0)
+		return err;
 	at91_pmc_init_clock(pmc_softc, 10000000);
 
 	return (0);