PERFORCE change 74207 for review
John Baldwin
jhb at FreeBSD.org
Thu Mar 31 12:46:10 PST 2005
http://perforce.freebsd.org/chv.cgi?CH=74207
Change 74207 by jhb at jhb_slimer on 2005/03/31 20:45:40
Finish undoing memory clobber dinking on other archs.
Affected files ...
.. //depot/projects/smpng/sys/ia64/include/atomic.h#8 edit
.. //depot/projects/smpng/sys/powerpc/include/atomic.h#11 edit
.. //depot/projects/smpng/sys/sparc64/include/atomic.h#11 edit
Differences ...
==== //depot/projects/smpng/sys/ia64/include/atomic.h#8 (text+ko) ====
@@ -37,13 +37,13 @@
/*
* Everything is built out of cmpxchg.
*/
-#define IA64_CMPXCHG(sz, sem, p, cmpval, newval, ret, clobber) \
+#define IA64_CMPXCHG(sz, sem, p, cmpval, newval, ret) \
__asm __volatile ( \
"mov ar.ccv=%2;;\n\t" \
"cmpxchg" #sz "." #sem " %0=%4,%3,ar.ccv\n\t" \
: "=r" (ret), "=m" (*p) \
: "r" (cmpval), "r" (newval), "m" (*p) \
- : clobber)
+ : "memory")
/*
* Some common forms of cmpxch.
@@ -52,7 +52,7 @@
ia64_cmpxchg_acq_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
{
uint32_t ret;
- IA64_CMPXCHG(4, acq, p, cmpval, newval, ret, "memory");
+ IA64_CMPXCHG(4, acq, p, cmpval, newval, ret);
return (ret);
}
@@ -60,7 +60,7 @@
ia64_cmpxchg_rel_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
{
uint32_t ret;
- IA64_CMPXCHG(4, rel, p, cmpval, newval, ret, "");
+ IA64_CMPXCHG(4, rel, p, cmpval, newval, ret);
return (ret);
}
@@ -68,7 +68,7 @@
ia64_cmpxchg_acq_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval)
{
uint64_t ret;
- IA64_CMPXCHG(8, acq, p, cmpval, newval, ret, "memory");
+ IA64_CMPXCHG(8, acq, p, cmpval, newval, ret);
return (ret);
}
@@ -76,7 +76,7 @@
ia64_cmpxchg_rel_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval)
{
uint64_t ret;
- IA64_CMPXCHG(8, rel, p, cmpval, newval, ret, "");
+ IA64_CMPXCHG(8, rel, p, cmpval, newval, ret);
return (ret);
}
@@ -112,7 +112,7 @@
ia64_st_rel_##width(volatile uint##width##_t* p, uint##width##_t v) \
{ \
__asm __volatile ("st" size ".rel %0=%1" : "=m" (*p) \
- : "r" (v)); \
+ : "r" (v) : "memory"); \
} \
\
static __inline void \
@@ -120,7 +120,7 @@
uint##width##_t v) \
{ \
__asm __volatile ("st" size ".rel %0=%1" : "=m" (*p) \
- : "r" (v)); \
+ : "r" (v) : "memory"); \
} \
\
static __inline void \
@@ -128,7 +128,7 @@
uint##width##_t v) \
{ \
__asm __volatile ("st" size ".rel %0=%1" : "=m" (*p) \
- : "r" (v)); \
+ : "r" (v) : "memory"); \
}
ATOMIC_STORE_LOAD(char, 8, "1")
@@ -148,7 +148,7 @@
type old, ret; \
do { \
old = *p; \
- IA64_CMPXCHG(sz, acq, p, old, old op v, ret, "memory");\
+ IA64_CMPXCHG(sz, acq, p, old, old op v, ret); \
} while (ret != old); \
return (old); \
} \
@@ -159,7 +159,7 @@
type old, ret; \
do { \
old = *p; \
- IA64_CMPXCHG(sz, rel, p, old, old op v, ret, "");\
+ IA64_CMPXCHG(sz, rel, p, old, old op v, ret); \
} while (ret != old); \
return (old); \
}
==== //depot/projects/smpng/sys/powerpc/include/atomic.h#11 (text+ko) ====
@@ -65,7 +65,7 @@
"bne- 1b\n\t" /* spin if failed */
: "=&r" (temp), "=m" (*p)
: "r" (p), "r" (v), "m" (*p)
- : "cc");
+ : "cc", "memory");
#endif
}
@@ -82,7 +82,7 @@
"bne- 1b\n\t" /* spin if failed */
: "=&r" (temp), "=m" (*p)
: "r" (p), "r" (v), "m" (*p)
- : "cc");
+ : "cc", "memory");
#endif
}
@@ -99,7 +99,7 @@
"bne- 1b\n\t" /* spin if failed */
: "=&r" (temp), "=m" (*p)
: "r" (p), "r" (v), "m" (*p)
- : "cc");
+ : "cc", "memory");
#endif
}
@@ -116,7 +116,7 @@
"bne- 1b\n\t" /* spin if failed */
: "=&r" (temp), "=m" (*p)
: "r" (p), "r" (v), "m" (*p)
- : "cc");
+ : "cc", "memory");
#endif
}
@@ -134,7 +134,7 @@
"bne- 1b\n\t" /* spin if failed */
: "=&r"(result), "=&r"(temp), "=m" (*addr)
: "r" (addr), "m" (*p)
- : "cc");
+ : "cc", "memory");
#endif
return (result);
@@ -253,7 +253,6 @@
{ \
atomic_##NAME##_##WIDTH(p, v); \
powerpc_mb(); \
- __asm __volatile("" ::: "memory"); \
} \
\
static __inline void \
@@ -268,7 +267,6 @@
{ \
atomic_##NAME##_##WIDTH(p, v); \
powerpc_mb(); \
- __asm __volatile("" ::: "memory"); \
} \
\
static __inline void \
@@ -322,7 +320,6 @@
\
v = *p; \
powerpc_mb(); \
- __asm __volatile("" ::: "memory"); \
return (v); \
} \
\
@@ -387,7 +384,7 @@
"3:\n\t"
: "=&r" (ret), "=m" (*p)
: "r" (p), "r" (cmpval), "r" (newval), "m" (*p)
- : "cc");
+ : "cc", "memory");
#endif
return (ret);
@@ -430,7 +427,6 @@
retval = atomic_cmpset_32(p, cmpval, newval);
powerpc_mb();
- __asm __volatile("" ::: "memory");
return (retval);
}
==== //depot/projects/smpng/sys/sparc64/include/atomic.h#11 (text+ko) ====
@@ -90,7 +90,6 @@
itype(sz) v; \
v = atomic_cas(p, e, s, sz); \
membar(LoadLoad | LoadStore); \
- __asm __volatile("" : : : "memory"); \
v; \
})
@@ -116,7 +115,6 @@
itype(sz) t; \
t = atomic_op(p, op, v, sz); \
membar(LoadLoad | LoadStore); \
- __asm __volatile("" : : : "memory"); \
t; \
})
@@ -134,7 +132,6 @@
itype(sz) v; \
v = atomic_load(p, sz); \
membar(LoadLoad | LoadStore); \
- __asm __volatile("" : : : "memory"); \
v; \
})
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