PERFORCE change 88855 for review
Warner Losh
imp at FreeBSD.org
Wed Dec 28 16:38:00 PST 2005
http://perforce.freebsd.org/chv.cgi?CH=88855
Change 88855 by imp at imp_harmony on 2005/12/29 00:37:53
IFC @88854
Affected files ...
.. //depot/projects/arm/src/sys/alpha/alpha/elf_machdep.c#3 integrate
.. //depot/projects/arm/src/sys/alpha/linux/linux_sysvec.c#4 integrate
.. //depot/projects/arm/src/sys/amd64/amd64/db_trace.c#5 integrate
.. //depot/projects/arm/src/sys/amd64/amd64/elf_machdep.c#4 integrate
.. //depot/projects/arm/src/sys/amd64/linux32/linux32_sysvec.c#4 integrate
.. //depot/projects/arm/src/sys/arm/arm/elf_machdep.c#2 integrate
.. //depot/projects/arm/src/sys/compat/ia32/ia32_sysvec.c#3 integrate
.. //depot/projects/arm/src/sys/compat/linux/linux_misc.c#4 integrate
.. //depot/projects/arm/src/sys/compat/linux/linux_socket.c#5 integrate
.. //depot/projects/arm/src/sys/contrib/pf/net/pf.c#5 integrate
.. //depot/projects/arm/src/sys/contrib/pf/net/pf_norm.c#4 integrate
.. //depot/projects/arm/src/sys/contrib/pf/net/pfvar.h#4 integrate
.. //depot/projects/arm/src/sys/dev/aac/aac.c#3 integrate
.. //depot/projects/arm/src/sys/dev/acpica/Osd/OsdSynch.c#3 integrate
.. //depot/projects/arm/src/sys/dev/ata/ata-all.h#5 integrate
.. //depot/projects/arm/src/sys/dev/ata/ata-chipset.c#6 integrate
.. //depot/projects/arm/src/sys/dev/ata/ata-pci.c#3 integrate
.. //depot/projects/arm/src/sys/dev/ata/ata-pci.h#5 integrate
.. //depot/projects/arm/src/sys/dev/ata/ata-queue.c#4 integrate
.. //depot/projects/arm/src/sys/dev/ata/ata-raid.c#6 integrate
.. //depot/projects/arm/src/sys/dev/cardbus/cardbus.c#5 integrate
.. //depot/projects/arm/src/sys/dev/dc/if_dc.c#4 integrate
.. //depot/projects/arm/src/sys/dev/em/if_em.c#10 integrate
.. //depot/projects/arm/src/sys/dev/firewire/sbp.c#2 integrate
.. //depot/projects/arm/src/sys/dev/hwpmc/hwpmc_mod.c#3 integrate
.. //depot/projects/arm/src/sys/dev/hwpmc/hwpmc_piv.c#3 integrate
.. //depot/projects/arm/src/sys/dev/md/md.c#3 integrate
.. //depot/projects/arm/src/sys/dev/pccard/pccard.c#3 integrate
.. //depot/projects/arm/src/sys/dev/pccbb/pccbb.c#3 integrate
.. //depot/projects/arm/src/sys/dev/pccbb/pccbbreg.h#3 integrate
.. //depot/projects/arm/src/sys/dev/sound/pci/atiixp.c#2 integrate
.. //depot/projects/arm/src/sys/dev/sound/pci/emu10k1.c#3 integrate
.. //depot/projects/arm/src/sys/dev/ti/if_ti.c#3 integrate
.. //depot/projects/arm/src/sys/dev/ti/if_tireg.h#3 integrate
.. //depot/projects/arm/src/sys/dev/usb/uhid.c#2 integrate
.. //depot/projects/arm/src/sys/dev/usb/usb_quirks.c#4 integrate
.. //depot/projects/arm/src/sys/dev/usb/usb_quirks.h#3 integrate
.. //depot/projects/arm/src/sys/dev/usb/usbdevs#6 integrate
.. //depot/projects/arm/src/sys/fs/procfs/procfs_status.c#3 integrate
.. //depot/projects/arm/src/sys/i386/i386/elf_machdep.c#2 integrate
.. //depot/projects/arm/src/sys/i386/i386/genassym.c#3 integrate
.. //depot/projects/arm/src/sys/i386/i386/machdep.c#6 integrate
.. //depot/projects/arm/src/sys/i386/i386/swtch.s#3 integrate
.. //depot/projects/arm/src/sys/i386/i386/sys_machdep.c#3 integrate
.. //depot/projects/arm/src/sys/i386/include/pcpu.h#4 integrate
.. //depot/projects/arm/src/sys/i386/linux/linux_sysvec.c#4 integrate
.. //depot/projects/arm/src/sys/ia64/ia64/elf_machdep.c#4 integrate
.. //depot/projects/arm/src/sys/kern/imgact_elf.c#5 integrate
.. //depot/projects/arm/src/sys/kern/kern_malloc.c#3 integrate
.. //depot/projects/arm/src/sys/kern/kern_switch.c#4 integrate
.. //depot/projects/arm/src/sys/kern/sched_ule.c#5 integrate
.. //depot/projects/arm/src/sys/net/if_media.c#2 integrate
.. //depot/projects/arm/src/sys/netatm/atm_sys.h#2 integrate
.. //depot/projects/arm/src/sys/netgraph/netflow/ng_netflow.c#3 integrate
.. //depot/projects/arm/src/sys/nfsclient/nfs_vnops.c#6 integrate
.. //depot/projects/arm/src/sys/pc98/pc98/machdep.c#3 integrate
.. //depot/projects/arm/src/sys/powerpc/powerpc/elf_machdep.c#2 integrate
.. //depot/projects/arm/src/sys/sparc64/conf/GENERIC#8 integrate
.. //depot/projects/arm/src/sys/sparc64/sparc64/elf_machdep.c#3 integrate
.. //depot/projects/arm/src/sys/sys/_timeval.h#2 integrate
.. //depot/projects/arm/src/sys/sys/imgact_elf.h#3 integrate
.. //depot/projects/arm/src/sys/sys/ktrace.h#3 integrate
Differences ...
==== //depot/projects/arm/src/sys/alpha/alpha/elf_machdep.c#3 (text+ko) ====
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/alpha/alpha/elf_machdep.c,v 1.20 2005/12/18 04:52:34 marcel Exp $");
+__FBSDID("$FreeBSD: src/sys/alpha/alpha/elf_machdep.c,v 1.21 2005/12/26 21:23:56 sobomax Exp $");
#include <sys/param.h>
#include <sys/kernel.h>
@@ -85,6 +85,7 @@
"/libexec/ld-elf.so.1",
&elf64_freebsd_sysvec,
NULL,
+ 0,
};
SYSINIT(elf64, SI_SUB_EXEC, SI_ORDER_ANY,
@@ -99,6 +100,7 @@
"/usr/libexec/ld-elf.so.1",
&elf64_freebsd_sysvec,
NULL,
+ 0,
};
SYSINIT(oelf64, SI_SUB_EXEC, SI_ORDER_ANY,
==== //depot/projects/arm/src/sys/alpha/linux/linux_sysvec.c#4 (text+ko) ====
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/alpha/linux/linux_sysvec.c,v 1.97 2005/12/15 16:30:41 jhb Exp $");
+__FBSDID("$FreeBSD: src/sys/alpha/linux/linux_sysvec.c,v 1.98 2005/12/26 21:23:56 sobomax Exp $");
/* XXX we use functions that might not exist. */
#include "opt_compat.h"
@@ -208,6 +208,7 @@
"/lib/ld-linux.so.1",
&elf_linux_sysvec,
NULL,
+ BI_CAN_EXEC_DYN,
};
static Elf64_Brandinfo linux_glibc2brand = {
@@ -218,6 +219,7 @@
"/lib/ld-linux.so.2",
&elf_linux_sysvec,
NULL,
+ BI_CAN_EXEC_DYN,
};
Elf64_Brandinfo *linux_brandlist[] = {
==== //depot/projects/arm/src/sys/amd64/amd64/db_trace.c#5 (text+ko) ====
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/amd64/amd64/db_trace.c,v 1.72 2005/12/23 21:33:55 jeff Exp $");
+__FBSDID("$FreeBSD: src/sys/amd64/amd64/db_trace.c,v 1.73 2005/12/27 23:23:47 pjd Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -199,8 +199,8 @@
static void decode_syscall(int, struct thread *);
static char * watchtype_str(int type);
-int amd64_set_watch(int watchnum, unsigned int watchaddr, int size, int access,
- struct dbreg * d);
+int amd64_set_watch(int watchnum, unsigned long watchaddr, int size,
+ int access, struct dbreg * d);
int amd64_clr_watch(int watchnum, struct dbreg * d);
/*
@@ -526,7 +526,7 @@
int
amd64_set_watch(watchnum, watchaddr, size, access, d)
int watchnum;
- unsigned int watchaddr;
+ unsigned long watchaddr;
int size;
int access;
struct dbreg * d;
==== //depot/projects/arm/src/sys/amd64/amd64/elf_machdep.c#4 (text+ko) ====
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/amd64/amd64/elf_machdep.c,v 1.24 2005/12/18 04:52:35 marcel Exp $");
+__FBSDID("$FreeBSD: src/sys/amd64/amd64/elf_machdep.c,v 1.25 2005/12/26 21:23:56 sobomax Exp $");
#include <sys/param.h>
#include <sys/kernel.h>
@@ -82,6 +82,7 @@
"/libexec/ld-elf.so.1",
&elf64_freebsd_sysvec,
NULL,
+ 0,
};
SYSINIT(elf64, SI_SUB_EXEC, SI_ORDER_ANY,
@@ -96,6 +97,7 @@
"/usr/libexec/ld-elf.so.1",
&elf64_freebsd_sysvec,
NULL,
+ 0,
};
SYSINIT(oelf64, SI_SUB_EXEC, SI_ORDER_ANY,
==== //depot/projects/arm/src/sys/amd64/linux32/linux32_sysvec.c#4 (text+ko) ====
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/amd64/linux32/linux32_sysvec.c,v 1.13 2005/12/15 16:30:41 jhb Exp $");
+__FBSDID("$FreeBSD: src/sys/amd64/linux32/linux32_sysvec.c,v 1.14 2005/12/26 21:23:57 sobomax Exp $");
/* XXX we use functions that might not exist. */
#include "opt_compat.h"
@@ -1026,6 +1026,7 @@
"/lib/ld-linux.so.1",
&elf_linux_sysvec,
NULL,
+ BI_CAN_EXEC_DYN,
};
static Elf32_Brandinfo linux_glibc2brand = {
@@ -1036,6 +1037,7 @@
"/lib/ld-linux.so.2",
&elf_linux_sysvec,
NULL,
+ BI_CAN_EXEC_DYN,
};
Elf32_Brandinfo *linux_brandlist[] = {
==== //depot/projects/arm/src/sys/arm/arm/elf_machdep.c#2 (text+ko) ====
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/elf_machdep.c,v 1.5 2004/11/04 18:48:52 cognet Exp $");
+__FBSDID("$FreeBSD: src/sys/arm/arm/elf_machdep.c,v 1.6 2005/12/26 21:23:56 sobomax Exp $");
#include <sys/param.h>
#include <sys/kernel.h>
@@ -82,6 +82,7 @@
"/libexec/ld-elf.so.1",
&elf32_freebsd_sysvec,
NULL,
+ 0,
};
SYSINIT(elf32, SI_SUB_EXEC, SI_ORDER_ANY,
@@ -96,6 +97,7 @@
"/usr/libexec/ld-elf.so.1",
&elf32_freebsd_sysvec,
NULL,
+ 0,
};
SYSINIT(oelf32, SI_SUB_EXEC, SI_ORDER_ANY,
==== //depot/projects/arm/src/sys/compat/ia32/ia32_sysvec.c#3 (text+ko) ====
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/compat/ia32/ia32_sysvec.c,v 1.21 2005/11/02 21:18:07 ps Exp $");
+__FBSDID("$FreeBSD: src/sys/compat/ia32/ia32_sysvec.c,v 1.22 2005/12/26 21:23:56 sobomax Exp $");
#include "opt_compat.h"
@@ -137,6 +137,7 @@
"/libexec/ld-elf.so.1",
&ia32_freebsd_sysvec,
"/libexec/ld-elf32.so.1",
+ 0,
};
SYSINIT(ia32, SI_SUB_EXEC, SI_ORDER_ANY,
@@ -151,6 +152,7 @@
"/usr/libexec/ld-elf.so.1",
&ia32_freebsd_sysvec,
"/libexec/ld-elf32.so.1",
+ 0,
};
SYSINIT(oia32, SI_SUB_EXEC, SI_ORDER_ANY,
==== //depot/projects/arm/src/sys/compat/linux/linux_misc.c#4 (text+ko) ====
@@ -28,7 +28,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/compat/linux/linux_misc.c,v 1.171 2005/10/14 12:43:44 davidxu Exp $");
+__FBSDID("$FreeBSD: src/sys/compat/linux/linux_misc.c,v 1.172 2005/12/28 07:08:54 trhodes Exp $");
#include "opt_mac.h"
@@ -501,8 +501,8 @@
utv.tv_usec = ltv.tv_usec;
#ifdef DEBUG
if (ldebug(select))
- printf(LMSG("incoming timeout (%ld/%ld)"),
- utv.tv_sec, utv.tv_usec);
+ printf(LMSG("incoming timeout (%jd/%ld)"),
+ (intmax_t)utv.tv_sec, utv.tv_usec);
#endif
if (itimerfix(&utv)) {
@@ -558,8 +558,8 @@
timevalclear(&utv);
#ifdef DEBUG
if (ldebug(select))
- printf(LMSG("outgoing timeout (%ld/%ld)"),
- utv.tv_sec, utv.tv_usec);
+ printf(LMSG("outgoing timeout (%jd/%ld)"),
+ (intmax_t)utv.tv_sec, utv.tv_usec);
#endif
ltv.tv_sec = utv.tv_sec;
ltv.tv_usec = utv.tv_usec;
@@ -958,10 +958,10 @@
B2L_ITIMERVAL(&aitv, &ls);
#ifdef DEBUG
if (ldebug(setitimer)) {
- printf("setitimer: value: sec: %ld, usec: %ld\n",
- aitv.it_value.tv_sec, aitv.it_value.tv_usec);
- printf("setitimer: interval: sec: %ld, usec: %ld\n",
- aitv.it_interval.tv_sec, aitv.it_interval.tv_usec);
+ printf("setitimer: value: sec: %jd, usec: %ld\n",
+ (intmax_t)aitv.it_value.tv_sec, aitv.it_value.tv_usec);
+ printf("setitimer: interval: sec: %jd, usec: %ld\n",
+ (intmax_t)aitv.it_interval.tv_sec, aitv.it_interval.tv_usec);
}
#endif
error = kern_setitimer(td, uap->which, &aitv, &oitv);
==== //depot/projects/arm/src/sys/compat/linux/linux_socket.c#5 (text+ko) ====
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/compat/linux/linux_socket.c,v 1.61 2005/09/28 07:03:02 rwatson Exp $");
+__FBSDID("$FreeBSD: src/sys/compat/linux/linux_socket.c,v 1.62 2005/12/27 00:17:11 glebius Exp $");
/* XXX we use functions that might not exist. */
#include "opt_compat.h"
@@ -154,7 +154,7 @@
sin6->sin6_scope_id = 0;
} else {
log(LOG_DEBUG,
- "obsolete pre-RFC2553 sockaddr_in6 rejected");
+ "obsolete pre-RFC2553 sockaddr_in6 rejected\n");
error = EINVAL;
goto out;
}
==== //depot/projects/arm/src/sys/contrib/pf/net/pf.c#5 (text+ko) ====
@@ -1,4 +1,4 @@
-/* $FreeBSD: src/sys/contrib/pf/net/pf.c,v 1.39 2005/12/20 00:33:33 mlaier Exp $ */
+/* $FreeBSD: src/sys/contrib/pf/net/pf.c,v 1.40 2005/12/25 23:52:00 mlaier Exp $ */
/* $OpenBSD: pf.c,v 1.483 2005/03/15 17:38:43 dhartmei Exp $ */
/*
@@ -742,6 +742,9 @@
int bad = 0;
(*state)->src_node->conn++;
+#ifdef __FreeBSD__
+ (*state)->local_flags |= PFSTATE_SRC_CONN;
+#endif
pf_add_threshold(&(*state)->src_node->conn_rate);
if ((*state)->rule.ptr->max_src_conn &&
@@ -1074,8 +1077,12 @@
if (s->src_node != NULL) {
if (s->proto == IPPROTO_TCP) {
+#ifdef __FreeBSD__
+ if (s->local_flags & PFSTATE_SRC_CONN)
+#else
if (s->src.state == PF_TCPS_PROXY_DST ||
s->timeout >= PFTM_TCP_ESTABLISHED)
+#endif
--s->src_node->conn;
}
if (--s->src_node->states <= 0) {
==== //depot/projects/arm/src/sys/contrib/pf/net/pf_norm.c#4 (text+ko) ====
@@ -1,4 +1,4 @@
-/* $FreeBSD: src/sys/contrib/pf/net/pf_norm.c,v 1.13 2005/12/05 11:58:31 ru Exp $ */
+/* $FreeBSD: src/sys/contrib/pf/net/pf_norm.c,v 1.14 2005/12/25 22:57:08 mlaier Exp $ */
/* $OpenBSD: pf_norm.c,v 1.97 2004/09/21 16:59:12 aaron Exp $ */
/*
@@ -75,6 +75,8 @@
#include <net/pfvar.h>
#ifndef __FreeBSD__
+#include <inttypes.h>
+
struct pf_frent {
LIST_ENTRY(pf_frent) fr_next;
struct ip *fr_ip;
@@ -1815,8 +1817,9 @@
SEQ_LT(tsecr, dst->scrub->pfss_tsval0)? '3' : ' '));
#ifdef __FreeBSD__
DPFPRINTF((" tsval: %u tsecr: %u +ticks: %u "
- "idle: %lus %lums\n",
- tsval, tsecr, tsval_from_last, delta_ts.tv_sec,
+ "idle: %jus %lums\n",
+ tsval, tsecr, tsval_from_last,
+ (uintmax_t)delta_ts.tv_sec,
delta_ts.tv_usec / 1000));
DPFPRINTF((" src->tsval: %u tsecr: %u\n",
src->scrub->pfss_tsval, src->scrub->pfss_tsecr));
==== //depot/projects/arm/src/sys/contrib/pf/net/pfvar.h#4 (text+ko) ====
@@ -1,4 +1,4 @@
-/* $FreeBSD: src/sys/contrib/pf/net/pfvar.h,v 1.13 2005/12/20 00:33:33 mlaier Exp $ */
+/* $FreeBSD: src/sys/contrib/pf/net/pfvar.h,v 1.14 2005/12/25 23:52:00 mlaier Exp $ */
/* $OpenBSD: pfvar.h,v 1.213 2005/03/03 07:13:39 dhartmei Exp $ */
/*
@@ -793,6 +793,7 @@
#ifdef __FreeBSD__
u_int8_t local_flags;
#define PFSTATE_EXPIRING 0x01
+#define PFSTATE_SRC_CONN 0x02
#else
u_int8_t pad;
#endif
==== //depot/projects/arm/src/sys/dev/aac/aac.c#3 (text+ko) ====
@@ -28,7 +28,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/aac/aac.c,v 1.116 2005/11/13 17:26:36 schweikh Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/aac/aac.c,v 1.117 2005/12/28 21:18:55 scottl Exp $");
/*
* Driver for the Adaptec 'FSA' family of PCI/SCSI RAID adapters.
@@ -281,6 +281,7 @@
mtx_init(&sc->aac_io_lock, "AAC I/O lock", NULL, MTX_DEF);
mtx_init(&sc->aac_container_lock, "AAC container lock", NULL, MTX_DEF);
TAILQ_INIT(&sc->aac_container_tqh);
+ TAILQ_INIT(&sc->aac_ev_cmfree);
/* Initialize the local AIF queue pointers */
sc->aac_aifq_head = sc->aac_aifq_tail = AAC_AIFQ_LENGTH;
==== //depot/projects/arm/src/sys/dev/acpica/Osd/OsdSynch.c#3 (text+ko) ====
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/acpica/Osd/OsdSynch.c,v 1.25 2005/11/01 22:44:07 jkim Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/acpica/Osd/OsdSynch.c,v 1.26 2005/12/24 22:22:17 trhodes Exp $");
#include <contrib/dev/acpica/acpi.h>
@@ -257,8 +257,8 @@
tmo = 1;
if (acpi_semaphore_debug) {
- printf("%s: Wakeup timeleft(%lu, %lu), tmo %u, sem %p, thread %d\n",
- __func__, timelefttv.tv_sec, timelefttv.tv_usec, tmo, as,
+ printf("%s: Wakeup timeleft(%jd, %lu), tmo %u, sem %p, thread %d\n",
+ __func__, (intmax_t)timelefttv.tv_sec, timelefttv.tv_usec, tmo, as,
AcpiOsGetThreadId());
}
}
==== //depot/projects/arm/src/sys/dev/ata/ata-all.h#5 (text+ko) ====
@@ -25,7 +25,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $FreeBSD: src/sys/dev/ata/ata-all.h,v 1.108 2005/11/29 20:08:26 sos Exp $
+ * $FreeBSD: src/sys/dev/ata/ata-all.h,v 1.109 2005/12/27 16:49:33 sos Exp $
*/
/* ATA register defines */
@@ -323,6 +323,7 @@
};
/* structure used for composite atomic operations */
+#define MAX_COMPOSITES 32 /* u_int32_t bits */
struct ata_composite {
struct mtx lock; /* control lock */
u_int32_t rd_needed; /* needed read subdisks */
@@ -330,7 +331,7 @@
u_int32_t wr_needed; /* needed write subdisks */
u_int32_t wr_depend; /* write depends on subdisks */
u_int32_t wr_done; /* done write subdisks */
- struct ata_request *request[32]; /* size must match maps above */
+ struct ata_request *request[MAX_COMPOSITES];
u_int32_t residual; /* bytes still to transfer */
caddr_t data_1;
caddr_t data_2;
==== //depot/projects/arm/src/sys/dev/ata/ata-chipset.c#6 (text+ko) ====
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/ata/ata-chipset.c,v 1.141 2005/12/16 08:12:13 sos Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/ata/ata-chipset.c,v 1.145 2005/12/28 11:55:43 sos Exp $");
#include "opt_ata.h"
#include <sys/param.h>
@@ -98,6 +98,12 @@
static void ata_intel_new_setmode(device_t dev, int mode);
static int ata_ite_chipinit(device_t dev);
static void ata_ite_setmode(device_t dev, int mode);
+static int ata_marvell_chipinit(device_t dev);
+static int ata_marvell_allocate(device_t dev);
+static void ata_marvell_intr(void *data);
+static void ata_marvell_dmainit(device_t dev);
+static int ata_marvell_command(struct ata_request *request);
+static void ata_marvell_reset(device_t dev);
static int ata_national_chipinit(device_t dev);
static void ata_national_setmode(device_t dev, int mode);
static int ata_nvidia_chipinit(device_t dev);
@@ -2081,6 +2087,449 @@
/*
+ * Marvell chipset support functions
+ */
+#define ATA_MV_HOST_BASE(ch) \
+ ((ch->unit & 3) * 0x0100) + (ch->unit > 3 ? 0x30000 : 0x20000)
+#define ATA_MV_EDMA_BASE(ch) \
+ ((ch->unit & 3) * 0x2000) + (ch->unit > 3 ? 0x30000 : 0x20000)
+
+int
+ata_marvell_ident(device_t dev)
+{
+ struct ata_pci_controller *ctlr = device_get_softc(dev);
+ struct ata_chip_id *idx;
+ static struct ata_chip_id ids[] =
+ {{ ATA_M88SX5040, 0, 4, MV5XXX, ATA_SA150, "88SX5040" },
+ { ATA_M88SX5041, 0, 4, MV5XXX, ATA_SA150, "88SX5041" },
+ { ATA_M88SX5080, 0, 8, MV5XXX, ATA_SA150, "88SX5080" },
+ { ATA_M88SX5081, 0, 8, MV5XXX, ATA_SA150, "88SX5081" },
+ { ATA_M88SX6041, 0, 4, MV6XXX, ATA_SA300, "88SX6041" },
+ { ATA_M88SX6081, 0, 8, MV6XXX, ATA_SA300, "88SX6081" },
+ { 0, 0, 0, 0, 0, 0}};
+ char buffer[64];
+
+ if (!(idx = ata_match_chip(dev, ids)))
+ return ENXIO;
+
+ sprintf(buffer, "Marvell %s %s controller",
+ idx->text, ata_mode2str(idx->max_dma));
+ device_set_desc_copy(dev, buffer);
+ ctlr->chip = idx;
+ ctlr->chipinit = ata_marvell_chipinit;
+ return 0;
+}
+
+static int
+ata_marvell_chipinit(device_t dev)
+{
+ struct ata_pci_controller *ctlr = device_get_softc(dev);
+ int rid = ATA_IRQ_RID;
+
+ if (!(ctlr->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
+ RF_SHAREABLE | RF_ACTIVE))) {
+ device_printf(dev, "unable to map interrupt\n");
+ return ENXIO;
+ }
+
+ ctlr->r_type1 = SYS_RES_MEMORY;
+ ctlr->r_rid1 = PCIR_BAR(0);
+ if (!(ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1,
+ &ctlr->r_rid1, RF_ACTIVE)))
+ return ENXIO;
+
+ /* mask all host controller interrupts */
+ ATA_OUTL(ctlr->r_res1, 0x01d64, 0x00000000);
+
+ /* mask all PCI interrupts */
+ ATA_OUTL(ctlr->r_res1, 0x01d5c, 0x00000000);
+
+ ctlr->reset = ata_marvell_reset;
+ ctlr->dmainit = ata_marvell_dmainit;
+ ctlr->allocate = ata_marvell_allocate;
+ ctlr->setmode = ata_sata_setmode;
+ ctlr->channels = ctlr->chip->cfg1;
+
+ if ((bus_setup_intr(dev, ctlr->r_irq, ATA_INTR_FLAGS,
+ ata_marvell_intr, ctlr, &ctlr->handle))) {
+ device_printf(dev, "unable to setup interrupt\n");
+ return ENXIO;
+ }
+
+ /* clear host controller interrupts */
+ ATA_OUTL(ctlr->r_res1, 0x20014, 0x00000000);
+ if (ctlr->chip->cfg1 > 4)
+ ATA_OUTL(ctlr->r_res1, 0x30014, 0x00000000);
+
+ /* clear PCI interrupts */
+ ATA_OUTL(ctlr->r_res1, 0x01d58, 0x00000000);
+
+ /* unmask PCI interrupts we want */
+ ATA_OUTL(ctlr->r_res1, 0x01d5c, 0x007fffff);
+
+ /* unmask host controller interrupts we want */
+ ATA_OUTL(ctlr->r_res1, 0x01d64, 0x000000ff/*HC0*/ | 0x0001fe00/*HC1*/ |
+ /*(1<<19) | (1<<20) | (1<<21) |*/(1<<22) | (1<<24) | (0x7f << 25));
+
+ pci_write_config(dev, PCIR_COMMAND,
+ pci_read_config(dev, PCIR_COMMAND, 2) & ~0x0400, 2);
+ return 0;
+}
+
+static int
+ata_marvell_allocate(device_t dev)
+{
+ struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
+ struct ata_channel *ch = device_get_softc(dev);
+ bus_addr_t wordp = ch->dma->work_bus;
+ int i;
+
+ /* set legacy ATA resources */
+ for (i = ATA_DATA; i <= ATA_COMMAND; i++) {
+ ch->r_io[i].res = ctlr->r_res1;
+ ch->r_io[i].offset = 0x02100 + (i << 2) + ATA_MV_EDMA_BASE(ch);
+ }
+ ch->r_io[ATA_CONTROL].res = ctlr->r_res1;
+ ch->r_io[ATA_CONTROL].offset = 0x02120 + ATA_MV_EDMA_BASE(ch);
+ ch->r_io[ATA_IDX_ADDR].res = ctlr->r_res1;
+ ata_default_registers(dev);
+
+ /* set SATA resources */
+ switch (ctlr->chip->cfg2) {
+ case MV5XXX:
+ ch->r_io[ATA_SSTATUS].res = ctlr->r_res1;
+ ch->r_io[ATA_SSTATUS].offset = 0x00100 + ATA_MV_HOST_BASE(ch);
+ ch->r_io[ATA_SERROR].res = ctlr->r_res1;
+ ch->r_io[ATA_SERROR].offset = 0x00104 + ATA_MV_HOST_BASE(ch);
+ ch->r_io[ATA_SCONTROL].res = ctlr->r_res1;
+ ch->r_io[ATA_SCONTROL].offset = 0x00108 + ATA_MV_HOST_BASE(ch);
+ break;
+ case MV6XXX:
+ ch->r_io[ATA_SSTATUS].res = ctlr->r_res1;
+ ch->r_io[ATA_SSTATUS].offset = 0x02300 + ATA_MV_EDMA_BASE(ch);
+ ch->r_io[ATA_SERROR].res = ctlr->r_res1;
+ ch->r_io[ATA_SERROR].offset = 0x02304 + ATA_MV_EDMA_BASE(ch);
+ ch->r_io[ATA_SCONTROL].res = ctlr->r_res1;
+ ch->r_io[ATA_SCONTROL].offset = 0x02308 + ATA_MV_EDMA_BASE(ch);
+ ch->r_io[ATA_SACTIVE].res = ctlr->r_res1;
+ ch->r_io[ATA_SACTIVE].offset = 0x02350 + ATA_MV_EDMA_BASE(ch);
+ break;
+ }
+
+ ch->flags |= ATA_NO_SLAVE;
+ ch->flags |= ATA_USE_16BIT; /* XXX SOS needed ? */
+ ata_generic_hw(dev);
+ ch->hw.command = ata_marvell_command;
+
+ /* disable the EDMA machinery */
+ ATA_OUTL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch), 0x00000002);
+ DELAY(100000); /* SOS should poll for disabled */
+
+ /* set configuration to non-queued 128b read transfers stop on error */
+ ATA_OUTL(ctlr->r_res1, 0x02000 + ATA_MV_EDMA_BASE(ch), (1<<11) | (1<<13));
+
+ /* request queue base high */
+ ATA_OUTL(ctlr->r_res1, 0x02010 + ATA_MV_EDMA_BASE(ch), (wordp >> 16) >> 16);
+
+ /* request queue in ptr */
+ ATA_OUTL(ctlr->r_res1, 0x02014 + ATA_MV_EDMA_BASE(ch), wordp & 0xffffffff);
+
+ /* request queue out ptr */
+ ATA_OUTL(ctlr->r_res1, 0x02018 + ATA_MV_EDMA_BASE(ch), 0x0);
+
+ /* response queue base high */
+ wordp += 1024;
+ ATA_OUTL(ctlr->r_res1, 0x0201c + ATA_MV_EDMA_BASE(ch), (wordp >> 16) >> 16);
+
+ /* response queue in ptr */
+ ATA_OUTL(ctlr->r_res1, 0x02020 + ATA_MV_EDMA_BASE(ch), 0x0);
+
+ /* response queue out ptr */
+ ATA_OUTL(ctlr->r_res1, 0x02024 + ATA_MV_EDMA_BASE(ch), wordp & 0xffffffff);
+
+ /* clear SATA error register */
+ ATA_IDX_OUTL(ch, ATA_SERROR, ATA_IDX_INL(ch, ATA_SERROR));
+
+ /* clear any outstanding error interrupts */
+ ATA_OUTL(ctlr->r_res1, 0x02008 + ATA_MV_EDMA_BASE(ch), 0x0);
+
+ /* unmask all error interrupts */
+ ATA_OUTL(ctlr->r_res1, 0x0200c + ATA_MV_EDMA_BASE(ch), ~0x0);
+
+ /* enable EDMA machinery */
+ ATA_OUTL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch), 0x00000001);
+ return 0;
+}
+
+struct ata_marvell_response {
+ u_int16_t tag;
+ u_int8_t edma_status;
+ u_int8_t dev_status;
+ u_int32_t timestamp;
+};
+
+static void
+ata_marvell_intr(void *data)
+{
+ struct ata_pci_controller *ctlr = data;
+ struct ata_channel *ch;
+ struct ata_request *request;
+ struct ata_marvell_response *response;
+ u_int32_t cause, icr0 = 0, icr1 = 0;
+ int unit;
+
+ cause = ATA_INL(ctlr->r_res1, 0x01d60);
+ if ((icr0 = ATA_INL(ctlr->r_res1, 0x20014)))
+ ATA_OUTL(ctlr->r_res1, 0x20014, ~icr0);
+ if (ctlr->channels > 4) {
+ if ((icr1 = ATA_INL(ctlr->r_res1, 0x30014)))
+ ATA_OUTL(ctlr->r_res1, 0x30014, ~icr1);
+ }
+
+ for (unit = 0; unit < ctlr->channels; unit++) {
+ u_int32_t icr;
+ int shift;
+
+ if (!(ch = ctlr->interrupt[unit].argument))
+ continue;
+
+ mtx_lock(&ch->state_mtx);
+ shift = unit << 1;
+ if (ch->unit < 4)
+ icr = icr0;
+ else {
+ icr = icr1;
+ shift++;
+ }
+
+ /* do we have any errors flagged ? */
+ if (cause & (1 << shift)) {
+ /* clear SATA error register */
+ ATA_IDX_OUTL(ch, ATA_SERROR, ATA_IDX_INL(ch, ATA_SERROR));
+
+ /* clear any outstanding error interrupts */
+ ATA_OUTL(ctlr->r_res1, 0x02008 + ATA_MV_EDMA_BASE(ch), 0x0);
+ }
+
+ /* EDMA interrupt */
+ if ((icr & (0x0001 << (unit & 3))) && (request = ch->running)) {
+ u_int32_t rsp_in, rsp_out;
+ int slot;
+
+ request->dmastat = ch->dma->stop(request->dev);
+ ch->dma->unload(ch->dev);
+ callout_stop(&request->callout);
+
+ /* get response ptr's */
+ rsp_in = ATA_INL(ctlr->r_res1, 0x02020 + ATA_MV_EDMA_BASE(ch));
+ rsp_out = ATA_INL(ctlr->r_res1, 0x02024 + ATA_MV_EDMA_BASE(ch));
+ slot = (((rsp_in & ~0xffffff00) >> 3)) & 0x1f;
+ rsp_out &= 0xffffff00;
+ rsp_out += (slot << 3);
+ response = (struct ata_marvell_response *)
+ (u_int8_t *)(ch->dma->work) + 1024 + (slot << 3);
+
+ /* record status for this request */
+ request->status = response->dev_status;
+ request->error = 0;
+
+ /* ack response */
+ ATA_OUTL(ctlr->r_res1, 0x02024 + ATA_MV_EDMA_BASE(ch), rsp_out);
+
+ /* update progress */
+ if (!(request->status & ATA_S_ERROR) &&
+ !(request->flags & ATA_R_TIMEOUT))
+ request->donecount = request->bytecount;
+
+ /* finish up this request */
+ ch->running = NULL;
+ if (ch->state == ATA_ACTIVE)
+ ch->state = ATA_IDLE;
+ mtx_unlock(&ch->state_mtx);
+ ATA_LOCKING(ch->dev, ATA_LF_UNLOCK);
+ ata_finish(request);
+ }
+
+ /* legacy ATA interrupt */
+ else if (icr & (0x0100 << (unit & 3))) {
+ mtx_unlock(&ch->state_mtx);
+ ctlr->interrupt[unit].function(ch);
+ }
+
+ /* no device action to handle */
+ else {
+ mtx_unlock(&ch->state_mtx);
+ }
+ }
+}
+
+struct ata_marvell_dma_prdentry {
+ u_int32_t addrlo;
+ u_int32_t count;
+ u_int32_t addrhi;
+ u_int32_t reserved;
+};
+
+static void
+ata_marvell_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error)
+{
+ struct ata_dmasetprd_args *args = xsc;
+ struct ata_marvell_dma_prdentry *prd = args->dmatab;
+ int i;
+
+ if ((args->error = error))
+ return;
+
+ for (i = 0; i < nsegs; i++) {
+ prd[i].addrlo = htole32(segs[i].ds_addr);
+ prd[i].addrhi = 0;
+ prd[i].count = htole32(segs[i].ds_len);
+ }
+ prd[i - 1].count |= htole32(ATA_DMA_EOT);
+}
+
+static int
+ata_marvell_dmastart(device_t dev)
+{
+ struct ata_channel *ch = device_get_softc(device_get_parent(dev));
+
+ ch->flags |= ATA_DMA_ACTIVE;
+ return 0;
+}
+
+static int
+ata_marvell_dmastop(device_t dev)
+{
+ struct ata_channel *ch = device_get_softc(device_get_parent(dev));
+
+ ch->flags &= ~ATA_DMA_ACTIVE;
+
+ /* get status XXX SOS */
+ return 0;
+}
+
+static void
+ata_marvell_dmainit(device_t dev)
+{
+ struct ata_channel *ch = device_get_softc(dev);
+
+ ata_dmainit(dev);
+ if (ch->dma) {
+ ch->dma->start = ata_marvell_dmastart;
+ ch->dma->stop = ata_marvell_dmastop;
+ ch->dma->setprd = ata_marvell_dmasetprd;
+ }
+}
+
+static int
+ata_marvell_command(struct ata_request *request)
+{
+ struct ata_pci_controller *ctlr=device_get_softc(GRANDPARENT(request->dev));
+ struct ata_channel *ch = device_get_softc(device_get_parent(request->dev));
+ u_int32_t req_in;
+ u_int8_t *bytep;
+ u_int16_t *wordp;
+ u_int32_t *quadp;
+ int i, tag = 0x07;
+ int slot;
+
+ /* only DMA R/W goes through the EMDA machine */
+ if (request->u.ata.command != ATA_READ_DMA &&
+ request->u.ata.command != ATA_READ_DMA48 &&
+ request->u.ata.command != ATA_WRITE_DMA &&
+ request->u.ata.command != ATA_WRITE_DMA48) {
+
+ /* disable the EDMA machinery */
+ if (ATA_INL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch)) & 0x00000001)
+ ATA_OUTL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch), 0x00000002);
+ return ata_generic_command(request);
+ }
+
+ /* get next free request queue slot */
+ req_in = ATA_INL(ctlr->r_res1, 0x02014 + ATA_MV_EDMA_BASE(ch));
+ slot = (((req_in & ~0xfffffc00) >> 5) + 0) & 0x1f;
+ bytep = (u_int8_t *)(ch->dma->work);
+ bytep += (slot << 5);
+ wordp = (u_int16_t *)bytep;
+ quadp = (u_int32_t *)bytep;
+
+ /* fill in this request */
+ quadp[0] = (long)ch->dma->sg_bus & 0xffffffff;
+ quadp[1] = (ch->dma->sg_bus & 0xffffffff00000000) >> 32;
+ wordp[4] = (request->flags & ATA_R_READ ? 0x01 : 0x00) | (tag<<1);
+
+ i = 10;
+ bytep[i++] = (request->u.ata.count >> 8) & 0xff;
+ bytep[i++] = 0x10 | ATA_COUNT;
+ bytep[i++] = request->u.ata.count & 0xff;
+ bytep[i++] = 0x10 | ATA_COUNT;
+
+ bytep[i++] = (request->u.ata.lba >> 24) & 0xff;
+ bytep[i++] = 0x10 | ATA_SECTOR;
+ bytep[i++] = request->u.ata.lba & 0xff;
+ bytep[i++] = 0x10 | ATA_SECTOR;
+
+ bytep[i++] = (request->u.ata.lba >> 32) & 0xff;
+ bytep[i++] = 0x10 | ATA_CYL_LSB;
+ bytep[i++] = (request->u.ata.lba >> 8) & 0xff;
+ bytep[i++] = 0x10 | ATA_CYL_LSB;
+
+ bytep[i++] = (request->u.ata.lba >> 40) & 0xff;
+ bytep[i++] = 0x10 | ATA_CYL_MSB;
+ bytep[i++] = (request->u.ata.lba >> 16) & 0xff;
+ bytep[i++] = 0x10 | ATA_CYL_MSB;
+
+ bytep[i++] = ATA_D_LBA | ATA_D_IBM | ((request->u.ata.lba >> 24) & 0xf);
+ bytep[i++] = 0x10 | ATA_DRIVE;
+ bytep[i++] = request->u.ata.command;
+ bytep[i++] = 0x90 | ATA_COMMAND;
+
+ /* enable EDMA machinery if needed */
+ if (!(ATA_INL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch)) & 0x00000001)) {
+ ATA_OUTL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch), 0x00000001);
+ while (!(ATA_INL(ctlr->r_res1,
+ 0x02028 + ATA_MV_EDMA_BASE(ch)) & 0x00000001))
+ DELAY(10);
+ }
+
+ /* tell EDMA it has a new request */
+ slot = (((req_in & ~0xfffffc00) >> 5) + 1) & 0x1f;
+ req_in &= 0xfffffc00;
+ req_in += (slot << 5);
+ ATA_OUTL(ctlr->r_res1, 0x02014 + ATA_MV_EDMA_BASE(ch), req_in);
+
+ return 0;
+}
+
+static void
+ata_marvell_reset(device_t dev)
+{
+ struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
+ struct ata_channel *ch = device_get_softc(dev);
+
+ /* disable the EDMA machinery */
+ ATA_OUTL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch), 0x00000002);
+ while ((ATA_INL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch)) & 0x00000001))
+ DELAY(10);
+
+ /* clear SATA error register */
+ ATA_IDX_OUTL(ch, ATA_SERROR, ATA_IDX_INL(ch, ATA_SERROR));
+
+ /* clear any outstanding error interrupts */
+ ATA_OUTL(ctlr->r_res1, 0x02008 + ATA_MV_EDMA_BASE(ch), 0x0);
+
+ /* unmask all error interrupts */
+ ATA_OUTL(ctlr->r_res1, 0x0200c + ATA_MV_EDMA_BASE(ch), ~0x0);
+
+ /* enable channel and test for devices */
+ ata_sata_phy_enable(ch);
+
+ /* enable EDMA machinery */
+ ATA_OUTL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch), 0x00000001);
+}
+
+
+/*
* National chipset support functions
*/
int
==== //depot/projects/arm/src/sys/dev/ata/ata-pci.c#3 (text+ko) ====
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/ata/ata-pci.c,v 1.107 2005/10/31 15:41:18 rwatson Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/ata/ata-pci.c,v 1.109 2005/12/27 18:22:11 sos Exp $");
#include "opt_ata.h"
#include <sys/param.h>
@@ -58,6 +58,7 @@
/* misc defines */
#define IOMASK 0xfffffffc
+#define ATA_PROBE_OK -10
/* prototypes */
static void ata_pci_dmainit(device_t);
@@ -80,73 +81,77 @@
switch (pci_get_vendor(dev)) {
case ATA_ACARD_ID:
if (!ata_acard_ident(dev))
- return 0;
+ return ATA_PROBE_OK;
break;
case ATA_ACER_LABS_ID:
if (!ata_ali_ident(dev))
- return 0;
+ return ATA_PROBE_OK;
break;
case ATA_AMD_ID:
if (!ata_amd_ident(dev))
>>> TRUNCATED FOR MAIL (1000 lines) <<<
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