PERFORCE change 44806 for review
Warner Losh
imp at FreeBSD.org
Sun Jan 4 22:04:32 PST 2004
http://perforce.freebsd.org/chv.cgi?CH=44806
Change 44806 by imp at imp_pacopaco on 2004/01/04 22:03:23
Integrate from newcard @44803.
Affected files ...
.. //depot/projects/power/sys/dev/firewire/00README#2 integrate
.. //depot/projects/power/sys/dev/firewire/firewire.c#5 integrate
.. //depot/projects/power/sys/dev/firewire/firewire.h#4 integrate
.. //depot/projects/power/sys/dev/firewire/firewire_phy.h#2 integrate
.. //depot/projects/power/sys/dev/firewire/firewirereg.h#4 integrate
.. //depot/projects/power/sys/dev/firewire/fwcrom.c#3 integrate
.. //depot/projects/power/sys/dev/firewire/fwdev.c#5 integrate
.. //depot/projects/power/sys/dev/firewire/fwdma.c#2 integrate
.. //depot/projects/power/sys/dev/firewire/fwdma.h#2 integrate
.. //depot/projects/power/sys/dev/firewire/fwmem.c#5 integrate
.. //depot/projects/power/sys/dev/firewire/fwmem.h#3 integrate
.. //depot/projects/power/sys/dev/firewire/fwohci.c#5 integrate
.. //depot/projects/power/sys/dev/firewire/fwohci_pci.c#5 integrate
.. //depot/projects/power/sys/dev/firewire/fwohcireg.h#3 integrate
.. //depot/projects/power/sys/dev/firewire/fwohcivar.h#3 integrate
.. //depot/projects/power/sys/dev/firewire/fwphyreg.h#2 integrate
.. //depot/projects/power/sys/dev/firewire/iec13213.h#2 integrate
.. //depot/projects/power/sys/dev/firewire/iec68113.h#2 integrate
.. //depot/projects/power/sys/dev/firewire/if_fwe.c#4 integrate
.. //depot/projects/power/sys/dev/firewire/if_fwevar.h#2 integrate
.. //depot/projects/power/sys/dev/firewire/sbp.c#4 integrate
.. //depot/projects/power/sys/dev/firewire/sbp.h#4 integrate
.. //depot/projects/power/sys/dev/firewire/sbp_targ.c#4 integrate
.. //depot/projects/power/sys/dev/fxp/if_fxp.c#5 integrate
.. //depot/projects/power/sys/dev/fxp/if_fxpreg.h#2 integrate
.. //depot/projects/power/sys/dev/fxp/if_fxpvar.h#3 integrate
.. //depot/projects/power/sys/dev/fxp/rcvbundl.h#2 integrate
.. //depot/projects/power/sys/dev/lge/if_lge.c#4 integrate
.. //depot/projects/power/sys/dev/lge/if_lgereg.h#2 integrate
.. //depot/projects/power/sys/dev/nge/if_nge.c#4 integrate
.. //depot/projects/power/sys/dev/nge/if_ngereg.h#2 integrate
.. //depot/projects/power/sys/dev/pccbb/pccbb.c#7 integrate
.. //depot/projects/power/sys/dev/pccbb/pccbbdevid.h#4 integrate
.. //depot/projects/power/sys/dev/pci/pci.c#8 integrate
.. //depot/projects/power/sys/dev/pci/pci_pci.c#5 integrate
.. //depot/projects/power/sys/dev/pci/pcib_private.h#3 integrate
.. //depot/projects/power/sys/dev/pci/pcivar.h#5 integrate
.. //depot/projects/power/sys/dev/txp/3c990img.h#2 integrate
.. //depot/projects/power/sys/dev/txp/if_txp.c#3 integrate
.. //depot/projects/power/sys/dev/txp/if_txpreg.h#2 integrate
.. //depot/projects/power/sys/pci/agp.c#4 integrate
.. //depot/projects/power/sys/pci/agp_ali.c#3 integrate
.. //depot/projects/power/sys/pci/agp_amd.c#2 integrate
.. //depot/projects/power/sys/pci/agp_i810.c#4 integrate
.. //depot/projects/power/sys/pci/agp_if.m#2 integrate
.. //depot/projects/power/sys/pci/agp_intel.c#3 integrate
.. //depot/projects/power/sys/pci/agp_nvidia.c#2 integrate
.. //depot/projects/power/sys/pci/agp_sis.c#2 integrate
.. //depot/projects/power/sys/pci/agp_via.c#2 integrate
.. //depot/projects/power/sys/pci/agppriv.h#2 integrate
.. //depot/projects/power/sys/pci/agpreg.h#2 integrate
.. //depot/projects/power/sys/pci/agpvar.h#2 integrate
.. //depot/projects/power/sys/pci/alpm.c#2 integrate
.. //depot/projects/power/sys/pci/amdpm.c#2 integrate
.. //depot/projects/power/sys/pci/dc21040reg.h#2 integrate
.. //depot/projects/power/sys/pci/if_dc.c#7 integrate
.. //depot/projects/power/sys/pci/if_dcreg.h#5 integrate
.. //depot/projects/power/sys/pci/if_de.c#3 integrate
.. //depot/projects/power/sys/pci/if_devar.h#3 integrate
.. //depot/projects/power/sys/pci/if_mn.c#2 integrate
.. //depot/projects/power/sys/pci/if_pcn.c#4 integrate
.. //depot/projects/power/sys/pci/if_pcnreg.h#3 integrate
.. //depot/projects/power/sys/pci/if_rl.c#6 integrate
.. //depot/projects/power/sys/pci/if_rlreg.h#4 integrate
.. //depot/projects/power/sys/pci/if_sf.c#4 integrate
.. //depot/projects/power/sys/pci/if_sfreg.h#3 integrate
.. //depot/projects/power/sys/pci/if_sis.c#6 integrate
.. //depot/projects/power/sys/pci/if_sisreg.h#4 integrate
.. //depot/projects/power/sys/pci/if_sk.c#6 integrate
.. //depot/projects/power/sys/pci/if_skreg.h#4 integrate
.. //depot/projects/power/sys/pci/if_ste.c#4 integrate
.. //depot/projects/power/sys/pci/if_stereg.h#3 integrate
.. //depot/projects/power/sys/pci/if_ti.c#4 integrate
.. //depot/projects/power/sys/pci/if_tireg.h#3 integrate
.. //depot/projects/power/sys/pci/if_tl.c#4 integrate
.. //depot/projects/power/sys/pci/if_tlreg.h#3 integrate
.. //depot/projects/power/sys/pci/if_vr.c#4 integrate
.. //depot/projects/power/sys/pci/if_vrreg.h#3 integrate
.. //depot/projects/power/sys/pci/if_wb.c#4 integrate
.. //depot/projects/power/sys/pci/if_wbreg.h#3 integrate
.. //depot/projects/power/sys/pci/if_xl.c#6 integrate
.. //depot/projects/power/sys/pci/if_xlreg.h#4 integrate
.. //depot/projects/power/sys/pci/intpm.c#2 integrate
.. //depot/projects/power/sys/pci/intpmreg.h#2 integrate
.. //depot/projects/power/sys/pci/locate.pl#2 integrate
.. //depot/projects/power/sys/pci/ncr.c#2 integrate
.. //depot/projects/power/sys/pci/ncrreg.h#2 integrate
.. //depot/projects/power/sys/pci/ti_fw.h#2 integrate
.. //depot/projects/power/sys/pci/ti_fw2.h#2 integrate
.. //depot/projects/power/sys/pci/viapm.c#2 integrate
.. //depot/projects/power/sys/pci/xmaciireg.h#2 integrate
.. //depot/projects/power/sys/pci/xrpu.c#3 integrate
.. //depot/projects/power/sys/pci/yukonreg.h#2 integrate
Differences ...
==== //depot/projects/power/sys/dev/firewire/00README#2 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/firewire.c#5 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/firewire.h#4 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/firewire_phy.h#2 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/firewirereg.h#4 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/fwcrom.c#3 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/fwdev.c#5 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/fwdma.c#2 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/fwdma.h#2 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/fwmem.c#5 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/fwmem.h#3 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/fwohci.c#5 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/fwohci_pci.c#5 (text+ko) ====
@@ -418,11 +418,6 @@
{
fwohci_softc_t *sc = device_get_softc(dev);
-#ifndef BURN_BRIDGES
- device_printf(dev, "fwohci_pci_resume: power_state = 0x%08x\n",
- pci_get_powerstate(dev));
- pci_set_powerstate(dev, PCI_POWERSTATE_D0);
-#endif
fwohci_pci_init(dev);
fwohci_resume(sc, dev);
return 0;
==== //depot/projects/power/sys/dev/firewire/fwohcireg.h#3 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/fwohcivar.h#3 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/fwphyreg.h#2 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/iec13213.h#2 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/iec68113.h#2 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/if_fwe.c#4 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/if_fwevar.h#2 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/sbp.c#4 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/sbp.h#4 (text+ko) ====
==== //depot/projects/power/sys/dev/firewire/sbp_targ.c#4 (text+ko) ====
==== //depot/projects/power/sys/dev/fxp/if_fxp.c#5 (text+ko) ====
@@ -211,9 +211,6 @@
static void fxp_init(void *xsc);
static void fxp_init_body(struct fxp_softc *sc);
static void fxp_tick(void *xsc);
-#ifndef BURN_BRIDGES
-static void fxp_powerstate_d0(device_t dev);
-#endif
static void fxp_start(struct ifnet *ifp);
static void fxp_start_body(struct ifnet *ifp);
static void fxp_stop(struct fxp_softc *sc);
@@ -358,34 +355,6 @@
return (ENXIO);
}
-#ifndef BURN_BRIDGES
-static void
-fxp_powerstate_d0(device_t dev)
-{
-#if __FreeBSD_version >= 430002
- u_int32_t iobase, membase, irq;
-
- if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
- /* Save important PCI config data. */
- iobase = pci_read_config(dev, FXP_PCI_IOBA, 4);
- membase = pci_read_config(dev, FXP_PCI_MMBA, 4);
- irq = pci_read_config(dev, PCIR_INTLINE, 4);
-
- /* Reset the power state. */
- device_printf(dev, "chip is in D%d power mode "
- "-- setting to D0\n", pci_get_powerstate(dev));
-
- pci_set_powerstate(dev, PCI_POWERSTATE_D0);
-
- /* Restore PCI config data. */
- pci_write_config(dev, FXP_PCI_IOBA, iobase, 4);
- pci_write_config(dev, FXP_PCI_MMBA, membase, 4);
- pci_write_config(dev, PCIR_INTLINE, irq, 4);
- }
-#endif
-}
-#endif
-
static void
fxp_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
{
@@ -426,9 +395,7 @@
*/
pci_enable_busmaster(dev);
val = pci_read_config(dev, PCIR_COMMAND, 2);
-#ifndef BURN_BRIDGES
- fxp_powerstate_d0(dev);
-#endif
+
/*
* Figure out which we should try first - memory mapping or i/o mapping?
* We default to memory mapping. Then we accept an override from the
@@ -1021,9 +988,7 @@
FXP_LOCK(sc);
s = splimp();
-#ifndef BURN_BRIDGES
- fxp_powerstate_d0(dev);
-#endif
+
/* better way to do this? */
for (i = 0; i < 5; i++)
pci_write_config(dev, PCIR_BAR(i), sc->saved_maps[i], 4);
@@ -1554,6 +1519,9 @@
struct ifnet *ifp = &sc->sc_if;
u_int8_t statack;
+ if (sc->gone)
+ return;
+
FXP_LOCK(sc);
if (sc->suspended) {
FXP_UNLOCK(sc);
==== //depot/projects/power/sys/dev/fxp/if_fxpreg.h#2 (text+ko) ====
==== //depot/projects/power/sys/dev/fxp/if_fxpvar.h#3 (text+ko) ====
@@ -189,6 +189,7 @@
int cu_resume_bug;
int revision;
int flags;
+ int gone;
u_int32_t saved_maps[5]; /* pci data */
u_int32_t saved_biosaddr;
u_int8_t saved_intline;
==== //depot/projects/power/sys/dev/fxp/rcvbundl.h#2 (text+ko) ====
==== //depot/projects/power/sys/dev/lge/if_lge.c#4 (text+ko) ====
@@ -498,30 +498,7 @@
sc = device_get_softc(dev);
unit = device_get_unit(dev);
bzero(sc, sizeof(struct lge_softc));
-#ifndef BURN_BRIDGES
- /*
- * Handle power management nonsense.
- */
- if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
- u_int32_t iobase, membase, irq;
- /* Save important PCI config data. */
- iobase = pci_read_config(dev, LGE_PCI_LOIO, 4);
- membase = pci_read_config(dev, LGE_PCI_LOMEM, 4);
- irq = pci_read_config(dev, LGE_PCI_INTLINE, 4);
-
- /* Reset the power state. */
- printf("lge%d: chip is in D%d power mode "
- "-- setting to D0\n", unit,
- pci_get_powerstate(dev));
- pci_set_powerstate(dev, PCI_POWERSTATE_D0);
-
- /* Restore PCI config data. */
- pci_write_config(dev, LGE_PCI_LOIO, iobase, 4);
- pci_write_config(dev, LGE_PCI_LOMEM, membase, 4);
- pci_write_config(dev, LGE_PCI_INTLINE, irq, 4);
- }
-#endif
/*
* Map control/status registers.
*/
==== //depot/projects/power/sys/dev/lge/if_lgereg.h#2 (text+ko) ====
==== //depot/projects/power/sys/dev/nge/if_nge.c#4 (text+ko) ====
@@ -832,30 +832,7 @@
mtx_init(&sc->nge_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
MTX_DEF | MTX_RECURSE);
-#ifndef BURN_BRIDGES
- /*
- * Handle power management nonsense.
- */
- if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
- u_int32_t iobase, membase, irq;
- /* Save important PCI config data. */
- iobase = pci_read_config(dev, NGE_PCI_LOIO, 4);
- membase = pci_read_config(dev, NGE_PCI_LOMEM, 4);
- irq = pci_read_config(dev, NGE_PCI_INTLINE, 4);
-
- /* Reset the power state. */
- printf("nge%d: chip is in D%d power mode "
- "-- setting to D0\n", unit,
- pci_get_powerstate(dev));
- pci_set_powerstate(dev, PCI_POWERSTATE_D0);
-
- /* Restore PCI config data. */
- pci_write_config(dev, NGE_PCI_LOIO, iobase, 4);
- pci_write_config(dev, NGE_PCI_LOMEM, membase, 4);
- pci_write_config(dev, NGE_PCI_INTLINE, irq, 4);
- }
-#endif
/*
* Map control/status registers.
*/
==== //depot/projects/power/sys/dev/nge/if_ngereg.h#2 (text+ko) ====
==== //depot/projects/power/sys/dev/pccbb/pccbb.c#7 (text+ko) ====
@@ -640,6 +640,10 @@
}
#ifndef BURN_BRIDGES
+/*
+ * Still need this because the pci code only does power for type 0
+ * header devices.
+ */
static void
cbb_powerstate_d0(device_t dev)
{
==== //depot/projects/power/sys/dev/pccbb/pccbbdevid.h#4 (text+ko) ====
==== //depot/projects/power/sys/dev/pci/pci.c#8 (text+ko) ====
@@ -1704,6 +1704,7 @@
pci_set_powerstate(dev, PCI_POWERSTATE_D0);
for (i = 0; i < dinfo->cfg.nummaps; i++)
pci_write_config(dev, PCIR_MAPS + i * 4, dinfo->cfg.bar[i], 4);
+ pci_write_config(dev, PCIR_BIOS, dinfo->cfg.bios, 4);
pci_write_config(dev, PCIR_COMMAND, dinfo->cfg.cmdreg, 2);
pci_write_config(dev, PCIR_INTLINE, dinfo->cfg.intline, 1);
pci_write_config(dev, PCIR_INTPIN, dinfo->cfg.intpin, 1);
@@ -1730,6 +1731,7 @@
return;
for (i = 0; i < dinfo->cfg.nummaps; i++)
dinfo->cfg.bar[i] = pci_read_config(dev, PCIR_MAPS + i * 4, 4);
+ dinfo->cfg.bios = pci_read_config(dev, PCIR_BIOS, 4);
/*
* Some drivers apparently write to these registers w/o
==== //depot/projects/power/sys/dev/pci/pci_pci.c#5 (text+ko) ====
@@ -92,18 +92,6 @@
DRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, 0, 0);
/*
- * sysctl and tunable vars
- */
-static int pci_allow_unsupported_io_range = 0;
-TUNABLE_INT("hw.pci.allow_unsupported_io_range",
- (int *)&pci_allow_unsupported_io_range);
-SYSCTL_DECL(_hw_pci);
-SYSCTL_INT(_hw_pci, OID_AUTO, allow_unsupported_io_range, CTLFLAG_RDTUN,
- &pci_allow_unsupported_io_range, 0,
- "Allows the PCI Bridge to pass through an unsupported memory range "
- "assigned by the BIOS.");
-
-/*
* Generic device interface
*/
static int
@@ -173,7 +161,7 @@
* Quirk handling.
*/
switch (pci_get_devid(dev)) {
- case 0x12258086: /* Intel 82454KX/GX (Orion) */
+ case 0x12258086: /* Intel 82454KX/GX (Orion) */
{
uint8_t supbus;
@@ -182,16 +170,42 @@
sc->secbus = supbus + 1;
sc->subbus = supbus + 1;
}
+ break;
}
+
+ /*
+ * The i82380FB mobile docking controller is a PCI-PCI bridge,
+ * and it is a subtractive bridge. However, the ProgIf is wrong
+ * so the normal setting of PCIB_SUBTRACTIVE bit doesn't
+ * happen. There's also a Toshiba bridge that behaves this
+ * way.
+ */
+ case 0x124b8086: /* Intel 82380FB Mobile */
+ case 0x060513d7: /* Toshiba ???? */
+ sc->flags |= PCIB_SUBTRACTIVE;
break;
}
+ /*
+ * Intel 815, 845 and other chipsets say they are PCI-PCI bridges,
+ * but have a ProgIF of 0x80. The 82801 family (AA, AB, BAM/CAM,
+ * BA/CA/DB and E) PCI bridges are HUB-PCI bridges, in Intelese.
+ * This means they act as if they were subtractively decoding
+ * bridges and pass all transactions. Mark them and real ProgIf 1
+ * parts as subtractive.
+ */
+ if ((pci_get_devid(dev) & 0xff00ffff) == 0x24008086 ||
+ pci_read_config(dev, PCIR_PROGIF, 1) == 1)
+ sc->flags |= PCIB_SUBTRACTIVE;
+
if (bootverbose) {
device_printf(dev, " secondary bus %d\n", sc->secbus);
device_printf(dev, " subordinate bus %d\n", sc->subbus);
device_printf(dev, " I/O decode 0x%x-0x%x\n", sc->iobase, sc->iolimit);
device_printf(dev, " memory decode 0x%x-0x%x\n", sc->membase, sc->memlimit);
device_printf(dev, " prefetched decode 0x%x-0x%x\n", sc->pmembase, sc->pmemlimit);
+ if (sc->flags & PCIB_SUBTRACTIVE)
+ device_printf(dev, " Subtractively decoded bridge.\n");
}
/*
@@ -252,37 +266,12 @@
}
/*
- * Is this a decoded ISA I/O port address? Note, we need to do the mask that
- * we do below because of the ISA alias addresses. I'm not 100% sure that
- * this is correct. Maybe the bridge needs to be subtractive decode for
- * this to work?
- */
-static int
-pcib_is_isa_io(u_long start)
-{
- if ((start & 0xfffUL) > 0x3ffUL || start == 0)
- return (0);
- return (1);
-}
-
-/*
- * Is this a decoded ISA memory address?
- */
-static int
-pcib_is_isa_mem(u_long start)
-{
- if (start > 0xfffffUL || start == 0)
- return (0);
- return (1);
-}
-
-/*
* Is the prefetch window open (eg, can we allocate memory in it?)
*/
static int
pcib_is_prefetch_open(struct pcib_softc *sc)
{
- return (sc->pmembase > 0 && sc->pmembase < sc->pmemlimit);
+ return (sc->pmembase > 0 && sc->pmembase < sc->pmemlimit);
}
/*
@@ -291,7 +280,7 @@
static int
pcib_is_nonprefetch_open(struct pcib_softc *sc)
{
- return (sc->membase > 0 && sc->membase < sc->memlimit);
+ return (sc->membase > 0 && sc->membase < sc->memlimit);
}
/*
@@ -300,7 +289,7 @@
static int
pcib_is_io_open(struct pcib_softc *sc)
{
- return (sc->iobase > 0 && sc->iobase < sc->iolimit);
+ return (sc->iobase > 0 && sc->iobase < sc->iolimit);
}
/*
@@ -319,116 +308,105 @@
*/
switch (type) {
case SYS_RES_IOPORT:
- ok = 1;
- if (!pcib_is_isa_io(start)) {
- ok = 0;
- if (pcib_is_io_open(sc))
- ok = (start >= sc->iobase && end <= sc->iolimit);
- if (!pci_allow_unsupported_io_range) {
- if (!ok) {
- if (start < sc->iobase)
- start = sc->iobase;
- if (end > sc->iolimit)
- end = sc->iolimit;
- }
- } else {
+ ok = 0;
+ if (!pcib_is_io_open(sc))
+ break;
+ ok = (start >= sc->iobase && end <= sc->iolimit);
+ if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
+ if (!ok) {
if (start < sc->iobase)
- printf("start (%lx) < sc->iobase (%x)\n", start,
- sc->iobase);
+ start = sc->iobase;
if (end > sc->iolimit)
- printf("end (%lx) > sc->iolimit (%x)\n",
- end, sc->iolimit);
- if (end < start)
- printf("end (%lx) < start (%lx)\n", end, start);
+ end = sc->iolimit;
+ }
+ } else {
+ ok = 1;
+ if (start < sc->iobase && end > sc->iolimit) {
+ start = sc->iobase;
+ end = sc->iolimit;
}
+
}
if (end < start) {
+ device_printf(dev, "ioport: end (%lx) < start (%lx)\n", end, start);
start = 0;
end = 0;
ok = 0;
}
if (!ok) {
- device_printf(dev, "device %s%d requested unsupported I/O "
+ device_printf(dev, "device %s requested unsupported I/O "
"range 0x%lx-0x%lx (decoding 0x%x-0x%x)\n",
- device_get_name(child), device_get_unit(child), start, end,
+ device_get_nameunit(child), start, end,
sc->iobase, sc->iolimit);
return (NULL);
}
if (bootverbose)
- device_printf(sc->dev, "device %s%d requested decoded I/O range 0x%lx-0x%lx\n",
- device_get_name(child), device_get_unit(child), start, end);
+ device_printf(dev, "device %s requested decoded I/O range 0x%lx-0x%lx\n",
+ device_get_nameunit(child), start, end);
break;
case SYS_RES_MEMORY:
- ok = 1;
- if (!pcib_is_isa_mem(start)) {
- ok = 0;
- if (pcib_is_nonprefetch_open(sc))
- ok = ok || (start >= sc->membase && end <= sc->memlimit);
- if (pcib_is_prefetch_open(sc))
- ok = ok || (start >= sc->pmembase && end <= sc->pmemlimit);
- if (!pci_allow_unsupported_io_range) {
- if (!ok) {
- ok = 1;
- if (flags & RF_PREFETCHABLE) {
- if (pcib_is_prefetch_open(sc)) {
- if (start < sc->pmembase)
- start = sc->pmembase;
- if (end > sc->pmemlimit)
- end = sc->pmemlimit;
- } else {
- ok = 0;
- }
- } else { /* non-prefetchable */
- if (pcib_is_nonprefetch_open(sc)) {
- if (start < sc->membase)
- start = sc->membase;
- if (end > sc->memlimit)
- end = sc->memlimit;
- } else {
- ok = 0;
- }
+ ok = 0;
+ if (pcib_is_nonprefetch_open(sc))
+ ok = ok || (start >= sc->membase && end <= sc->memlimit);
+ if (pcib_is_prefetch_open(sc))
+ ok = ok || (start >= sc->pmembase && end <= sc->pmemlimit);
+ if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
+ if (!ok) {
+ ok = 1;
+ if (flags & RF_PREFETCHABLE) {
+ if (pcib_is_prefetch_open(sc)) {
+ if (start < sc->pmembase)
+ start = sc->pmembase;
+ if (end > sc->pmemlimit)
+ end = sc->pmemlimit;
+ } else {
+ ok = 0;
+ }
+ } else { /* non-prefetchable */
+ if (pcib_is_nonprefetch_open(sc)) {
+ if (start < sc->membase)
+ start = sc->membase;
+ if (end > sc->memlimit)
+ end = sc->memlimit;
+ } else {
+ ok = 0;
}
}
- } else if (!ok) {
- ok = 1; /* pci_allow_unsupported_ranges -> always ok */
- if (pcib_is_nonprefetch_open(sc)) {
- if (start < sc->membase)
- printf("start (%lx) < sc->membase (%x)\n",
- start, sc->membase);
- if (end > sc->memlimit)
- printf("end (%lx) > sc->memlimit (%x)\n",
- end, sc->memlimit);
+ }
+ } else if (!ok) {
+ ok = 1; /* subtractive bridge: always ok */
+ if (pcib_is_nonprefetch_open(sc)) {
+ if (start < sc->membase && end > sc->memlimit) {
+ start = sc->membase;
+ end = sc->memlimit;
}
- if (pcib_is_prefetch_open(sc)) {
- if (start < sc->pmembase)
- printf("start (%lx) < sc->pmembase (%x)\n",
- start, sc->pmembase);
- if (end > sc->pmemlimit)
- printf("end (%lx) > sc->pmemlimit (%x)\n",
- end, sc->memlimit);
+ }
+ if (pcib_is_prefetch_open(sc)) {
+ if (start < sc->pmembase && end > sc->pmemlimit) {
+ start = sc->pmembase;
+ end = sc->pmemlimit;
}
- if (end < start)
- printf("end (%lx) < start (%lx)\n", end, start);
}
}
if (end < start) {
+ device_printf(dev, "memory: end (%lx) < start (%lx)\n", end, start);
start = 0;
end = 0;
ok = 0;
}
if (!ok && bootverbose)
device_printf(dev,
- "device %s%d requested unsupported memory range "
+ "device %s requested unsupported memory range "
"0x%lx-0x%lx (decoding 0x%x-0x%x, 0x%x-0x%x)\n",
- device_get_name(child), device_get_unit(child), start,
- end, sc->membase, sc->memlimit, sc->pmembase,
+ device_get_nameunit(child), start, end,
+ sc->membase, sc->memlimit, sc->pmembase,
sc->pmemlimit);
if (!ok)
return (NULL);
if (bootverbose)
- device_printf(sc->dev,"device %s%d requested decoded memory range 0x%lx-0x%lx\n",
- device_get_name(child), device_get_unit(child), start, end);
+ device_printf(dev,"device %s requested decoded memory range 0x%lx-0x%lx\n",
+ device_get_nameunit(child), start, end);
break;
default:
==== //depot/projects/power/sys/dev/pci/pcib_private.h#3 (text+ko) ====
@@ -44,6 +44,8 @@
struct pcib_softc
{
device_t dev;
+ uint32_t flags; /* flags */
+#define PCIB_SUBTRACTIVE 0x1
uint16_t command; /* command register */
uint8_t secbus; /* secondary bus number */
uint8_t subbus; /* subordinate bus number */
==== //depot/projects/power/sys/dev/pci/pcivar.h#5 (text+ko) ====
@@ -71,6 +71,7 @@
struct device *dev; /* device which owns this */
uint32_t bar[PCI_MAXMAPS_0]; /* BARs */
+ uint32_t bios; /* BIOS mapping */
uint16_t subvendor; /* card vendor ID */
uint16_t subdevice; /* card device ID, assigned by card vendor */
==== //depot/projects/power/sys/dev/txp/3c990img.h#2 (text+ko) ====
==== //depot/projects/power/sys/dev/txp/if_txp.c#3 (text+ko) ====
@@ -226,29 +226,7 @@
mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
MTX_DEF | MTX_RECURSE);
-#ifndef BURN_BRIDGES
- /*
- * Handle power management nonsense.
- */
- if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
- u_int32_t iobase, membase, irq;
-
- /* Save important PCI config data. */
- iobase = pci_read_config(dev, TXP_PCI_LOIO, 4);
- membase = pci_read_config(dev, TXP_PCI_LOMEM, 4);
- irq = pci_read_config(dev, TXP_PCI_INTLINE, 4);
- /* Reset the power state. */
- device_printf(dev, "chip is in D%d power mode "
- "-- setting to D0\n", pci_get_powerstate(dev));
- pci_set_powerstate(dev, PCI_POWERSTATE_D0);
-
- /* Restore PCI config data. */
- pci_write_config(dev, TXP_PCI_LOIO, iobase, 4);
- pci_write_config(dev, TXP_PCI_LOMEM, membase, 4);
- pci_write_config(dev, TXP_PCI_INTLINE, irq, 4);
- }
-#endif
/*
* Map control/status registers.
*/
==== //depot/projects/power/sys/dev/txp/if_txpreg.h#2 (text+ko) ====
==== //depot/projects/power/sys/pci/agp.c#4 (text+ko) ====
==== //depot/projects/power/sys/pci/agp_ali.c#3 (text+ko) ====
==== //depot/projects/power/sys/pci/agp_amd.c#2 (text+ko) ====
==== //depot/projects/power/sys/pci/agp_i810.c#4 (text+ko) ====
==== //depot/projects/power/sys/pci/agp_if.m#2 (text+ko) ====
==== //depot/projects/power/sys/pci/agp_intel.c#3 (text+ko) ====
==== //depot/projects/power/sys/pci/agp_nvidia.c#2 (text+ko) ====
==== //depot/projects/power/sys/pci/agp_sis.c#2 (text+ko) ====
==== //depot/projects/power/sys/pci/agp_via.c#2 (text+ko) ====
==== //depot/projects/power/sys/pci/agppriv.h#2 (text+ko) ====
==== //depot/projects/power/sys/pci/agpreg.h#2 (text+ko) ====
==== //depot/projects/power/sys/pci/agpvar.h#2 (text+ko) ====
==== //depot/projects/power/sys/pci/alpm.c#2 (text+ko) ====
==== //depot/projects/power/sys/pci/amdpm.c#2 (text+ko) ====
==== //depot/projects/power/sys/pci/dc21040reg.h#2 (text+ko) ====
==== //depot/projects/power/sys/pci/if_dc.c#7 (text+ko) ====
@@ -220,9 +220,6 @@
static int dc_detach (device_t);
static int dc_suspend (device_t);
static int dc_resume (device_t);
-#ifndef BURN_BRIDGES
-static void dc_acpi (device_t);
-#endif
static struct dc_type *dc_devtype (device_t);
static int dc_newbuf (struct dc_softc *, int, int);
static int dc_encap (struct dc_softc *, struct mbuf **);
@@ -1644,35 +1641,6 @@
return (ENXIO);
}
-#ifndef BURN_BRIDGES
-static void
-dc_acpi(device_t dev)
-{
- int unit;
- u_int32_t iobase, membase, irq;
-
- unit = device_get_unit(dev);
-
- if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
- /* Save important PCI config data. */
- iobase = pci_read_config(dev, DC_PCI_CFBIO, 4);
- membase = pci_read_config(dev, DC_PCI_CFBMA, 4);
- irq = pci_read_config(dev, DC_PCI_CFIT, 4);
-
- /* Reset the power state. */
- printf("dc%d: chip is in D%d power mode "
- "-- setting to D0\n", unit,
- pci_get_powerstate(dev));
- pci_set_powerstate(dev, PCI_POWERSTATE_D0);
-
- /* Restore PCI config data. */
- pci_write_config(dev, DC_PCI_CFBIO, iobase, 4);
- pci_write_config(dev, DC_PCI_CFBMA, membase, 4);
- pci_write_config(dev, DC_PCI_CFIT, irq, 4);
- }
-}
-#endif
-
static void
dc_apply_fixup(struct dc_softc *sc, int media)
{
@@ -1890,13 +1858,8 @@
mtx_init(&sc->dc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
MTX_DEF | MTX_RECURSE);
-#ifndef BURN_BRIDGES
+
/*
- * Handle power management nonsense.
- */
- dc_acpi(dev);
-#endif
- /*
* Map control/status registers.
*/
pci_enable_busmaster(dev);
@@ -3799,13 +3762,6 @@
dc_stop(sc);
- for (i = 0; i < 5; i++)
- sc->saved_maps[i] = pci_read_config(dev, PCIR_BAR(i), 4);
- sc->saved_biosaddr = pci_read_config(dev, PCIR_BIOS, 4);
- sc->saved_intline = pci_read_config(dev, PCIR_INTLINE, 1);
- sc->saved_cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
- sc->saved_lattimer = pci_read_config(dev, PCIR_LATTIMER, 1);
-
sc->suspended = 1;
splx(s);
@@ -3828,20 +3784,6 @@
sc = device_get_softc(dev);
ifp = &sc->arpcom.ac_if;
-#ifndef BURN_BRIDGES
- dc_acpi(dev);
-#endif
- /* better way to do this? */
- for (i = 0; i < 5; i++)
- pci_write_config(dev, PCIR_BAR(i), sc->saved_maps[i], 4);
- pci_write_config(dev, PCIR_BIOS, sc->saved_biosaddr, 4);
- pci_write_config(dev, PCIR_INTLINE, sc->saved_intline, 1);
- pci_write_config(dev, PCIR_CACHELNSZ, sc->saved_cachelnsz, 1);
- pci_write_config(dev, PCIR_LATTIMER, sc->saved_lattimer, 1);
-
- /* reenable busmastering */
- pci_enable_busmaster(dev);
- pci_enable_io(dev, DC_RES);
/* reinitialize interface if necessary */
if (ifp->if_flags & IFF_UP)
==== //depot/projects/power/sys/pci/if_dcreg.h#5 (text+ko) ====
@@ -756,11 +756,6 @@
int rxcycles; /* ... when polling */
#endif
int suspended; /* 0 = normal 1 = suspended */
- u_int32_t saved_maps[5]; /* pci data */
- u_int32_t saved_biosaddr;
- u_int8_t saved_intline;
- u_int8_t saved_cachelnsz;
- u_int8_t saved_lattimer;
};
==== //depot/projects/power/sys/pci/if_de.c#3 (text+ko) ====
==== //depot/projects/power/sys/pci/if_devar.h#3 (text+ko) ====
==== //depot/projects/power/sys/pci/if_mn.c#2 (text+ko) ====
==== //depot/projects/power/sys/pci/if_pcn.c#4 (text+ko) ====
@@ -517,30 +517,7 @@
/* Initialize our mutex. */
mtx_init(&sc->pcn_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
MTX_DEF | MTX_RECURSE);
-#ifndef BURN_BRIDGES
- /*
- * Handle power management nonsense.
- */
- if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
- u_int32_t iobase, membase, irq;
- /* Save important PCI config data. */
- iobase = pci_read_config(dev, PCN_PCI_LOIO, 4);
- membase = pci_read_config(dev, PCN_PCI_LOMEM, 4);
- irq = pci_read_config(dev, PCN_PCI_INTLINE, 4);
-
- /* Reset the power state. */
- printf("pcn%d: chip is in D%d power mode "
- "-- setting to D0\n", unit,
- pci_get_powerstate(dev));
- pci_set_powerstate(dev, PCI_POWERSTATE_D0);
-
- /* Restore PCI config data. */
- pci_write_config(dev, PCN_PCI_LOIO, iobase, 4);
- pci_write_config(dev, PCN_PCI_LOMEM, membase, 4);
- pci_write_config(dev, PCN_PCI_INTLINE, irq, 4);
- }
-#endif
/*
* Map control/status registers.
*/
==== //depot/projects/power/sys/pci/if_pcnreg.h#3 (text+ko) ====
==== //depot/projects/power/sys/pci/if_rl.c#6 (text+ko) ====
@@ -915,32 +915,7 @@
mtx_init(&sc->rl_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
MTX_DEF | MTX_RECURSE);
-#ifndef BURN_BRIDGES
- /*
- * Handle power management nonsense.
- */
-
- if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
- u_int32_t iobase, membase, irq;
- /* Save important PCI config data. */
- iobase = pci_read_config(dev, RL_PCI_LOIO, 4);
- membase = pci_read_config(dev, RL_PCI_LOMEM, 4);
- irq = pci_read_config(dev, RL_PCI_INTLINE, 4);
-
- /* Reset the power state. */
- printf("rl%d: chip is is in D%d power mode "
- "-- setting to D0\n", unit,
- pci_get_powerstate(dev));
-
- pci_set_powerstate(dev, PCI_POWERSTATE_D0);
-
- /* Restore PCI config data. */
- pci_write_config(dev, RL_PCI_LOIO, iobase, 4);
- pci_write_config(dev, RL_PCI_LOMEM, membase, 4);
- pci_write_config(dev, RL_PCI_INTLINE, irq, 4);
- }
-#endif
>>> TRUNCATED FOR MAIL (1000 lines) <<<
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