PERFORCE change 44671 for review
Warner Losh
imp at FreeBSD.org
Thu Jan 1 22:02:02 PST 2004
http://perforce.freebsd.org/chv.cgi?CH=44671
Change 44671 by imp at imp_pacopaco on 2004/01/01 22:01:40
Go ahead and integrate the cardbus changes, many of which are
relevant to power.
Affected files ...
.. //depot/projects/power/sys/dev/pccbb/pccbb.c#5 integrate
.. //depot/projects/power/sys/dev/pccbb/pccbbdevid.h#2 integrate
.. //depot/projects/power/sys/dev/pccbb/pccbbreg.h#2 integrate
.. //depot/projects/power/sys/dev/pccbb/pccbbvar.h#2 integrate
Differences ...
==== //depot/projects/power/sys/dev/pccbb/pccbb.c#5 (text+ko) ====
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2002-2003 M. Warner Losh.
- * Copyright (c) 2000,2001 Jonathan Chen.
+ * Copyright (c) 2000-2001 Jonathan Chen.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -683,8 +683,9 @@
static int
cbb_attach(device_t brdev)
{
+ static int curr_bus_number = 1; /* XXX EVILE BAD (see below) */
struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(brdev);
- int rid;
+ int rid, bus;
mtx_init(&sc->mtx, device_get_nameunit(brdev), "cbb", MTX_DEF);
cv_init(&sc->cv, "cbb cv");
@@ -698,55 +699,16 @@
STAILQ_INIT(&sc->intr_handlers);
#ifndef BURN_BRIDGES
cbb_powerstate_d0(brdev);
+#endif
- /*
- * The PCI bus code should assign us memory in the absense
- * of the BIOS doing so. However, 'should' isn't 'is,' so we kludge
- * up something here until the PCI/acpi code properly assigns the
- * resource.
- */
-#endif
rid = CBBR_SOCKBASE;
sc->base_res = bus_alloc_resource(brdev, SYS_RES_MEMORY, &rid,
0, ~0, 1, RF_ACTIVE);
if (!sc->base_res) {
-#ifdef BURN_BRIDGES
device_printf(brdev, "Could not map register memory\n");
mtx_destroy(&sc->mtx);
cv_destroy(&sc->cv);
return (ENOMEM);
-#else
- uint32_t sockbase;
- /*
- * Generally, the BIOS will assign this memory for us.
- * However, newer BIOSes do not because the MS design
- * documents have mandated that this is for the OS
- * to assign rather than the BIOS. This driver shouldn't
- * be doing this, but until the pci bus code (or acpi)
- * does this, we allow CardBus bridges to work on more
- * machines.
- */
- pci_write_config(brdev, rid, 0xfffffffful, 4);
- sockbase = pci_read_config(brdev, rid, 4);
- sockbase = (sockbase & 0xfffffff0ul) &
- -(sockbase & 0xfffffff0ul);
- sc->base_res = bus_generic_alloc_resource(
- device_get_parent(brdev), brdev, SYS_RES_MEMORY,
- &rid, cbb_start_mem, ~0, sockbase,
- RF_ACTIVE | rman_make_alignment_flags(sockbase));
- if (!sc->base_res) {
- device_printf(brdev,
- "Could not grab register memory\n");
- mtx_destroy(&sc->mtx);
- cv_destroy(&sc->cv);
- return (ENOMEM);
- }
- sc->flags |= CBB_KLUDGE_ALLOC;
- pci_write_config(brdev, CBBR_SOCKBASE,
- rman_get_start(sc->base_res), 4);
- DEVPRINTF((brdev, "PCI Memory allocated: %08lx\n",
- rman_get_start(sc->base_res)));
-#endif
} else {
DEVPRINTF((brdev, "Found memory at %08lx\n",
rman_get_start(sc->base_res)));
@@ -759,6 +721,25 @@
sc->exca.chipset = EXCA_CARDBUS;
cbb_chipinit(sc);
+ /*
+ * This is a gross hack. We should be scanning the entire pci
+ * tree, assigning bus numbers in a way such that we (1) can
+ * reserve 1 extra bus just in case and (2) all sub busses
+ * are in an appropriate range.
+ */
+ bus = pci_read_config(brdev, PCIR_SECBUS_2, 1);
+ DEVPRINTF((brdev, "Secondary bus is %d\n", bus));
+ if (bus == 0) {
+ bus = curr_bus_number;
+ DEVPRINTF((brdev, "Secondary bus set to %d subbus %d\n", bus,
+ bus + 1));
+ sc->secbus = bus;
+ sc->subbus = bus + 1;
+ pci_write_config(brdev, PCIR_SECBUS_2, bus, 1);
+ pci_write_config(brdev, PCIR_SUBBUS_2, bus + 1, 1);
+ curr_bus_number += 2;
+ }
+
/* attach children */
sc->cbdev = device_add_child(brdev, "cardbus", -1);
if (sc->cbdev == NULL)
@@ -812,19 +793,13 @@
device_printf(brdev, "unable to create event thread.\n");
panic("cbb_create_event_thread");
}
-
return (0);
err:
if (sc->irq_res)
bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res);
if (sc->base_res) {
- if (sc->flags & CBB_KLUDGE_ALLOC)
- bus_generic_release_resource(device_get_parent(brdev),
- brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
- sc->base_res);
- else
- bus_release_resource(brdev, SYS_RES_MEMORY,
- CBBR_SOCKBASE, sc->base_res);
+ bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
+ sc->base_res);
}
mtx_destroy(&sc->mtx);
cv_destroy(&sc->cv);
@@ -863,12 +838,8 @@
mtx_unlock(&sc->mtx);
bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res);
- if (sc->flags & CBB_KLUDGE_ALLOC)
- bus_generic_release_resource(device_get_parent(brdev),
- brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, sc->base_res);
- else
- bus_release_resource(brdev, SYS_RES_MEMORY,
- CBBR_SOCKBASE, sc->base_res);
+ bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
+ sc->base_res);
mtx_destroy(&sc->mtx);
cv_destroy(&sc->cv);
return (0);
@@ -1124,7 +1095,6 @@
*/
sockevent = cbb_get(sc, CBB_SOCKET_EVENT);
if (sockevent != 0) {
- DPRINTF(("CBB EVENT 0x%x\n", sockevent));
/* ack the interrupt */
cbb_setb(sc, CBB_SOCKET_EVENT, sockevent);
@@ -1146,7 +1116,6 @@
cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD);
sc->flags &= ~CBB_CARD_OK;
cbb_disable_func_intr(sc);
- DPRINTF(("Waking up thread\n"));
cv_signal(&sc->cv);
mtx_unlock(&sc->mtx);
}
@@ -1340,13 +1309,17 @@
* detect the voltage for the card, and set it. Since the power
* used is the square of the voltage, lower voltages is a big win
* and what Windows does (and what Microsoft prefers). The MS paper
- * also talks about preferring the CIS entry as well.
+ * also talks about preferring the CIS entry as well. In addition,
+ * we power up with OE disabled. We'll set it later in the power
+ * up sequence.
*/
static int
cbb_do_power(device_t brdev)
{
+ struct cbb_softc *sc = device_get_softc(brdev);
int voltage;
+ exca_clrb(&sc->exca, EXCA_PWRCTL, EXCA_PWRCTL_OE);
/* Prefer lowest voltage supported */
voltage = cbb_detect_voltage(brdev);
cbb_power(brdev, CARD_OFF);
@@ -1632,6 +1605,7 @@
start = cbb_start_mem;
if (end < start)
end = start;
+ /* This is now suspect: */
if (RF_ALIGNMENT(flags) < CBB_MEMALIGN_BITS)
flags = (flags & ~RF_ALIGNMENT_MASK) |
rman_make_alignment_flags(CBB_MEMALIGN);
@@ -1956,11 +1930,14 @@
static uint32_t
cbb_read_config(device_t brdev, int b, int s, int f, int reg, int width)
{
+ uint32_t rv;
+
/*
* Pass through to the next ppb up the chain (i.e. our grandparent).
*/
- return (PCIB_READ_CONFIG(device_get_parent(device_get_parent(brdev)),
- b, s, f, reg, width));
+ rv = PCIB_READ_CONFIG(device_get_parent(device_get_parent(brdev)),
+ b, s, f, reg, width);
+ return (rv);
}
static void
==== //depot/projects/power/sys/dev/pccbb/pccbbdevid.h#2 (text+ko) ====
==== //depot/projects/power/sys/dev/pccbb/pccbbreg.h#2 (text+ko) ====
==== //depot/projects/power/sys/dev/pccbb/pccbbvar.h#2 (text+ko) ====
@@ -67,7 +67,6 @@
struct cv cv;
u_int32_t flags;
#define CBB_CARD_OK 0x08000000
-#define CBB_KLUDGE_ALLOC 0x10000000
#define CBB_16BIT_CARD 0x20000000
#define CBB_KTHREAD_RUNNING 0x40000000
#define CBB_KTHREAD_DONE 0x80000000
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