PERFORCE change 37947 for review
Peter Wemm
peter at FreeBSD.org
Thu Sep 11 16:35:23 PDT 2003
http://perforce.freebsd.org/chv.cgi?CH=37947
Change 37947 by peter at peter_work on 2003/09/11 16:34:53
tidy up some bits
Affected files ...
.. //depot/projects/hammer/sys/amd64/amd64/apic_vector.s#2 edit
.. //depot/projects/hammer/sys/amd64/amd64/mp_machdep.c#3 edit
.. //depot/projects/hammer/sys/amd64/amd64/mpboot.s#2 edit
.. //depot/projects/hammer/sys/amd64/amd64/mptable.c#3 edit
Differences ...
==== //depot/projects/hammer/sys/amd64/amd64/apic_vector.s#2 (text+ko) ====
@@ -133,15 +133,6 @@
movl $KDSEL, %eax /* Kernel data selector */
mov %ax, %ds
-#ifdef COUNT_XINVLTLB_HITS
- pushl %fs
- movl $KPSEL, %eax /* Private space selector */
- mov %ax, %fs
- movl PCPU(CPUID), %eax
- popl %fs
- incl xhits_gbl(,%eax,4)
-#endif /* COUNT_XINVLTLB_HITS */
-
movl %cr3, %eax /* invalidate the TLB */
movl %eax, %cr3
@@ -166,15 +157,6 @@
movl $KDSEL, %eax /* Kernel data selector */
mov %ax, %ds
-#ifdef COUNT_XINVLTLB_HITS
- pushl %fs
- movl $KPSEL, %eax /* Private space selector */
- mov %ax, %fs
- movl PCPU(CPUID), %eax
- popl %fs
- incl xhits_pg(,%eax,4)
-#endif /* COUNT_XINVLTLB_HITS */
-
movl smp_tlb_addr1, %eax
invlpg (%eax) /* invalidate single page */
@@ -200,15 +182,6 @@
movl $KDSEL, %eax /* Kernel data selector */
mov %ax, %ds
-#ifdef COUNT_XINVLTLB_HITS
- pushl %fs
- movl $KPSEL, %eax /* Private space selector */
- mov %ax, %fs
- movl PCPU(CPUID), %eax
- popl %fs
- incl xhits_rng(,%eax,4)
-#endif /* COUNT_XINVLTLB_HITS */
-
movl smp_tlb_addr1, %edx
movl smp_tlb_addr2, %eax
1: invlpg (%edx) /* invalidate single page */
==== //depot/projects/hammer/sys/amd64/amd64/mp_machdep.c#3 (text+ko) ====
@@ -415,9 +415,7 @@
static int
start_all_aps(u_int boot_addr)
{
-#ifndef PC98
u_char mpbiosreason;
-#endif
u_long mpbioswarmvec;
struct pcpu *pc;
char *stack;
@@ -431,10 +429,8 @@
/* save the current value of the warm-start vector */
mpbioswarmvec = *((u_long *) WARMBOOT_OFF);
-#ifndef PC98
outb(CMOS_REG, BIOS_RESET);
mpbiosreason = inb(CMOS_DATA);
-#endif
/* set up temporary P==V mapping for AP boot */
/* XXX this is a hack, we should boot the AP on its own stack/PTD */
@@ -473,10 +469,8 @@
/* setup a vector to our boot code */
*((volatile u_short *) WARMBOOT_OFF) = WARMBOOT_TARGET;
*((volatile u_short *) WARMBOOT_SEG) = (boot_addr >> 4);
-#ifndef PC98
outb(CMOS_REG, BIOS_RESET);
outb(CMOS_DATA, BIOS_WARM); /* 'warm-start' */
-#endif
bootSTK = &SMP_prvspace[apic_id].idlekstack[KSTACK_PAGES *
PAGE_SIZE];
@@ -499,10 +493,9 @@
/* restore the warmstart vector */
*(u_long *) WARMBOOT_OFF = mpbioswarmvec;
-#ifndef PC98
+
outb(CMOS_REG, BIOS_RESET);
outb(CMOS_DATA, mpbiosreason);
-#endif
/*
* Set up the idle context for the BSP. Similar to above except
@@ -661,42 +654,6 @@
return 0; /* return FAILURE */
}
-#ifdef COUNT_XINVLTLB_HITS
-u_int xhits_gbl[MAXCPU];
-u_int xhits_pg[MAXCPU];
-u_int xhits_rng[MAXCPU];
-SYSCTL_NODE(_debug, OID_AUTO, xhits, CTLFLAG_RW, 0, "");
-SYSCTL_OPAQUE(_debug_xhits, OID_AUTO, global, CTLFLAG_RW, &xhits_gbl,
- sizeof(xhits_gbl), "IU", "");
-SYSCTL_OPAQUE(_debug_xhits, OID_AUTO, page, CTLFLAG_RW, &xhits_pg,
- sizeof(xhits_pg), "IU", "");
-SYSCTL_OPAQUE(_debug_xhits, OID_AUTO, range, CTLFLAG_RW, &xhits_rng,
- sizeof(xhits_rng), "IU", "");
-
-u_int ipi_global;
-u_int ipi_page;
-u_int ipi_range;
-u_int ipi_range_size;
-SYSCTL_INT(_debug_xhits, OID_AUTO, ipi_global, CTLFLAG_RW, &ipi_global, 0, "");
-SYSCTL_INT(_debug_xhits, OID_AUTO, ipi_page, CTLFLAG_RW, &ipi_page, 0, "");
-SYSCTL_INT(_debug_xhits, OID_AUTO, ipi_range, CTLFLAG_RW, &ipi_range, 0, "");
-SYSCTL_INT(_debug_xhits, OID_AUTO, ipi_range_size, CTLFLAG_RW, &ipi_range_size,
- 0, "");
-
-u_int ipi_masked_global;
-u_int ipi_masked_page;
-u_int ipi_masked_range;
-u_int ipi_masked_range_size;
-SYSCTL_INT(_debug_xhits, OID_AUTO, ipi_masked_global, CTLFLAG_RW,
- &ipi_masked_global, 0, "");
-SYSCTL_INT(_debug_xhits, OID_AUTO, ipi_masked_page, CTLFLAG_RW,
- &ipi_masked_page, 0, "");
-SYSCTL_INT(_debug_xhits, OID_AUTO, ipi_masked_range, CTLFLAG_RW,
- &ipi_masked_range, 0, "");
-SYSCTL_INT(_debug_xhits, OID_AUTO, ipi_masked_range_size, CTLFLAG_RW,
- &ipi_masked_range_size, 0, "");
-#endif /* COUNT_XINVLTLB_HITS */
-
/*
* Flush the TLB on all other CPU's
*/
@@ -803,69 +760,49 @@
void
smp_invltlb(void)
{
- if (smp_started) {
+
+ if (smp_started)
smp_tlb_shootdown(IPI_INVLTLB, 0, 0);
-#ifdef COUNT_XINVLTLB_HITS
- ipi_global++;
-#endif
- }
}
void
smp_invlpg(vm_offset_t addr)
{
- if (smp_started) {
+
+ if (smp_started)
smp_tlb_shootdown(IPI_INVLPG, addr, 0);
-#ifdef COUNT_XINVLTLB_HITS
- ipi_page++;
-#endif
- }
}
void
smp_invlpg_range(vm_offset_t addr1, vm_offset_t addr2)
{
- if (smp_started) {
+
+ if (smp_started)
smp_tlb_shootdown(IPI_INVLRNG, addr1, addr2);
-#ifdef COUNT_XINVLTLB_HITS
- ipi_range++;
- ipi_range_size += (addr2 - addr1) / PAGE_SIZE;
-#endif
- }
}
void
smp_masked_invltlb(u_int mask)
{
- if (smp_started) {
+
+ if (smp_started)
smp_targeted_tlb_shootdown(mask, IPI_INVLTLB, 0, 0);
-#ifdef COUNT_XINVLTLB_HITS
- ipi_masked_global++;
-#endif
- }
}
void
smp_masked_invlpg(u_int mask, vm_offset_t addr)
{
- if (smp_started) {
+
+ if (smp_started)
smp_targeted_tlb_shootdown(mask, IPI_INVLPG, addr, 0);
-#ifdef COUNT_XINVLTLB_HITS
- ipi_masked_page++;
-#endif
- }
}
void
smp_masked_invlpg_range(u_int mask, vm_offset_t addr1, vm_offset_t addr2)
{
- if (smp_started) {
+
+ if (smp_started)
smp_targeted_tlb_shootdown(mask, IPI_INVLRNG, addr1, addr2);
-#ifdef COUNT_XINVLTLB_HITS
- ipi_masked_range++;
- ipi_masked_range_size += (addr2 - addr1) / PAGE_SIZE;
-#endif
- }
}
@@ -884,10 +821,6 @@
/* BSP may have changed PTD while we were waiting */
invltlb();
-#if defined(I586_CPU) && !defined(NO_F00F_HACK)
- lidt(&r_idt);
-#endif
-
/* set up CPU registers and state */
cpu_setregs();
@@ -902,7 +835,6 @@
printf("SMP: cpuid = %d\n", PCPU_GET(cpuid));
printf("SMP: actual apic_id = %d\n", lapic_id());
printf("SMP: correct apic_id = %d\n", PCPU_GET(apic_id));
- printf("PTD[MPPTDI] = %#jx\n", (uintmax_t)PTD[MPPTDI]);
panic("cpuid mismatch! boom!!");
}
==== //depot/projects/hammer/sys/amd64/amd64/mpboot.s#2 (text+ko) ====
@@ -45,38 +45,11 @@
#define R(x) ((x)-KERNBASE)
/*
- * this code MUST be enabled here and in mp_machdep.c
- * it follows the very early stages of AP boot by placing values in CMOS ram.
- * it NORMALLY will never be needed and thus the primitive method for enabling.
- *
-#define CHECK_POINTS
- */
-
-#if defined(CHECK_POINTS) && !defined(PC98)
-
-#define CMOS_REG (0x70)
-#define CMOS_DATA (0x71)
-
-#define CHECKPOINT(A,D) \
- movb $(A),%al ; \
- outb %al,$CMOS_REG ; \
- movb $(D),%al ; \
- outb %al,$CMOS_DATA
-
-#else
-
-#define CHECKPOINT(A,D)
-
-#endif /* CHECK_POINTS */
-
-
-/*
* the APs enter here from their trampoline code (bootMP, below)
*/
.p2align 4
NON_GPROF_ENTRY(MPentry)
- CHECKPOINT(0x36, 3)
/*
* Enable features on this processor. We don't support SMP on
* CPUs older than a Pentium, so we know that we can use the cpuid
@@ -85,35 +58,14 @@
movl $1,%eax
cpuid /* Retrieve features */
movl %cr4,%eax
-#ifndef DISABLE_PSE
- testl $CPUID_PSE,%edx
- jz 1f
orl $CR4_PSE,%eax /* Enable PSE */
-1:
-#endif
-#ifndef DISABLE_PG_G
- testl $CPUID_PGE,%edx
- jz 1f
orl $CR4_PGE,%eax /* Enable PGE */
-1:
-#endif
- testl $CPUID_VME,%edx
- jz 1f
- orl $CR4_VME,%eax /* Enable VME */
-1:
+ orl $CR4_PAE, %eax
movl %eax,%cr4
/* Now enable paging mode */
-#ifdef PAE
movl R(IdlePDPT), %eax
movl %eax, %cr3
- movl %cr4, %eax
- orl $CR4_PAE, %eax
- movl %eax, %cr4
-#else
- movl R(IdlePTD), %eax
- movl %eax,%cr3
-#endif
movl %cr0,%eax
orl $CR0_PE|CR0_PG,%eax /* enable paging */
movl %eax,%cr0 /* let the games begin! */
@@ -126,9 +78,7 @@
* Wait for the booting CPU to signal startup
*/
mp_begin: /* now running relocated at KERNBASE */
- CHECKPOINT(0x37, 4)
call init_secondary /* load i386 tables */
- CHECKPOINT(0x38, 5)
/* disable the APIC, just to be SURE */
movl lapic, %edx
@@ -139,8 +89,6 @@
/* signal our startup to the BSP */
incl mp_naps /* signal BSP */
- CHECKPOINT(0x39, 6)
-
/* Now, let's prepare for some REAL WORK :-) This doesn't return. */
call ap_init
@@ -161,7 +109,6 @@
NON_GPROF_ENTRY(bootMP)
.code16
cli
- CHECKPOINT(0x34, 1)
/* First guarantee a 'clean slate' */
xorl %eax, %eax
movl %eax, %ebx
@@ -197,7 +144,6 @@
.code32
protmode:
- CHECKPOINT(0x35, 2)
/*
* we are NOW running for the first time with %eip
==== //depot/projects/hammer/sys/amd64/amd64/mptable.c#3 (text+ko) ====
@@ -55,13 +55,8 @@
#define NAPICID 16 /* Max number of I/O APIC's */
-#ifdef PC98
-#define BIOS_BASE (0xe8000)
-#define BIOS_SIZE (0x18000)
-#else
#define BIOS_BASE (0xf0000)
#define BIOS_SIZE (0x10000)
-#endif
#define BIOS_COUNT (BIOS_SIZE/4)
typedef void mptable_entry_handler(u_char *entry, void *arg);
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