PERFORCE change 37473 for review
Marcel Moolenaar
marcel at FreeBSD.org
Wed Sep 3 20:48:59 PDT 2003
http://perforce.freebsd.org/chv.cgi?CH=37473
Change 37473 by marcel at marcel_nfs on 2003/09/03 20:48:26
o Initialize the channel with flow control disabled. We
accidentally had output flow control enabled.
o The state of DSR is inverted. Just like all the other
signals. We normally don't do anything with DSR, but
uarttest.c displays all signals and it invalidly
reported DSR deasserted when my break-out box was
red in the face telling me otherwise.
o Implement the UART_IOCTL_IFLOW and UART_IOCTL_OFLOW
requests. Version 3.x of the chip supports both RTS
and CTS based flow control. I haven't been able to
test this properly yet. I need to change uarttest.c
to work on different computers so that I have better
odds to cause near overflow conditions.
o Set sc_hwiflow and sc_hwoflow if we have a version 3.x
chip. If we don't know the version, we don't set HW
flow control capabilities. This is to be on the safe
side.
Affected files ...
.. //depot/projects/uart/dev/uart/uart_dev_sab82532.c#21 edit
Differences ...
==== //depot/projects/uart/dev/uart/uart_dev_sab82532.c#21 (text+ko) ====
@@ -239,7 +239,7 @@
uart_barrier(bas);
uart_setreg(bas, SAB_CCR4, SAB_CCR4_MCK4|SAB_CCR4_EBRG|SAB_CCR4_ICD);
uart_barrier(bas);
- uart_setreg(bas, SAB_MODE, SAB_MODE_RTS|SAB_MODE_RAC);
+ uart_setreg(bas, SAB_MODE, SAB_MODE_FCTS|SAB_MODE_RTS|SAB_MODE_RAC);
uart_barrier(bas);
uart_setreg(bas, SAB_RFC, SAB_RFC_DPS|SAB_RFC_RFDF|
SAB_RFC_RFTH_32CHAR);
@@ -440,7 +440,7 @@
SIGCHG(vstr & SAB_VSTR_CD, sig, UART_SIG_DCD, UART_SIG_DDCD);
pvr = uart_getreg(bas, SAB_PVR);
pvr &= (IS_CHANNEL_A(bas)) ? SAB_PVR_DSR_A : SAB_PVR_DSR_B;
- SIGCHG(pvr, sig, UART_SIG_DSR, UART_SIG_DDSR);
+ SIGCHG(~pvr, sig, UART_SIG_DSR, UART_SIG_DDSR);
sc->sc_hwsig = sig & ~UART_SIGMASK_DELTA;
return (sig);
}
@@ -449,7 +449,7 @@
sab82532_bus_ioctl(struct uart_softc *sc, int request, intptr_t data)
{
struct uart_bas *bas;
- uint8_t dafo;
+ uint8_t dafo, mode;
bas = &sc->sc_bas;
switch (request) {
@@ -462,6 +462,27 @@
uart_setreg(bas, SAB_DAFO, dafo);
uart_barrier(bas);
break;
+ case UART_IOCTL_IFLOW:
+ mode = uart_getreg(bas, SAB_MODE);
+ if (data) {
+ mode &= ~SAB_MODE_RTS;
+ mode |= SAB_MODE_FRTS;
+ } else {
+ mode |= SAB_MODE_RTS;
+ mode &= ~SAB_MODE_FRTS;
+ }
+ uart_setreg(bas, SAB_MODE, mode);
+ uart_barrier(bas);
+ break;
+ case UART_IOCTL_OFLOW:
+ mode = uart_getreg(bas, SAB_MODE);
+ if (data)
+ mode &= ~SAB_MODE_FCTS;
+ else
+ mode |= SAB_MODE_FCTS;
+ uart_setreg(bas, SAB_MODE, mode);
+ uart_barrier(bas);
+ break;
default:
return (EINVAL);
}
@@ -527,10 +548,20 @@
ch = IS_CHANNEL_A(&sc->sc_bas) ? "A" : "B";
switch (uart_getreg(&sc->sc_bas, SAB_VSTR) & SAB_VSTR_VMASK) {
- case SAB_VSTR_V_1: vstr = "v1"; break;
- case SAB_VSTR_V_2: vstr = "v2"; break;
- case SAB_VSTR_V_32: vstr = "v3.2"; break;
- default: vstr = "v4?"; break;
+ case SAB_VSTR_V_1:
+ vstr = "v1";
+ break;
+ case SAB_VSTR_V_2:
+ vstr = "v2";
+ break;
+ case SAB_VSTR_V_32:
+ vstr = "v3.2";
+ sc->sc_hwiflow = 1;
+ sc->sc_hwoflow = 1;
+ break;
+ default:
+ vstr = "v4?";
+ break;
}
snprintf(buf, sizeof(buf), "SAB 82532 %s, channel %s", vstr, ch);
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