PERFORCE change 42021 for review
Peter Wemm
peter at FreeBSD.org
Tue Nov 11 12:04:59 PST 2003
http://perforce.freebsd.org/chv.cgi?CH=42021
Change 42021 by peter at peter_daintree on 2003/11/11 12:04:48
integrate -I -b smp_hammer
Affected files ...
.. //depot/projects/hammer/sys/amd64/acpica/madt.c#15 integrate
.. //depot/projects/hammer/sys/amd64/amd64/mp_machdep.c#26 integrate
.. //depot/projects/hammer/sys/amd64/amd64/mptable.c#10 integrate
Differences ...
==== //depot/projects/hammer/sys/amd64/acpica/madt.c#15 (text+ko) ====
@@ -28,7 +28,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/i386/acpica/madt.c,v 1.4 2003/11/06 14:47:53 jhb Exp $");
+__FBSDID("$FreeBSD: src/sys/i386/acpica/madt.c,v 1.6 2003/11/11 18:20:10 jhb Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -55,8 +55,8 @@
#define bootverbose 1 /* XXX debugging */
-#define NIOAPICS 16 /* Max number of I/O APICs */
-#define NLAPICS 16 /* Max number of local APICs */
+#define NIOAPICS 32 /* Max number of I/O APICs */
+#define NLAPICS 32 /* Max number of local APICs */
typedef void madt_entry_handler(APIC_HEADER *entry, void *arg);
@@ -540,7 +540,12 @@
}
if (intr->Source != intr->GlobalSystemInterrupt) {
- ioapic_remap_vector(new_ioapic, new_pin, intr->Source);
+ /* XXX: This assumes that the SCI uses IRQ 9. */
+ if (intr->GlobalSystemInterrupt > 15 && intr->Source == 9)
+ acpi_OverrideInterruptLevel(
+ intr->GlobalSystemInterrupt);
+ else
+ ioapic_remap_vector(new_ioapic, new_pin, intr->Source);
if (madt_find_interrupt(intr->Source, &old_ioapic,
&old_pin) != 0)
printf("MADT: Could not find APIC for source IRQ %d\n",
==== //depot/projects/hammer/sys/amd64/amd64/mp_machdep.c#26 (text+ko) ====
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/i386/i386/mp_machdep.c,v 1.221 2003/11/06 01:24:25 peter Exp $");
+__FBSDID("$FreeBSD: src/sys/i386/i386/mp_machdep.c,v 1.223 2003/11/11 17:16:15 jhb Exp $");
#include "opt_cpu.h"
#include "opt_kstack_pages.h"
@@ -137,7 +137,7 @@
static void release_aps(void *dummy);
static int hlt_cpus_mask;
-static int hlt_logical_cpus = 1;
+static int hlt_logical_cpus;
static struct sysctl_ctx_list logical_cpu_clist;
static u_int bootMP_size;
@@ -149,7 +149,7 @@
{
bootMP_size = mptramp_end - mptramp_start;
- boot_address = basemem & ~PAGE_MASK; /* round down to 4k boundary */
+ boot_address = trunc_page(basemem); /* round down to 4k boundary */
if ((basemem - boot_address) < bootMP_size)
boot_address -= PAGE_SIZE; /* not enough, lower by 4k */
/* 3 levels of page table pages */
@@ -451,7 +451,7 @@
* start each AP in our list
*/
static int
-start_all_aps()
+start_all_aps(void)
{
u_char mpbiosreason;
u_int32_t mpbioswarmvec;
==== //depot/projects/hammer/sys/amd64/amd64/mptable.c#10 (text+ko) ====
@@ -25,8 +25,9 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/i386/i386/mptable.c,v 1.222 2003/11/05 23:15:52 jhb Exp $");
+__FBSDID("$FreeBSD: src/sys/i386/i386/mptable.c,v 1.224 2003/11/11 17:14:26 jhb Exp $");
+#include "opt_mptable_force_htt.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
@@ -54,7 +55,7 @@
/* string defined by the Intel MP Spec as identifying the MP table */
#define MP_SIG 0x5f504d5f /* _MP_ */
-#define NAPICID 16 /* Max number of I/O APIC's */
+#define NAPICID 32 /* Max number of I/O APIC's */
#define BIOS_BASE (0xf0000)
#define BIOS_SIZE (0x10000)
@@ -154,7 +155,9 @@
static int lookup_bus_type(char *name);
static void mptable_count_items(void);
static void mptable_count_items_handler(u_char *entry, void *arg);
+#ifdef MPTABLE_FORCE_HTT
static void mptable_hyperthread_fixup(u_int id_mask);
+#endif
static void mptable_parse_apics_and_busses(void);
static void mptable_parse_apics_and_busses_handler(u_char *entry,
void *arg);
@@ -292,7 +295,9 @@
} else {
cpu_mask = 0;
mptable_walk_table(mptable_probe_cpus_handler, &cpu_mask);
+#ifdef MPTABLE_FORCE_HTT
mptable_hyperthread_fixup(cpu_mask);
+#endif
}
return (0);
}
@@ -776,6 +781,7 @@
mptable_walk_table(mptable_parse_ints_handler, NULL);
}
+#ifdef MPTABLE_FORCE_HTT
/*
* Perform a hyperthreading "fix-up" to enumerate any logical CPU's
* that aren't already listed in the table.
@@ -832,6 +838,7 @@
id_mask &= ~(1 << id);
}
}
+#endif /* MPTABLE_FORCE_HTT */
/*
* Support code for routing PCI interrupts using the MP Table.
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