PERFORCE change 31874 for review

[Juli Mallett]

http://perforce.freebsd.org/chv.cgi?CH=31874

Change 31874 by jmallett at jmallett_dalek on 2003/05/25 15:54:43

	Nuke functions that have been replaced by <machine/cpufunc.h>
	stuff, since they're only meant for C anyway.

Affected files ...

.. //depot/projects/mips/sys/mips/mips/locore_mips3.S#9 edit

Differences ...

==== //depot/projects/mips/sys/mips/mips/locore_mips3.S#9 (text+ko) ====

@@ -125,82 +125,6 @@
 
 	.text
 
-/*----------------------------------------------------------------------------
- *
- * mips3_wbflush --
- *
- *	Return when the write buffer is empty.
- *
- *	Common for all MIPS3 and greater ISAs
- *
- * Results:
- *	None.
- *
- * Side effects:
- *	None.
- *
- *----------------------------------------------------------------------------
- */
-LEAF(mips3_wbflush)
-XLEAF(mips5900_wbflush)
-XLEAF(mips32_wbflush)
-XLEAF(mips64_wbflush)
-	nop
-	sync
-	j	ra
-	nop
-END(mips3_wbflush)
-
-/*
- * u_int32_t mips3_cp0_compare_read(void)
- *
- *	Return the current value of the CP0 Compare register.
- */
-LEAF(mips3_cp0_compare_read)
-	mfc0	v0, MIPS_COP_0_COMPARE
-	j	ra
-	nop
-END(mips3_cp0_compare_read)
-
-/*
- * void mips3_cp0_compare_write(u_int32_t)
- *
- *	Set the value of the CP0 Compare register.
- */
-LEAF(mips3_cp0_compare_write)
-	mtc0	a0, MIPS_COP_0_COMPARE
-	COP0_SYNC
-	nop
-	nop
-	j	ra
-	nop
-END(mips3_cp0_compare_write)
-
-/*
- * u_int32_t mips3_cp0_config_read(void)
- *
- *	Return the current value of the CP0 Config register.
- */
-LEAF(mips3_cp0_config_read)
-	mfc0	v0, MIPS_COP_0_CONFIG
-	j	ra
-	nop
-END(mips3_cp0_config_read)
-
-/*
- * void mips3_cp0_config_write(u_int32_t)
- *
- *	Set the value of the CP0 Config register.
- */
-LEAF(mips3_cp0_config_write)
-	mtc0	a0, MIPS_COP_0_CONFIG
-	COP0_SYNC
-	nop
-	nop
-	j	ra
-	nop
-END(mips3_cp0_config_write)
-
 /*
  * u_int32_t mipsNN_cp0_config1_read(void)
  *
@@ -258,114 +182,6 @@
 	.set pop
 END(mipsNN_cp0_config3_read)
 
-/*
- * u_int32_t mips3_cp0_count_read(void)
- *
- *	Return the current value of the CP0 Count register.
- */
-LEAF(mips3_cp0_count_read)
-	mfc0	v0, MIPS_COP_0_COUNT
-	j	ra
-	nop
-END(mips3_cp0_count_read)
-
-/*
- * void mips3_cp0_count_write(u_int32_t)
- *
- *	Set the value of the CP0 Count register.
- */
-LEAF(mips3_cp0_count_write)
-	mtc0	a0, MIPS_COP_0_COUNT
-	COP0_SYNC
-	nop
-	nop
-	j	ra
-	nop
-END(mips3_cp0_count_write)
-
-/*
- * u_int32_t mips3_cp0_wired_read(void)
- *
- *	Return the current value of the CP0 Wired register.
- */
-LEAF(mips3_cp0_wired_read)
-	mfc0	v0, MIPS_COP_0_TLB_WIRED
-	j	ra
-	nop
-END(mips3_cp0_wired_read)
-
-/*
- * void mips3_cp0_wired_write(u_int32_t)
- *
- *	Set the value of the CP0 Wired register.
- */
-LEAF(mips3_cp0_wired_write)
-	mtc0	a0, MIPS_COP_0_TLB_WIRED
-	COP0_SYNC
-	nop
-	nop
-	j	ra
-	nop
-END(mips3_cp0_wired_write)
-
-/*
- * u_int32_t mips_cp0_cause_read(void)
- *
- *	Return the current value of the CP0 Cause register.
- *
- *	Note: Not profiled, skews CPU-clock measurement (mips_mcclock.c)
- *	to uselessness.
- */
-LEAF(mips_cp0_cause_read)
-	mfc0	v0, MIPS_COP_0_CAUSE
-	j	ra
-	nop
-END(mips_cp0_cause_read)
-
-/*
- * void mips_cp0_cause_write(u_int32_t)
- *
- *	Set the value of the CP0 Cause register.
- */
-LEAF(mips_cp0_cause_write)
-	mtc0	a0, MIPS_COP_0_CAUSE
-	COP0_SYNC
-	nop
-	nop
-	j	ra
-	nop
-END(mips_cp0_cause_write)
-
-
-/*
- * u_int32_t mips_cp0_status_read(void)
- *
- *	Return the current value of the CP0 Status register.
- */
-LEAF(mips_cp0_status_read)
-	mfc0	v0, MIPS_COP_0_STATUS
-	j	ra
-	nop
-END(mips_cp0_status_read)
-
-/*
- * void mips_cp0_status_write(u_int32_t)
- *
- *	Set the value of the CP0 Status register.
- *
- *	Note: This is almost certainly not the way you want to write a
- *	"permanent" value to to the CP0 Status register, since it gets
- *	saved in trap frames and restores.
- */
-LEAF(mips_cp0_status_write)
-	mtc0	a0, MIPS_COP_0_STATUS
-	COP0_SYNC
-	nop
-	nop
-	j	ra
-	nop
-END(mips_cp0_status_write)
-
 LEAF(mips_wait_idle)
 	j	mips_maybewait_idle
 	li	t1, 1