PERFORCE change 29773 for review

[Marcel Moolenaar]

http://perforce.freebsd.org/chv.cgi?CH=29773

Change 29773 by marcel at marcel_nfs on 2003/04/25 22:51:52

	Implement the signal trampoline for EPC syscalls. While here,
	make sure we preserve the stacked registers passed to us.
	That way we can more easily restart the system call.
	
	Note that we change the previous frame marker in the trapframe
	to mark all registers as locals. This will force all registers
	to be loaded from the backing store after sigreturn(). This
	mimics the behaviour of an interrupt return.

Affected files ...

.. //depot/projects/ia64_epc/sys/ia64/ia64/syscall.s#11 edit

Differences ...

==== //depot/projects/ia64_epc/sys/ia64/ia64/syscall.s#11 (text+ko) ====

@@ -158,8 +158,65 @@
 END(break_sigtramp)
 
 ENTRY(epc_sigtramp, 0)
-	break		0x80100
+{	.mib
+	mov		ar.rsc=0
+	cmp.ne		p15,p0=0,gp
+	cover
+	;;
+}
+{	.mmi
+	flushrs
+(p15)	invala
+	add		r16=16+UC_MCONTEXT+MC_SPECIAL,sp
+	;;
+}
+{	.mmi
+	mov		r17=ar.bsp
+	mov		r18=ar.rnat
+	add		r14=32,r16
+	;;
+}
+{	.mmi
+(p15)	mov		ar.bspstore=gp
+	ld8		r19=[r14],8
+	add		r15=48,r16
+	;;
+}
+{	.mmi
+	st8		[r14]=r17,64		// bspstore
+	st8		[r15]=r18,-16		// rnat
+	dep		r19=r19,r19,7,7
+	;;
+}
+{	.mmi
+	st8		[r14]=r0		// ndirty
+	st8		[r15]=r19		// pfs
+	nop		0
+	;;
+}
+{	.mmi
+	alloc		r14=ar.pfs, 0, 0, 3, 0
+	mov		ar.rsc=15
+	mov		out0=r8
+	;;
+}
+{	.mmi
+	ld8		r16=[r10],8		// function address
+	;;
+	ld8		gp=[r10]		// function's gp value
+	mov		b7=r16
+	;;
+}
+{	.mib
+	mov		out1=r9
+	add		out2=16,sp
+	br.call.sptk	rp=b7
 	;;
+}
+	add		out0=16,sp
+	CALLSYS_NOERROR(sigreturn)
+	mov		out0=ret0
+	CALLSYS_NOERROR(exit)
 END(epc_sigtramp)
 
 	.align		PAGE_SIZE
@@ -264,45 +321,45 @@
 	;;
 }
 {	.mmi
+	alloc		r14=ar.pfs,8,0,3,0
 	st8		[r30]=r8,16		// syscall number (=r15)
-	.mem.offset	0,0
-	st8.spill	[r31]=r32,16		// arg0 (=r16)
 	nop		0
 	;;
 }
 {	.mmi
+	.mem.offset	0,0
+	st8.spill	[r31]=in0,16		// arg0 (=r16)
 	.mem.offset	8,0
-	st8.spill	[r30]=r33,16		// arg1 (=r17)
-	.mem.offset	16,0
-	st8.spill	[r31]=r34,16		// arg2 (=r18)
+	st8.spill	[r30]=in1,16		// arg1 (=r17)
 	nop		0
 	;;
 }
 {	.mmi
+	.mem.offset	16,0
+	st8.spill	[r31]=in2,16		// arg2 (=r18)
 	.mem.offset	24,0
-	st8.spill	[r30]=r35,16		// arg3 (=r19)
-	.mem.offset	32,0
-	st8.spill	[r31]=r36,16		// arg4 (=r20)
+	st8.spill	[r30]=in3,16		// arg3 (=r19)
 	nop		0
 	;;
 }
 {	.mmi
+	.mem.offset	32,0
+	st8.spill	[r31]=in4,16		// arg4 (=r20)
 	.mem.offset	40,0
-	st8.spill	[r30]=r37,16		// arg5 (=r21)
-	.mem.offset	48,0
-	st8.spill	[r31]=r38,16		// arg6 (=r22)
+	st8.spill	[r30]=in5,16		// arg5 (=r21)
 	nop		0
 	;;
 }
 {	.mmi
+	.mem.offset	48,0
+	st8.spill	[r31]=in6,16		// arg6 (=r22)
 	.mem.offset	56,0
-	st8.spill	[r30]=r39,8		// arg7 (=r23)
-	ssm		psr.dfh|psr.ac
+	st8.spill	[r30]=in7,8		// arg7 (=r23)
 	nop		0
 	;;
 }
 {	.mlx
-	alloc		r14=ar.pfs,0,0,3,0
+	ssm		psr.dfh|psr.ac
 	movl		gp=__gp
 	;;
 }