EHCI on armv6 with Write-Back caches

[Warner Losh]

On Dec 18, 2012, at 1:22 AM, Hans Petter Selasky wrote:

> On Tuesday 18 December 2012 08:49:31 Andrew Turner wrote:
>> Hello,
>> 
>> Oleksandr and myself have been looking into why when we enable the
>> write-back cache on the PandaBoard there are kernel panics with USB. We
>> have tracked it down to an issue appending the ehci_qh_t to the list at
>> the end of ehci_setup_standard_chain().
>> 
>> I have a patch at [1] that allows me to run sha256 on a 40MB file over
>> NSF using the built in smsc USB ethernet chip. The problem is I have
>> had to place a call to DELAY before EHCI_APPEND_QH. This is obviously
>> not the correct solution.
>> 
>> Is anyone able to help me narrow down what is missing? It appears to be
>> a missing cache invalidate or flush somewhere but I haven't been able
>> to track down what cache function the DELAY is working around.
>> 
>> Andrew
>> 
>> [1] http://fubar.geek.nz/files/freebsd/ehci_4.diff
> 
> Hi,
> 
> Can you dump the DMA tag belonging to the QH via and check wether it is mapped 
> coherent or not. Thes QH- and TD- structures should not be cache mapped. Else 
> cache has not been disabled on those pages.

busdma doesn't work that way.  The coherent flag is just a hint....

Warner

> qh->page_cache->tag
> 
> --HPS
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