AHCI Patsburg SATA controller and slow transfer speed
Jeremy Chadwick
jdc at koitsu.org
Fri Jun 28 04:03:38 UTC 2013
On Thu, Jun 27, 2013 at 06:38:27PM -0700, Jeremy Chadwick wrote:
> Next, this statement by ahci(4) then confuses the user:
>
> > ahci0: AHCI v1.30 with 6 6Gbps ports, Port Multiplier not supported
>
> You see, when AHCI was invented, the existing idea was that all ports
> would have the same speed (and that was the case at the time). Only
> somewhat recently have some vendors begun to mix-match speeds on the
> same controller -- like this one.
>
> The AHCI specification probably (I have not read it even recently) only
> provides a number indicating "the total number of ports" followed by a
> single number indicating "the speed".
>
> There may be support somewhere within AHCI to provide an updated way to
> get more granular information, but I do not know if that's the case.
>
> If there is, FreeBSD's ahci(4) driver does not support such at this
> time (see sys/dev/ahci/ahci.c around line 502 for the device_printf()
> call and what the arguments are (specifically AHCI_CAP_ISS and
> AHCI_CAP_NPMASK)).
Just a technical follow-up:
I spent some time this evening looking at AHCI specification 1.30. I'll
try to explain the situation.
First, at the HBA level (meaning the entire AHCI controller):
Bits 23-30 of CAP (reg. offset 0x00): Interface Speed Support (ISS).
This indicates, quote, "the maximum speed the HBA can support on its
ports".
Next, on a per-port basis, there are two registers available relating to
speed: one indicates speed, the other controls/limits speed:
1) Bits 7-4 of PxSSTS (reg. offset 0x28): SPD: Port x Serial ATA Status
(SCR0: SStatus). This indicates, quote, "the negotiated interface
speed".
2) Bits 7-4 of PxSCTL (reg. offset 0x2c): SPD: Port x Serial ATA Control
(SCR2: SControl). The register controls, quote, "the highest allowable
speed of the interface". The bit definitions indicate a way to limit
the speed of a port and do not indicate capability.
The actual 1.30 specification even has a section (10.5) on this whole
ordeal, which states clearly, quote:
====
10.5 Interface Speed Support
The HBA indicates the maximum speed it can support via the CAP.ISS
register. Software can further limit the speed of a port by manipulating
each port's PxSCTL.SPD field to a lower value.
====
AHCI spec "proposal" 1.31 also does not address/cover this (all that
adds is per-port sleep capabilities).
I will point out that SATA600 is not officially mentioned in any spec at
this time (that I can get my hands on), so what all the OSes run off of
are educated assumptions. :-) But theoretically, a newer AHCI spec
could support per-port maximum speed indication.
It's not easy to phrase all this tersely in a single device_printf(),
and there has already been opposition to adding printing of more lines
to the existing drivers/in dmesg (meaning, printing 6 lines, one for
each port, indicating active speed + maximum speed, would probably be
looked down upon outside of verbose booting). The best I can come up
with is this:
ahci0: AHCI v1.30, 6 ports, maximum 6Gbps, Port Multiplier not supported
...which is better, but could still be interpreted as "6 ports
with a maximum of 6Gbps per port".
Hope this sheds light in some way or another.
--
| Jeremy Chadwick jdc at koitsu.org |
| UNIX Systems Administrator http://jdc.koitsu.org/ |
| Making life hard for others since 1977. PGP 4BD6C0CB |
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