OFW_NEWPCI dmesg diffs

[Marcel Moolenaar]

On Tue, Jul 01, 2003 at 09:09:28PM -0700, John-Mark Gurney wrote:
> 
> But, I the problem is that both soft interrupts and vector interrupts
> are useful to know.  All vector interrupts are dispatched via soft
> interrupts, so if we count both, the interrupt count is double.  We
> need soft interrupts if we want to see the clock ticking.
*snip*
> notice that ithrd is equal to gem0 + gem1 + atapci0.  pil is the
> priority interrupt level (aka soft interrupts).
> 
> Comments?  Do we count both? or not include soft interrupts? or not
> include the ithrd pil?

I don't know enough about sparc, but can't you count clock interrupts
in tick_hardclock() and not count soft interrupts at all?

-- 
 Marcel Moolenaar	  USPA: A-39004		 marcel at xcllnt.net