On 6/5/2010 7:50 PM, Ståle Kristoffersen wrote: > On 2010-06-05 at 19:28, Matthew Jacob wrote: > >> Okay, good, my best guess is that that SATA signals past the STP bridge >> got jammed up and a PHY reset was issued by the firmware. >> > How can I debug that further? > > Is it necessary to track further if all is okay after the first reset?