STABLE regression with AIC-7902 controller.

[Steve Grandi]

I have a Supermicro SuperServer 6013P-8 system which features a X5DPR-8G2
motherboard with embedded Adaptec AIC-7902 dual-Ultra320 SCSI controller.

Said system boots and runs fine with 4.8-RELEASE (with a slight cosmetic
problem during boot that can be cured by building a kernel without eisa
support).  With STABLE (as of 19 June) the system locks up hard (no
response to the keboard) during the boot.

The last messages to appear on the console screen before the hang (with
boot_verbose set) are the following:

(ahd0:A:1:0): Sending PPR bus_width 1, period 8, offset 7f, ppr_options bf
(ahd0:A:1:0): Received PPR width 1, period 8, offset 3f,options bf
        Filtered to width 1, period 8, offset 3f, options bf
ahd0: target 1 using 16bit transfers
ahd0: target 1 synchronous with period = 0x8, offset = 0x3f(RDSTRM|DT|IU|QAS)

As far as I can tell, until this point, the messages on the console are
the same in an unsuccessful STABLE boot and a successful 4.8-Release boot.

-- 
Steve Grandi
National Optical Astronomy Observatory/AURA Inc., Tucson AZ USA
Internet: grandi at noao.edu  Voice: +1 520 318-8228  FAX: +1 520 318-8360