(very OT) Ideal partition schemes (history of partitioning)

[Doug Hardie]

> On 30 August 2020, at 07:35, Valeri Galtsev <galtsev at kicp.uchicago.edu> wrote:
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> Thank you, Doug. You induced my refreshing of memory, and also showed that I didn’t describe clear enough that BESM-6 instruction set. I have my post above for convenience. That BESM-6 machine has instruction set with three operands, and all of three operands can be addresses in memory. But in general 3 operand instruction set can have only one or two operands as memory addresses, the rest can be registers. I looked on wikipedia (I assume, the following is what you referred to):
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> https://en.wikipedia.org/wiki/Instruction_set_architecture
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> and of all 3-oprand instruction sets it was only one: CISC by IBM that affors all three operands be adresses in memory (alas, reference to it given on wikipedia doesn’t seem to exist).

I understood your first statement perfectly.  I didn't have the time to check out each of those architectures to ensure all three were addresses.  Back in 65, my one and only computer class, we were shown 1, 2, and 3 address architectures.  I don't know, or remember, if there were actual examples of the 3 address architecture.  It may have been theoretical.  A quick check through the texts I have remaining from then doesn't show any examples.  Virtually everything was based on single address machines.  However, the only machine I had any real access to was a 2 address machine.

-- Doug