(very OT) Ideal partition schemes (history of partitioning)

[Doug Hardie]

-- Doug

> On 29 August 2020, at 20:00, Valeri Galtsev <galtsev at kicp.uchicago.edu> wrote:
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> I really hope, someone mentions other machines with 3 address command system, I really would like to know if the existed. Except BESM-6 which was built of bipolar transistor blocks, and it predecessor BESM-4 build on vacuum tubes.
> 

According to Wikipedia:

Due to the large number of bits needed to encode the three registers of a 3-operand instruction, RISC architectures that have 16-bit instructions are invariably 2-operand designs, such as the Atmel AVR, TI MSP430, and some versions of ARM Thumb. RISC architectures that have 32-bit instructions are usually 3-operand designs, such as the ARM, AVR32, MIPS, Power ISA, and SPARC architectures.

I have no experience with any of those.

-- Doug