970/G5 powerpc64: why are HIOR (311), HID0, HID1 set in cpudep_ap_setup *AFTER* cpudep_ap_bootstrap tries general PSL_IR|PSL_DR activity for pcpup->pc_curthread->td_pcb->

[Mark Millard]

cpudep_ap_bootstrap uses the EXC_DSE (slbtrap) sometimes when it
tries to do the pcpup->pc_curthread->td_pcb-> to get the stack
pointer.

Yet HIOR (311) controls where exception code is found but is
initialized after the attempted use of EXC_DSE (and, possibly,
EC_ISE use).

HID0 has to do with, in part, locking, enalbing, and
invaldiating the isntruction and data caches (and power
modes).

HID1 has to do with, in part, controlling instruction fetch
and instruction decode functions.

It looks to me like pcpup->pc_curthread->td_pcb-> should
come after all the=ose have been set up.

In other words, given the content of the routines involved,
the order in:

cpu_reset_handler:
        GET_TOCBASE(%r2)

        addis   %r1,%r2,TOC_REF(tmpstk)@ha
        ld      %r1,TOC_REF(tmpstk)@l(%r1)      /* get new SP */
        addi    %r1,%r1,(TMPSTKSZ-48)

        bl      CNAME(cpudep_ap_early_bootstrap) /* Set PCPU */
        nop
        lis     %r3,1 at l
        bl      CNAME(pmap_cpu_bootstrap)       /* Turn on virtual memory */
        nop
        bl      CNAME(cpudep_ap_bootstrap)      /* Set up PCPU and stack */
        nop
        mr      %r1,%r3                         /* Use new stack */
        bl      CNAME(cpudep_ap_setup)
        nop
        GET_CPUINFO(%r5)
        ld      %r3,(PC_RESTORE)(%r5)
        cmpldi  %cr0,%r3,0
        beq     %cr0,2f
        nop
        li      %r4,1
        bl      CNAME(longjmp)
        nop
2:
#ifdef SMP
        bl      CNAME(machdep_ap_bootstrap)     /* And away! */
        nop
#endif

seems wrong to me, doing general execution before
the context has been initialized.

(Of course re-ordering could involve moving code between
routines, not just changes to cpu_reset_handler.)


Note: I never found HIOR (311) set for the bsp. I did
not find any HID1 code for the 970 bsp. It appears
that whatever openfirmware or the loader sets up is
used as-is.

For the bsp, powerpc_init seems to use cpu_feature_setup,
and so use cpu_970_setup (for HID0) earlier than on the
ap's (relative to things like ->pc_curthread->td_pcb-> ).

aim_eary_init seems to be next (for HID5).

moeas64_probe_large_page via moeas64_early_bootstrap via
early in moea64_bootstrap_native via pmapinit (for HID4).
I'm unsure of relative timing of this one.


===
Mark Millard
marklmi at yahoo.com
( dsl-only.net went
away in early 2018-Mar)