kernel mode EXC_DSE handling depends on td->td_pcb-> not slb faulting in setting up its slbmte use?

[Mark Millard]

[I show other examples of what is accessed in order to
set up a slbmte in some other places and list a question
that I should have asked in the original message.]

On 2019-May-2, at 14:40, Mark Millard <marklmi at yahoo.com> wrote:

> /usr/src/sys/powerpc/powerpc/trap.c has:
> 
>        } else {
>                /* Kernel Mode Traps */
> 
>                KASSERT(cold || td->td_ucred != NULL,
>                    ("kernel trap doesn't have ucred"));
>                switch (type) {
> . . .
> #if defined(__powerpc64__) && defined(AIM)
>                case EXC_DSE:
>                        if (td->td_pcb->pcb_cpu.aim.usr_vsid != 0 &&
>                            (frame->dar & SEGMENT_MASK) == USER_ADDR) {
>                                __asm __volatile ("slbmte %0, %1" ::
>                                        "r"(td->td_pcb->pcb_cpu.aim.usr_vsid),
>                                        "r"(USER_SLB_SLBE));
>                                return;
>                        }
>                        break;
> #endif
> 
> in trap(...).
> 
> If the kernel mode EXC_DSE code got a slb fault from
> td->td_pcb-> would things still be okay? (Nested trap
> handling.)
> 
> If not, does something need to be done to guarantee
> that td->td_pcb-> will not have an slb fault in the
> above code?

I should have asked:

Are all of addresses involved known to stick to to
being DMAP addresses (that there-by avoid slb-miss
issues)?

Similar questions might apply to some or all of the
below. Some are used in slbmte instructions and
others are just closely associated in the code.


src/sys/powerpc/aim/mmu_oea64.c has moea64_activate with:

        pmap_t  pm;
 
        pm = &td->td_proc->p_vmspace->vm_pmap;
        CPU_SET(PCPU_GET(cpuid), &pm->pm_active);
 
        #ifdef __powerpc64__
        PCPU_SET(aim.userslb, pm->pm_slb);
        __asm __volatile("slbmte %0, %1; isync" ::
            "r"(td->td_pcb->pcb_cpu.aim.usr_vsid), "r"(USER_SLB_SLBE));
        #else

So:

td->
and:
td->td_proc->
and:
td->td_proc->p_vmspace->
and:
td->td_pcb->



src/sys/powerpc/aim/mmu_oea64.c also has moea64_map_user_ptr with:

        curthread->td_pcb->pcb_cpu.aim.usr_segm =
            (uintptr_t)uaddr >> ADDR_SR_SHFT;
        curthread->td_pcb->pcb_cpu.aim.usr_vsid = slbv;
#ifdef __powerpc64__
        __asm __volatile ("slbie %0; slbmte %1, %2; isync" ::
            "r"(USER_ADDR), "r"(slbv), "r"(USER_SLB_SLBE));
#else

So:

curhtread->
and:
curthread->td_pcb->



src/sys/powerpc/powerpc/trap.c has syscall with:

        td = curthread;
        td->td_frame = frame;
                                
#if defined(__powerpc64__) && defined(AIM)
        /*
         * Speculatively restore last user SLB segment, which we know is
         * invalid already, since we are likely to do copyin()/copyout().
         */
        if (td->td_pcb->pcb_cpu.aim.usr_vsid != 0) // no slbie needed?
                __asm __volatile ("isync; slbmte %0, %1; isync" ::
                    "r"(td->td_pcb->pcb_cpu.aim.usr_vsid), "r"(USER_SLB_SLBE));
#endif

So:

curthread->
and:
curthread->td_pcb->



===
Mark Millard
marklmi at yahoo.com
( dsl-only.net went
away in early 2018-Mar)