usefdt boot mode on 2-socket/1-core-each G5 PowerMac7, 2: visible progress (using vt, not sc), new visible stopping point
Mark Millard
marklmi at yahoo.com
Sat Apr 13 04:51:41 UTC 2019
[More details on where the failure stage is.]
On 2019-Apr-12, at 20:49, Mark Millard <marklmi at yahoo.com> wrote:
> [I experiment with more modern tools and such for targeting
> powerpc64. Also with non-default modern modes of operation,
> such as usefdt mode. I had to patch the openfirmware->fdt
> translation to allow a 2-socket/1-core-each G4 PowerMac3,6
> to boot normally, with the ethernet present (and operable).]
>
> Turns out that I had been using:
>
> kern.vty=sc
>
> and for some reason this stops visible output just after
> "Kernel entry at . . .". (I've no clue if there is hidden
> activity vs. it just stopped there.) But with:
>
> kern.vty=vt
>
> the PowerMac7,2 visibly gets farther, though it fails
> to finish booting in usefdt mode.
>
> The new visible stopping point is (typed from a picture
> of boot -v output for usefdt mode):
>
> atapci1: <ServerWorks K2 SATA150 controller> at device 12.1 on pci8
> pcib1: failed to reserve resource for pcib8
> pcib8: failed to allocate initial I/O port window (0-0xffffffff,0x10)
> atapci1: 0x10 bytes of rid 0x28 res 4 failed (0, 0xffffffffffffffff).
> atapci1: unable to map interrupt
> device_attach: atapci1 attach returned 6
> ofwbus0: <vsp> mem 0xf9000000-0xf9ffffff irq 43 type vsp compat u3-vsp (no driver attached)
> cryptosoft0: <software crypto> on nexus0
> crypto: assign cryptosoft0 driver id 0, flags 0x6000000
>
> (I'll not repeat the long list of crypto registers/alg/flags/maxoplen lines.)
>
> Later material below suggests that the above is not the
> cause of stopping: a non-usefdt boot finishes but also
> has such text.
>
> Of course some material scrolled off screen. So from
> attempting booting again, but without -v , there is
> before the above:
>
> atapci0: <ServerWorks K2 SATA150 controller> mem 0x80600000-0x80601fff irq 33554432 at device 12.0 on pci8
> pcib1: failed to reserve resource for pcib8
> atapci0: 0x10 bytes of rid 0x20 res 4 failed (0, 0xffffffffffffffff).
> ata2: <ATA channel> at channel 0 on atapci0
> ata3: <ATA channel> at channel 1 on atapci0
> ata4: <ATA channel> at channel 2 on atapci0
> ata5: <ATA channel> at channel 3 on atapci0
>
>
> A non-usefdt mode (so normal openfirmware mode) boot works
> and shows similar output:
>
> atapci0: <ServerWorks K2 SATA150 controller> mem 0x80600000-0x80601fff irq 33554432 at device 12.0 on pci8
> pcib1: failed to reserve resource for pcib8
> atapci0: 0x10 bytes of rid 0x20 res 4 failed (0, 0xffffffffffffffff).
> ata2: <ATA channel> at channel 0 on atapci0
> ata3: <ATA channel> at channel 1 on atapci0
> ata4: <ATA channel> at channel 2 on atapci0
> ata5: <ATA channel> at channel 3 on atapci0
> atapci1: <ServerWorks K2 SATA150 controller> at device 12.1 on pci8
> pcib1: failed to reserve resource for pcib8
> atapci1: 0x10 bytes of rid 0x20 res 4 failed (0, 0xffffffffffffffff).
> atapci1: unable to map interrupt
> device_attach: atapci1 attach returned 6
> cryptosoft0: <software crypto> on nexus0
>
> This suggests that such text is normal and the hangup is
> for some other reason. It just suggests a time frame.
>
> After that for non-usefdt mode is:
>
> Timecounter "timebase" frequency 33333333 Hz quality 0
> Event timer "decrementer" frequency 33333333 Hz quality 1000
> Timecounters tick every 1.000 msec
>
> and so on. Such does not show up for usefdt mode.
subsystem 3800000
configure_first(0)... done.
module_register_init(&ata_moduledata)... done.
fbd_evh_init(0)... done.
module_register_init(&cam_moduledata)... done.
configure(0)... ofwbus0: <Open Firmware Device Tree> on nexus0
. . .
cryptosoft0: <software crypto> on nexus0
done.
cn_drvinit(0)... done.
mpt_postattach(0)... done.
cn_drvinit(0)... done.
vmem_start_callout(0)... done.
vm_lowmem_evh_init(0)... done.
mountroot_evh_init(0)... done.
ifaddr_event_ext_evh_init(0)... done.
configure_final(0)...
(That is the end of the output.)
So during:
SI_SUB_CONFIGURE = 0x3800000, /* Configure devices */
for:
static void
configure_final(void *dummy)
{
/*
* Now that we're guaranteed to have a PIC driver (or we'll never
* have one), program it with all the previously setup interrupts.
*/
powerpc_enable_intr();
/* Enable external interrupts. */
mtmsr(mfmsr() | PSL_EE);
cninit_finish();
cold = 0;
}
===
Mark Millard
marklmi at yahoo.com
( dsl-only.net went
away in early 2018-Mar)
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