Call for testers: Apple ATA DMA

[Nathan Whitehorn]

John Baldwin wrote:
> On Thursday 11 September 2008 02:32:10 pm Peter Grehan wrote:
>   
>> Hi John,
>>
>>     
>>> So when I did the MSI stuff I had assumed (apparently incorrectly), that 
>>>       
> PCI 
>   
>>> functions would only every have 1 non-MSI interrupt (since there is only a 
>>> single INTLINE config register).  Is the extra interrupt coming from OF?  
>>>       
> If 
>   
>>> so, does OF support MSI at all?  You could always change the OF PCI bus 
>>> driver to not do MSI and use rid 1 IRQ for the OF indicated IRQ for a PCI 
>>> device by having custom alloc_resource/setup_intr/teardown_intr methods.
>>>       
>>   Int lines on the Mac go directly into the OpenPIC, allowing as many 
>> int sources as desired. The intline config register isn't really used, 
>> though there is code that attempts to read the OFW interrupt properties 
>> and then program that register to avoid messing with the PCI common 
>> code. Unfortunately, some Mac devices ignore writes to that register :( 
>> The G5 does support MSI.
>>
>>   I had sent a possible solution to Nathan (Nathan: check your junk :) 
>> that in pci_setup_intr did something like:
>>
>>    if (dinfo->cfg.msi.msi_addr > 0) {
>>      ...
>>    } else if (dinfo->cfg.msi.msix_alloc > 0) {
>>      ...
>>    } else {
>> #ifndef __powerpc__
>>      KASSERT("No MSI or MSI-X interrupts allocated")
>> #endif
>>    }
>>
>>   There's probably a bunch of other places that need fixing but this was 
>> an obvious one.
>>     
>
> OFW should already have its own PCI bus driver, so I'd rather you give it its 
> own bus_setup_intr() method that DTRT for these interrupt resources (rid > 0 
> and !MSI) and then calls pci_setup_intr() for the rest.  Then you don't have 
> to add MD hacks to the generic PCI bus driver.
>   
It doesn't on PowerPC. There are a bunch of hacks done at attach-time to 
compensate for this (see ofw_pci_fixup()). It might be nice to import 
sparc64's PCI OFW bus code, though.
-Nathan