em driver input errors
Barney Cordoba
barney_cordoba at yahoo.com
Sun Sep 13 12:30:25 UTC 2009
--- On Fri, 9/11/09, Jack Vogel <jfvogel at gmail.com> wrote:
> From: Jack Vogel <jfvogel at gmail.com>
> Subject: Re: em driver input errors
> To: "Mike Tancsa" <mike at sentex.net>
> Cc: "Barney Cordoba" <barney_cordoba at yahoo.com>, freebsd-net at freebsd.org
> Date: Friday, September 11, 2009, 12:38 PM
> Glad to hear this.
>
> Jack
>
>
> On Fri, Sep 11, 2009 at 4:46 AM,
> Mike Tancsa <mike at sentex.net>
> wrote:
>
> At 11:28 AM 9/9/2009, Mike Tancsa wrote:
>
>
> At 11:17 AM 9/9/2009, Mike Tancsa wrote:
>
>
> The board is an intel
>
>
>
> http://www.intel.com/support/motherboards/server/s3000ah/
>
>
>
> Not sure if its wired as PCI-X or just a 32bit bus. I am
> just popping in an em pcie nic to see if that makes a
> difference. I have an igb as well as bge I can try later.
>
>
>
>
> OK, now there is
>
>
>
> em0 at pci0:5:0:0: class=0x020000 card=0xa01f8086
> chip=0x10d38086 rev=0x00 hdr=0x00
>
> vendor = 'Intel Corporation'
>
> class = network
>
> subclass = ethernet
>
> cap 01[c8] = powerspec 2 supports D0 D3 current
> D0
>
> cap 05[d0] = MSI supports 1 message, 64 bit
>
> cap 10[e0] = PCI-Express 1 endpoint max data 128(256)
> link x1(x1)
>
> cap 11[a0] = MSI-X supports 5 messages in map 0x1c
> enabled
>
>
>
>
>
>
>
>
>
>
> OK, much better. Two nights in a row without errors, and
> Friday AM has a lot of level0 dumps. Perhaps as you
> speculated, the onboard NICs were wired to a slower bus...
> The pcie 1x hasnt shown any errors yet.
>
>
>
> Sep 11 00:01:00 backup3 kernel: em0: Excessive collisions =
> 0
>
> Sep 11 00:01:00 backup3 kernel: em0: Sequence errors = 0
>
> Sep 11 00:01:00 backup3 kernel: em0: Defer count = 0
>
> Sep 11 00:01:00 backup3 kernel: em0: Missed Packets = 0
>
> Sep 11 00:01:00 backup3 kernel: em0: Receive No Buffers =
> 0
>
> Sep 11 00:01:00 backup3 kernel: em0: Receive Length Errors
> = 0
>
> Sep 11 00:01:00 backup3 kernel: em0: Receive errors = 0
>
> Sep 11 00:01:00 backup3 kernel: em0: Crc errors = 0
>
> Sep 11 00:01:00 backup3 kernel: em0: Alignment errors = 0
>
> Sep 11 00:01:00 backup3 kernel: em0: Collision/Carrier
> extension errors = 0
>
> Sep 11 00:01:00 backup3 kernel: em0: RX overruns = 0
>
> Sep 11 00:01:00 backup3 kernel: em0: watchdog timeouts = 0
>
> Sep 11 00:01:00 backup3 kernel: em0: RX MSIX IRQ = 50004846
> TX MSIX IRQ = 40678847 LINK MSIX IRQ = 1
>
> Sep 11 00:01:00 backup3 kernel: em0: XON Rcvd = 0
>
> Sep 11 00:01:00 backup3 kernel: em0: XON Xmtd = 0
>
> Sep 11 00:01:00 backup3 kernel: em0: XOFF Rcvd = 0
>
> Sep 11 00:01:00 backup3 kernel: em0: XOFF Xmtd = 0
>
> Sep 11 00:01:00 backup3 kernel: em0: Good Packets Rcvd =
> 73064815
>
> Sep 11 00:01:00 backup3 kernel: em0: Good Packets Xmtd =
> 52479296
>
> Sep 11 00:01:00 backup3 kernel: em0: TSO Contexts Xmtd = 0
>
> Sep 11 00:01:00 backup3 kernel: em0: TSO Contexts Failed =
> 0
>
>
>
>
>
> Name Mtu Network Address
> Ipkts Ierrs Opkts Oerrs Coll
>
> em0 1500 <Link#1> 00:1b:21:3f:62:72
> 193269942 0 133269168 0 0
>
> em0 1500 10.45.129.132 10.45.129.133
> 0 - 0 - -
>
> em1 1500 <Link#2> 00:15:17:57:31:8a
> 0 0 0 0 0
>
> em1 1500 10.45.129.128 10.45.129.129
> 0 - 0 - -
>
> em2* 1500 <Link#3> 00:15:17:57:31:8b
> 0 0 0 0
> 0
>
>
>
> ---Mike
>
Intel really shouldn't let MB manufacturers market dual gigabit
systems with 32bit controllers. The NICs aren't intended to be
used that way, and it makes them look bad, when its really the fault
of the MB manufacturer for cheaping out on the design.
Barney
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